gem5  v20.1.0.0
pseudo.cc
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40 
41 #include "arch/arm/insts/pseudo.hh"
42 
43 #include "cpu/exec_context.hh"
44 
45 using namespace ArmISA;
46 
48  : ArmStaticInst("gem5decoderFault", _machInst, No_OpClass),
49  faultId(static_cast<DecoderFault>(
50  static_cast<uint8_t>(_machInst.decoderFault)))
51 {
52  // Don't call execute() if we're on a speculative path and the
53  // fault is an internal panic fault.
54  flags[IsNonSpeculative] = (faultId == DecoderFault::PANIC);
55 }
56 
57 Fault
59 {
60  const PCState pc_state(xc->pcState());
61  const Addr pc(pc_state.instAddr());
62 
63  switch (faultId) {
65  if (machInst.aarch64) {
66  return std::make_shared<PCAlignmentFault>(pc);
67  } else {
68  // TODO: We should check if we the receiving end is in
69  // aarch64 mode and raise a PCAlignment fault instead.
70  return std::make_shared<PrefetchAbort>(
71  pc, ArmFault::AlignmentFault);
72  }
73 
75  panic("Internal error in instruction decoder\n");
76 
77  case DecoderFault::OK:
78  panic("Decoder fault instruction without decoder fault.\n");
79  }
80 
81  panic("Unhandled fault type");
82 }
83 
84 const char *
86 {
87  switch (faultId) {
88  case DecoderFault::OK:
89  return "OK";
90 
92  return "UnalignedInstruction";
93 
95  return "DecoderPanic";
96  }
97 
98  panic("Unhandled fault type");
99 }
100 
101 std::string
103  Addr pc, const Loader::SymbolTable *symtab) const
104 {
105  return csprintf("gem5fault %s", faultName());
106 }
107 
108 
109 
110 FailUnimplemented::FailUnimplemented(const char *_mnemonic,
111  ExtMachInst _machInst)
112  : ArmStaticInst(_mnemonic, _machInst, No_OpClass)
113 {
114  // don't call execute() (which panics) if we're on a
115  // speculative path
116  flags[IsNonSpeculative] = true;
117 }
118 
119 FailUnimplemented::FailUnimplemented(const char *_mnemonic,
120  ExtMachInst _machInst,
121  const std::string& _fullMnemonic)
122  : ArmStaticInst(_mnemonic, _machInst, No_OpClass),
123  fullMnemonic(_fullMnemonic)
124 {
125  // don't call execute() (which panics) if we're on a
126  // speculative path
127  flags[IsNonSpeculative] = true;
128 }
129 
130 Fault
132 {
133  return std::make_shared<UndefinedInstruction>(machInst, false, mnemonic);
134 }
135 
136 std::string
138  Addr pc, const Loader::SymbolTable *symtab) const
139 {
140  return csprintf("%-10s (unimplemented)",
141  fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
142 }
143 
144 
145 
146 WarnUnimplemented::WarnUnimplemented(const char *_mnemonic,
147  ExtMachInst _machInst)
148  : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
149 {
150  // don't call execute() (which panics) if we're on a
151  // speculative path
152  flags[IsNonSpeculative] = true;
153 }
154 
155 WarnUnimplemented::WarnUnimplemented(const char *_mnemonic,
156  ExtMachInst _machInst,
157  const std::string& _fullMnemonic)
158  : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false),
159  fullMnemonic(_fullMnemonic)
160 {
161  // don't call execute() (which panics) if we're on a
162  // speculative path
163  flags[IsNonSpeculative] = true;
164 }
165 
166 Fault
168 {
169  if (!warned) {
170  warn("\tinstruction '%s' unimplemented\n",
171  fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
172  warned = true;
173  }
174 
175  return NoFault;
176 }
177 
178 std::string
180  Addr pc, const Loader::SymbolTable *symtab) const
181 {
182  return csprintf("%-10s (unimplemented)",
183  fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
184 }
185 
187  : ArmStaticInst("Illegal Execution", _machInst, No_OpClass)
188 {}
189 
190 Fault
192 {
193  return std::make_shared<IllegalInstSetStateFault>();
194 }
195 
197  : ArmStaticInst("DebugStep", _machInst, No_OpClass)
198 { }
199 
200 Fault
202 {
203  PCState pc_state(xc->pcState());
204  pc_state.debugStep(false);
205  xc->pcState(pc_state);
206 
208 
209  bool ldx = sd->getSstep()->getLdx();
210 
211  return std::make_shared<SoftwareStepFault>(machInst, ldx,
212  pc_state.stepped());
213 
214 }
ArmISA::SelfDebug
Definition: self_debug.hh:273
StaticInst::flags
std::bitset< Num_Flags > flags
Flag values for this instruction.
Definition: static_inst.hh:99
warn
#define warn(...)
Definition: logging.hh:239
DecoderFaultInst::faultId
ArmISA::DecoderFault faultId
Definition: pseudo.hh:49
ArmISA::DecoderFault
DecoderFault
Instruction decoder fault codes in ExtMachInst.
Definition: types.hh:703
Loader::SymbolTable
Definition: symtab.hh:59
Trace::InstRecord
Definition: insttracer.hh:55
FailUnimplemented::execute
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Definition: pseudo.cc:131
ArmISA
Definition: ccregs.hh:41
ArmISA::ArmStaticInst
Definition: static_inst.hh:60
ExecContext::pcState
virtual PCState pcState() const =0
IllegalExecInst::execute
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Definition: pseudo.cc:191
DebugStep::execute
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Definition: pseudo.cc:201
WarnUnimplemented::warned
bool warned
Have we warned on this instruction yet?
Definition: pseudo.hh:102
WarnUnimplemented::fullMnemonic
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
Definition: pseudo.hh:105
Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
FailUnimplemented::FailUnimplemented
FailUnimplemented(const char *_mnemonic, ArmISA::ExtMachInst _machInst)
ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition: exec_context.hh:70
DecoderFaultInst::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: pseudo.cc:102
ArmISA::sd
Bitfield< 4 > sd
Definition: miscregs_types.hh:768
StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:258
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition: static_inst.hh:89
DecoderFaultInst::execute
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Definition: pseudo.cc:58
ArmISA::decoderFault
decoderFault
Definition: types.hh:70
NoFault
constexpr decltype(nullptr) NoFault
Definition: types.hh:245
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
IllegalExecInst::IllegalExecInst
IllegalExecInst(ArmISA::ExtMachInst _machInst)
Definition: pseudo.cc:186
WarnUnimplemented::WarnUnimplemented
WarnUnimplemented(const char *_mnemonic, ArmISA::ExtMachInst _machInst)
FailUnimplemented::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: pseudo.cc:137
ArmISA::OK
@ OK
No fault.
Definition: types.hh:704
ArmISA::ISA::getSelfDebug
SelfDebug * getSelfDebug() const
Definition: isa.hh:476
ExecContext::tcBase
virtual ThreadContext * tcBase() const =0
Returns a pointer to the ThreadContext.
WarnUnimplemented::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: pseudo.cc:179
pseudo.hh
StaticInst::machInst
const ExtMachInst machInst
The binary machine instruction.
Definition: static_inst.hh:243
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
FailUnimplemented::fullMnemonic
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
Definition: pseudo.hh:75
ArmISA::UNALIGNED
@ UNALIGNED
Unaligned instruction fault.
Definition: types.hh:705
exec_context.hh
DecoderFaultInst::faultName
const char * faultName() const
Definition: pseudo.cc:85
DecoderFaultInst::DecoderFaultInst
DecoderFaultInst(ArmISA::ExtMachInst _machInst)
Definition: pseudo.cc:47
ArmISA::PANIC
@ PANIC
Internal gem5 error.
Definition: types.hh:707
WarnUnimplemented::execute
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Definition: pseudo.cc:167
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:158
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171
DebugStep::DebugStep
DebugStep(ArmISA::ExtMachInst _machInst)
Definition: pseudo.cc:196
MipsISA::ExtMachInst
uint64_t ExtMachInst
Definition: types.hh:39

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