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61 const Addr pc(pc_state.instAddr());
66 return std::make_shared<PCAlignmentFault>(
pc);
70 return std::make_shared<PrefetchAbort>(
71 pc, ArmFault::AlignmentFault);
75 panic(
"Internal error in instruction decoder\n");
78 panic(
"Decoder fault instruction without decoder fault.\n");
81 panic(
"Unhandled fault type");
92 return "UnalignedInstruction";
95 return "DecoderPanic";
98 panic(
"Unhandled fault type");
116 flags[IsNonSpeculative] =
true;
121 const std::string& _fullMnemonic)
123 fullMnemonic(_fullMnemonic)
127 flags[IsNonSpeculative] =
true;
140 return csprintf(
"%-10s (unimplemented)",
148 :
ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
152 flags[IsNonSpeculative] =
true;
157 const std::string& _fullMnemonic)
158 :
ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false),
159 fullMnemonic(_fullMnemonic)
163 flags[IsNonSpeculative] =
true;
170 warn(
"\tinstruction '%s' unimplemented\n",
182 return csprintf(
"%-10s (unimplemented)",
193 return std::make_shared<IllegalInstSetStateFault>();
204 pc_state.debugStep(
false);
209 bool ldx =
sd->getSstep()->getLdx();
211 return std::make_shared<SoftwareStepFault>(
machInst, ldx,
std::bitset< Num_Flags > flags
Flag values for this instruction.
ArmISA::DecoderFault faultId
DecoderFault
Instruction decoder fault codes in ExtMachInst.
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
virtual PCState pcState() const =0
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
bool warned
Have we warned on this instruction yet?
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
std::shared_ptr< FaultBase > Fault
FailUnimplemented(const char *_mnemonic, ArmISA::ExtMachInst _machInst)
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
const char * mnemonic
Base mnemonic (e.g., "add").
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
constexpr decltype(nullptr) NoFault
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
IllegalExecInst(ArmISA::ExtMachInst _machInst)
WarnUnimplemented(const char *_mnemonic, ArmISA::ExtMachInst _machInst)
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
SelfDebug * getSelfDebug() const
virtual ThreadContext * tcBase() const =0
Returns a pointer to the ThreadContext.
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
const ExtMachInst machInst
The binary machine instruction.
GenericISA::DelaySlotPCState< MachInst > PCState
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
@ UNALIGNED
Unaligned instruction fault.
const char * faultName() const
DecoderFaultInst(ArmISA::ExtMachInst _machInst)
@ PANIC
Internal gem5 error.
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
std::string csprintf(const char *format, const Args &...args)
#define panic(...)
This implements a cprintf based panic() function.
DebugStep(ArmISA::ExtMachInst _machInst)
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