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45 #include "debug/HWPrefetch.hh"
48 #include "params/QueuedPrefetcher.hh"
58 RequestPtr req = std::make_shared<Request>(paddr, blk_size,
77 assert(translationRequest !=
nullptr);
78 if (!ongoingTranslation) {
79 ongoingTranslation =
true;
89 assert(ongoingTranslation);
90 ongoingTranslation =
false;
91 bool failed = (fault !=
NoFault);
92 owner->translationComplete(
this, failed);
98 p->max_prefetch_requests_with_pending_translation),
133 size_t max_pfs =
total;
136 size_t min_pfs = (
total - throttle_pfs) == 0 ?
137 1 : (
total - throttle_pfs);
138 max_pfs = min_pfs + (
total - min_pfs) *
152 auto itr =
pfq.begin();
153 while (itr !=
pfq.end()) {
154 if (itr->pfInfo.getAddr() == blk_addr &&
155 itr->pfInfo.isSecure() == is_secure) {
157 itr =
pfq.erase(itr);
182 bool can_cross_page = (
tlb !=
nullptr);
186 DPRINTF(HWPrefetch,
"Found a pf candidate addr: %#x, "
187 "inserting into prefetch queue.\n", new_pfi.
getAddr());
189 insert(pkt, new_pfi, addr_prio.second);
191 if (num_pfs == max_pfs) {
195 DPRINTF(HWPrefetch,
"Ignoring page crossing prefetch.\n");
203 DPRINTF(HWPrefetch,
"Requesting a prefetch to issue.\n");
212 DPRINTF(HWPrefetch,
"No hardware prefetches available.\n");
221 assert(pkt !=
nullptr);
222 DPRINTF(HWPrefetch,
"Generating prefetch for %#x.\n", pkt->
getAddr());
228 :
Stats::Group(parent),
229 ADD_STAT(pfIdentified,
"number of prefetch candidates identified"),
231 "number of redundant prefetches already in prefetch queue"),
233 "number of redundant prefetches already in cache/mshr dropped"),
235 "number of prefetches dropped due to prefetch queue size"),
236 ADD_STAT(pfSpanPage,
"number of prefetches that crossed the page")
251 dp.startTranslation(
tlb);
268 DPRINTF(HWPrefetch,
"%s Translation of vaddr %#x succeeded: "
270 it->translationRequest->getVaddr(),
271 it->translationRequest->getPaddr());
272 Addr target_paddr = it->translationRequest->getPaddr();
275 inMissQueue(target_paddr, it->pfInfo.isSecure()))) {
277 DPRINTF(HWPrefetch,
"Dropping redundant in "
278 "cache/MSHR prefetch addr:%#x\n", target_paddr);
281 it->createPkt(it->translationRequest->getPaddr(),
blkSize,
286 DPRINTF(HWPrefetch,
"%s Translation of vaddr %#x failed, dropping "
287 "prefetch request %#x \n",
tlb->
name(),
288 it->translationRequest->getVaddr());
299 for (it = queue.begin(); it != queue.end() && !found; it++) {
300 found = it->pfInfo.sameAddr(pfi);
304 if (it != queue.end()) {
306 if (it->priority < priority) {
308 it->priority = priority;
310 while (prev != queue.begin()) {
314 std::swap(*it, *prev);
318 DPRINTF(HWPrefetch,
"Prefetch addr already in "
319 "prefetch queue, priority updated\n");
321 DPRINTF(HWPrefetch,
"Prefetch addr already in "
332 RequestPtr translation_req = std::make_shared<Request>(
334 pkt->
req->contextId());
336 return translation_req;
365 pkt->
req->getVaddr() : pkt->
req->getPaddr();
366 bool positive_stride = new_pfi.
getAddr() >= orig_addr;
368 (new_pfi.
getAddr() - orig_addr) : (orig_addr - new_pfi.
getAddr());
371 bool has_target_pa =
false;
378 target_paddr = positive_stride ? (pkt->
req->getPaddr() +
stride) :
381 target_paddr = new_pfi.
getAddr();
383 has_target_pa =
true;
388 if (!pkt->
req->hasContextId()) {
392 has_target_pa =
false;
395 }
else if (pkt->
req->hasVaddr()) {
396 has_target_pa =
false;
398 Addr target_vaddr = positive_stride ?
413 DPRINTF(HWPrefetch,
"Dropping redundant in "
414 "cache/MSHR prefetch addr:%#x\n", target_paddr);
424 DPRINTF(HWPrefetch,
"Prefetch queued. "
425 "addr:%#x priority: %3d tick:%lld.\n",
426 new_pfi.
getAddr(), priority, pf_time);
432 DPRINTF(HWPrefetch,
"Prefetch queued with no translation. "
433 "addr:%#x priority: %3d\n", new_pfi.
getAddr(), priority);
448 "Prefetch queue is both full and empty!");
452 "Prefetch queue is full with 1 element!");
456 while (cont && prev != queue.begin()) {
459 cont = prev->priority == it->priority;
464 DPRINTF(HWPrefetch,
"Prefetch queue full, removing lowest priority "
465 "oldest packet, addr: %#x\n",it->pfInfo.getAddr());
470 if (queue.size() == 0) {
471 queue.emplace_back(dpp);
476 }
while (it != queue.begin() && dpp > *it);
479 if (it == queue.begin() && dpp <= *it)
481 queue.insert(it, dpp);
BaseCache * cache
Pointr to the parent cache.
Stats::Scalar pfBufferHit
QueuedStats(Stats::Group *parent)
std::list< DeferredPacket > pfqMissingTranslation
const bool useVirtualAddresses
Use Virtual Addresses for prefetching.
System * system
System we are currently operating in.
unsigned blkSize
The block size of the parent cache.
void insert(const PacketPtr &pkt, PrefetchInfo &new_pfi, int32_t priority)
Addr getPC() const
Returns the program counter that generated this request.
RequestPtr createPrefetchRequest(Addr addr, PrefetchInfo const &pfi, PacketPtr pkt)
bool alreadyInQueue(std::list< DeferredPacket > &queue, const PrefetchInfo &pfi, int32_t priority)
Checks whether the specified prefetch request is already in the specified queue.
Tick tick
Time when this prefetch becomes ready.
virtual void translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode)=0
uint64_t Tick
Tick count type.
void translationComplete(DeferredPacket *dp, bool failed)
Indicates that the translation of the address of the provided deferred packet has been successfully c...
std::shared_ptr< Request > RequestPtr
RequestPtr req
A pointer to the original request.
Queued(const QueuedPrefetcherParams *p)
bool inCache(Addr addr, bool is_secure) const
Determine if address is in cache.
void finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc, BaseTLB::Mode mode) override
const bool tagPrefetch
Tag prefetch with PC of generating access?
uint64_t usefulPrefetches
Total prefetches that has been useful.
const unsigned int throttleControlPct
Percentage of requests that can be throttled.
void notify(const PacketPtr &pkt, const PrefetchInfo &pfi) override
Notify prefetcher of cache access (may be any access or just misses, depending on cache parameters....
Prefetcher::Base::StatGroup prefetchStats
Stats::Scalar pfIdentified
const Cycles latency
Cycles after generation when a prefetch can first be issued.
BaseTLB * tlb
Registered tlb for address translations.
@ SECURE
The request targets the secure memory space.
ThreadContext is the external interface to all thread state for anything outside of the CPU.
const bool queueFilter
Filter prefetches if already queued.
@ PREFETCH
The request is a prefetch.
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
std::shared_ptr< FaultBase > Fault
PacketPtr getPacket() override
const unsigned queueSize
Maximum size of the prefetch queue.
Copyright (c) 2018 Metempsy Technology Consulting All rights reserved.
void createPkt(Addr paddr, unsigned blk_size, RequestorID requestor_id, bool tag_prefetch, Tick t)
Create the associated memory packet.
virtual void calculatePrefetch(const PrefetchInfo &pfi, std::vector< AddrPriority > &addresses)=0
const bool cacheSnoop
Snoop the cache before generating prefetch (cheating basically)
constexpr decltype(nullptr) NoFault
ProbePointArg< PacketInfo > Packet
Packet probe point.
const unsigned missingTranslationQueueSize
Maximum size of the queue holding prefetch requests with missing address translations.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
std::list< DeferredPacket > pfq
virtual const std::string name() const
bool isSecure() const
Returns true if the address targets the secure memory space.
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
uint64_t issuedPrefetches
Total prefetches issued.
size_t getMaxPermittedPrefetches(size_t total) const
Returns the maxmimum number of prefetch requests that are allowed to be created from the number of pr...
const RequestorID requestorId
Request id for prefetches.
std::list< DeferredPacket >::iterator iterator
void startTranslation(BaseTLB *tlb)
Issues the translation request to the provided TLB.
void setTranslationRequest(const RequestPtr &req)
Sets the translation request needed to obtain the physical address of this request.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Class containing the information needed by the prefetch to train and generate new prefetch requests.
Bitfield< 21, 20 > stride
PacketPtr pkt
The memory packet generated by this prefetch.
Prefetcher::Queued::QueuedStats statsQueued
Addr blockAddress(Addr a) const
Determine the address of the block in which a lays.
bool inMissQueue(Addr addr, bool is_secure) const
Determine if address is in cache miss queue.
void allocate()
Allocate memory for the packet.
bool samePage(Addr a, Addr b) const
Determine if addresses are on the same page.
const FlagsType total
Print the total.
PrefetchInfo pfInfo
Prefetch info corresponding to this packet.
Addr getAddr() const
Obtains the address value of this Prefetcher address.
bool hasPC() const
Returns true if the associated program counter is valid.
void addToQueue(std::list< DeferredPacket > &queue, DeferredPacket &dpp)
Adds a DeferredPacket to the specified queue.
Stats::Scalar pfRemovedFull
void processMissingTranslations(unsigned max)
Starts the translations of the queued prefetches with a missing translation.
Tick curTick()
The current simulated tick.
const bool queueSquash
Squash queued prefetch if demand access observed.
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