gem5  v20.1.0.0
unknown.hh
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29 
30 #ifndef __ARCH_RISCV_UNKNOWN_INST_HH__
31 #define __ARCH_RISCV_UNKNOWN_INST_HH__
32 
33 #include <memory>
34 #include <string>
35 
36 #include "arch/riscv/faults.hh"
39 #include "cpu/exec_context.hh"
40 #include "cpu/static_inst.hh"
41 
42 namespace RiscvISA
43 {
44 
50 class Unknown : public RiscvStaticInst
51 {
52  public:
53  Unknown(MachInst _machInst)
54  : RiscvStaticInst("unknown", _machInst, No_OpClass)
55  {}
56 
57  Fault
58  execute(ExecContext *, Trace::InstRecord *) const override
59  {
60  return std::make_shared<UnknownInstFault>(machInst);
61  }
62 
63  std::string
65  Addr pc, const Loader::SymbolTable *symtab) const override
66  {
67  return csprintf("unknown opcode %#02x", OPCODE);
68  }
69 };
70 
71 }
72 
73 #endif // __ARCH_RISCV_UNKNOWN_INST_HH__
RiscvISA::Unknown::execute
Fault execute(ExecContext *, Trace::InstRecord *) const override
Definition: unknown.hh:58
faults.hh
RiscvISA::MachInst
uint32_t MachInst
Definition: types.hh:50
RiscvISA::Unknown::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: unknown.hh:64
RiscvISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
Loader::SymbolTable
Definition: symtab.hh:59
Trace::InstRecord
Definition: insttracer.hh:55
RiscvISA
Definition: fs_workload.cc:36
Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
RiscvISA::Unknown::Unknown
Unknown(MachInst _machInst)
Definition: unknown.hh:53
ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition: exec_context.hh:70
static_inst.hh
static_inst.hh
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
RiscvISA::RiscvStaticInst
Base class for all RISC-V static instructions.
Definition: static_inst.hh:46
RiscvISA::Unknown
Static instruction class for unknown (illegal) instructions.
Definition: unknown.hh:50
StaticInst::machInst
const ExtMachInst machInst
The binary machine instruction.
Definition: static_inst.hh:243
exec_context.hh
bitfields.hh
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:158
OPCODE
#define OPCODE
Definition: bitfields.hh:11

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