gem5  v20.1.0.0
branch.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2006-2007 The Regents of The University of Michigan
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef __ARCH_SPARC_INSTS_BRANCH_HH__
30 #define __ARCH_SPARC_INSTS_BRANCH_HH__
31 
33 
35 //
36 // Branch instructions
37 //
38 
39 namespace SparcISA
40 {
41 
45 class Branch : public SparcStaticInst
46 {
47  protected:
48  using SparcStaticInst::SparcStaticInst;
49 
50  std::string generateDisassembly(
51  Addr pc, const Loader::SymbolTable *symtab) const override;
52 };
53 
57 class BranchDisp : public Branch
58 {
59  protected:
60  BranchDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
61  int32_t _disp) :
62  Branch(mnem, _machInst, __opClass), disp(_disp)
63  {}
64 
65  std::string generateDisassembly(
66  Addr pc, const Loader::SymbolTable *symtab) const override;
67 
68  int32_t disp;
69 };
70 
74 template<int bits>
75 class BranchNBits : public BranchDisp
76 {
77  protected:
78  // Constructor
79  BranchNBits(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
80  BranchDisp(mnem, _machInst, __opClass,
81  sext<bits + 2>((_machInst & mask(bits)) << 2))
82  {}
83 };
84 
88 class BranchSplit : public BranchDisp
89 {
90  protected:
91  // Constructor
92  BranchSplit(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
93  BranchDisp(mnem, _machInst, __opClass,
94  sext<18>((bits(_machInst, 21, 20) << 16) |
95  (bits(_machInst, 13, 0) << 2)))
96  {}
97 };
98 
103 class BranchImm13 : public Branch
104 {
105  protected:
106  // Constructor
107  BranchImm13(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
108  Branch(mnem, _machInst, __opClass),
109  imm(sext<13>(bits(_machInst, 12, 0)))
110  {}
111 
112  std::string generateDisassembly(
113  Addr pc, const Loader::SymbolTable *symtab) const override;
114 
115  int32_t imm;
116 };
117 
118 }
119 
120 #endif // __ARCH_SPARC_INSTS_BRANCH_HH__
SparcISA::BranchSplit
Base class for 16bit split displacements.
Definition: branch.hh:88
SparcISA::BranchDisp::disp
int32_t disp
Definition: branch.hh:68
SparcISA::BranchImm13
Base class for branches that use an immediate and a register to compute their displacements.
Definition: branch.hh:103
SparcISA::BranchDisp
Base class for branch operations with an immediate displacement.
Definition: branch.hh:57
SparcISA::BranchNBits::BranchNBits
BranchNBits(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
Definition: branch.hh:79
Loader::SymbolTable
Definition: symtab.hh:59
sext
uint64_t sext(uint64_t val)
Sign-extend an N-bit value to 64 bits.
Definition: bitfield.hh:126
SparcISA::Branch::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: branch.cc:44
SparcISA::BranchImm13::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: branch.cc:58
SparcISA::BranchNBits
Base class for branches with n bit displacements.
Definition: branch.hh:75
SparcISA
Definition: asi.cc:31
SparcISA::BranchDisp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: branch.cc:76
SparcISA::Branch
Base class for branch operations.
Definition: branch.hh:45
SparcISA::BranchImm13::imm
int32_t imm
Definition: branch.hh:115
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition: static_inst.hh:89
SparcISA::BranchSplit::BranchSplit
BranchSplit(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
Definition: branch.hh:92
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
SparcISA::SparcStaticInst
Base class for all SPARC static instructions.
Definition: static_inst.hh:87
static_inst.hh
SparcISA::BranchImm13::BranchImm13
BranchImm13(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
Definition: branch.hh:107
SparcISA::BranchDisp::BranchDisp
BranchDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, int32_t _disp)
Definition: branch.hh:60
ArmISA::mask
Bitfield< 28, 24 > mask
Definition: miscregs_types.hh:711
bits
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:75

Generated on Wed Sep 30 2020 14:02:00 for gem5 by doxygen 1.8.17