gem5  v20.1.0.0
tme64.hh
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37 
38 #ifndef __ARCH_ARM_INSTS_TME64_HH__
39 #define __ARCH_ARM_INSTS_TME64_HH__
40 
44 
45 namespace ArmISAInst {
46 
48 {
49  protected:
51  OpClass __opClass)
52  : ArmISA::MicroOp(mnem, machInst, __opClass)
53  {}
54 };
55 
57 {
58  protected:
60  OpClass __opClass) :
61  MicroTmeOp(mnem, machInst, __opClass)
62  {}
63 
64  std::string generateDisassembly(Addr pc,
65  const Loader::SymbolTable *symtab) const;
66 };
67 
69 {
70  protected:
71  uint64_t imm;
72 
74  OpClass __opClass, uint64_t _imm)
75  : ArmISA::ArmStaticInst(mnem, machInst, __opClass),
76  imm(_imm)
77  {}
78 
79  std::string generateDisassembly(Addr pc,
80  const Loader::SymbolTable *symtab) const;
81 };
82 
84 {
85  protected:
87 
89  OpClass __opClass, ArmISA::IntRegIndex _dest)
90  : ArmISA::ArmStaticInst(mnem, machInst, __opClass),
91  dest(_dest)
92  {}
93 
94  std::string generateDisassembly(Addr pc,
95  const Loader::SymbolTable *symtab) const;
96 };
97 
98 class Tstart64 : public TmeRegNone64
99 {
100  public:
102 
106 };
107 
108 class Ttest64 : public TmeRegNone64
109 {
110  public:
112 
114 };
115 
116 class Tcancel64 : public TmeImmOp64
117 {
118  public:
119  Tcancel64(ArmISA::ExtMachInst, uint64_t);
120 
124 };
125 
127 {
128  public:
130 
134 };
135 
137 {
138  public:
140 
144 };
145 
146 
148 {
149  protected:
150  MacroTmeOp(const char *mnem, ArmISA::ExtMachInst _machInst,
151  OpClass __opClass);
152 };
153 
154 class Tcommit64 : public MacroTmeOp
155 {
156  public:
157  Tcommit64(ArmISA::ExtMachInst _machInst);
158 };
159 
160 } // namespace
161 
162 #endif
ArmISAInst::Tcancel64
Definition: tme64.hh:116
ArmISAInst::TmeImmOp64
Definition: tme64.hh:68
ArmISA::MicroOp
Base class for Memory microops.
Definition: macromem.hh:65
ArmISAInst::Ttest64::execute
Fault execute(ExecContext *, Trace::InstRecord *) const
Definition: tme64classic.cc:64
ArmISAInst::TmeImmOp64::TmeImmOp64
TmeImmOp64(const char *mnem, ArmISA::ExtMachInst machInst, OpClass __opClass, uint64_t _imm)
Definition: tme64.hh:73
ArmISAInst::MicroTfence64::MicroTfence64
MicroTfence64(ArmISA::ExtMachInst)
Definition: tme64.cc:76
ArmISAInst::TmeRegNone64::TmeRegNone64
TmeRegNone64(const char *mnem, ArmISA::ExtMachInst machInst, OpClass __opClass, ArmISA::IntRegIndex _dest)
Definition: tme64.hh:88
ArmISAInst::Tcancel64::Tcancel64
Tcancel64(ArmISA::ExtMachInst, uint64_t)
Definition: tme64.cc:162
ArmISAInst::MicroTcommit64::MicroTcommit64
MicroTcommit64(ArmISA::ExtMachInst)
Definition: tme64.cc:204
ArmISAInst::MicroTfence64
Definition: tme64.hh:126
ArmISAInst::Tstart64
Definition: tme64.hh:98
Loader::SymbolTable
Definition: symtab.hh:59
ArmISA::IntRegIndex
IntRegIndex
Definition: intregs.hh:51
ArmISAInst::Tcommit64
Definition: tme64.hh:154
ArmISAInst::MicroTmeBasic64::MicroTmeBasic64
MicroTmeBasic64(const char *mnem, ArmISA::ExtMachInst machInst, OpClass __opClass)
Definition: tme64.hh:59
Trace::InstRecord
Definition: insttracer.hh:55
ArmISAInst::MicroTfence64::completeAcc
Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const
Definition: tme64.cc:109
ArmISAInst::Tstart64::initiateAcc
Fault initiateAcc(ExecContext *, Trace::InstRecord *) const
Definition: tme64classic.cc:46
ArmISAInst::Tcommit64::Tcommit64
Tcommit64(ArmISA::ExtMachInst _machInst)
Definition: tme64.cc:229
ArmISAInst::Ttest64
Definition: tme64.hh:108
ArmISAInst::Tstart64::completeAcc
Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const
Definition: tme64classic.cc:55
ArmISA
Definition: ccregs.hh:41
macromem.hh
ArmISAInst::MicroTcommit64::initiateAcc
Fault initiateAcc(ExecContext *, Trace::InstRecord *) const
Definition: tme64classic.cc:91
ArmISAInst::MicroTfence64::initiateAcc
Fault initiateAcc(ExecContext *, Trace::InstRecord *) const
Definition: tme64.cc:100
ArmISA::ArmStaticInst
Definition: static_inst.hh:60
ArmISAInst::MicroTcommit64
Definition: tme64.hh:136
ArmISAInst::MicroTmeBasic64
Definition: tme64.hh:56
ArmISAInst::Tstart64::Tstart64
Tstart64(ArmISA::ExtMachInst, ArmISA::IntRegIndex)
Definition: tme64.cc:117
ArmISAInst::MicroTcommit64::completeAcc
Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const
Definition: tme64classic.cc:100
ArmISAInst::MicroTmeBasic64::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const
Internal function to generate disassembly string.
Definition: tme64.cc:68
ArmISAInst::TmeRegNone64::dest
ArmISA::IntRegIndex dest
Definition: tme64.hh:86
Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
ArmISAInst::TmeRegNone64
Definition: tme64.hh:83
ArmISAInst
Definition: tme64.cc:45
ArmISAInst::MicroTfence64::execute
Fault execute(ExecContext *, Trace::InstRecord *) const
Definition: tme64.cc:93
ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition: exec_context.hh:70
ArmISA::PredMacroOp
Base class for predicated macro-operations.
Definition: pred_inst.hh:336
ArmISAInst::Tcancel64::completeAcc
Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const
Definition: tme64classic.cc:82
ArmISAInst::TmeImmOp64::imm
uint64_t imm
Definition: tme64.hh:71
ArmISAInst::MicroTmeOp
Definition: tme64.hh:47
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
pred_inst.hh
ArmISAInst::MacroTmeOp
Definition: tme64.hh:147
ArmISAInst::MacroTmeOp::MacroTmeOp
MacroTmeOp(const char *mnem, ArmISA::ExtMachInst _machInst, OpClass __opClass)
Definition: tme64.cc:188
ArmISAInst::TmeRegNone64::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const
Internal function to generate disassembly string.
Definition: tme64.cc:58
ArmISAInst::TmeImmOp64::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const
Internal function to generate disassembly string.
Definition: tme64.cc:48
StaticInst::machInst
const ExtMachInst machInst
The binary machine instruction.
Definition: static_inst.hh:243
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
static_inst.hh
ArmISAInst::Tcancel64::initiateAcc
Fault initiateAcc(ExecContext *, Trace::InstRecord *) const
Definition: tme64classic.cc:73
ArmISA::MicroOp::MicroOp
MicroOp(const char *mnem, ExtMachInst machInst, OpClass __opClass)
Definition: macromem.hh:68
ArmISAInst::Tstart64::execute
Fault execute(ExecContext *, Trace::InstRecord *) const
Definition: tme64.cc:138
ArmISAInst::MicroTcommit64::execute
Fault execute(ExecContext *, Trace::InstRecord *) const
Definition: tme64.cc:222
ArmISA::ArmStaticInst::ArmStaticInst
ArmStaticInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
Definition: static_inst.hh:147
ArmISAInst::Tcancel64::execute
Fault execute(ExecContext *, Trace::InstRecord *) const
Definition: tme64.cc:180
ArmISAInst::MicroTmeOp::MicroTmeOp
MicroTmeOp(const char *mnem, ArmISA::ExtMachInst machInst, OpClass __opClass)
Definition: tme64.hh:50
ArmISAInst::Ttest64::Ttest64
Ttest64(ArmISA::ExtMachInst, ArmISA::IntRegIndex)
Definition: tme64.cc:146
MipsISA::ExtMachInst
uint64_t ExtMachInst
Definition: types.hh:39

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