gem5
v21.0.1.0
|
#include <hsa_queue_entry.hh>
Public Member Functions | |
HSAQueueEntry (std::string kernel_name, uint32_t queue_id, int dispatch_id, void *disp_pkt, AMDKernelCode *akc, Addr host_pkt_addr, Addr code_addr) | |
const std::string & | kernelName () const |
int | wgSize (int dim) const |
int | gridSize (int dim) const |
int | numVectorRegs () const |
int | numScalarRegs () const |
uint32_t | queueId () const |
int | dispatchId () const |
void * | dispPktPtr () |
Addr | hostDispPktAddr () const |
Addr | completionSignal () const |
Addr | codeAddr () const |
Addr | kernargAddr () const |
int | ldsSize () const |
int | privMemPerItem () const |
int | contextId () const |
bool | dispComplete () const |
int | wgId (int dim) const |
void | wgId (int dim, int val) |
int | globalWgId () const |
void | globalWgId (int val) |
int | numWg (int dim) const |
void | notifyWgCompleted () |
int | numWgCompleted () const |
int | numWgTotal () const |
void | markWgDispatch () |
int | numWgAtBarrier () const |
bool | vgprBitEnabled (int bit) const |
bool | sgprBitEnabled (int bit) const |
int | outstandingInvs () |
bool | isInvStarted () |
Whether invalidate has started or finished -1 is the initial value indicating inv has not started for the kernel. More... | |
void | updateOutstandingInvs (int val) |
update the number of pending invalidate requests More... | |
void | markInvDone () |
Forcefully change the state to be inv done. More... | |
bool | isInvDone () const |
Is invalidate done? More... | |
int | outstandingWbs () const |
void | updateOutstandingWbs (int val) |
Update the number of pending writeback requests. More... | |
Public Attributes | |
Addr | hostAMDQueueAddr |
Host-side addr of the amd_queue_t on which this task was queued. More... | |
_amd_queue_t | amdQueue |
Keep a copy of the AMD HSA queue because we need info from some of its fields to initialize register state. More... | |
Static Public Attributes | |
const static int | MAX_DIM = 3 |
Private Member Functions | |
void | parseKernelCode (AMDKernelCode *akc) |
Private Attributes | |
std::string | kernName |
std::array< int, MAX_DIM > | _wgSize |
std::array< int, MAX_DIM > | _gridSize |
int | numVgprs |
int | numSgprs |
uint32_t | _queueId |
int | _dispatchId |
void * | dispPkt |
Addr | _hostDispPktAddr |
Addr | _completionSignal |
Addr | codeAddress |
Addr | kernargAddress |
int | _outstandingInvs |
Number of outstanding invs for the kernel. More... | |
int | _outstandingWbs |
Number of outstanding wbs for the kernel values: 0: 1)initial value, flush has not started for the kernel 2)+1->0: all wb requests are finished, i.e., flush done ?: positive value, indicating the number of pending wb requests. More... | |
int | _ldsSize |
int | _privMemPerItem |
int | _contextId |
std::array< int, MAX_DIM > | _wgId |
std::array< int, MAX_DIM > | _numWg |
int | _numWgTotal |
int | numWgArrivedAtBarrier |
int | _numWgCompleted |
int | _globalWgId |
bool | dispatchComplete |
std::bitset< NumVectorInitFields > | initialVgprState |
std::bitset< NumScalarInitFields > | initialSgprState |
Definition at line 58 of file hsa_queue_entry.hh.
|
inline |
Definition at line 61 of file hsa_queue_entry.hh.
|
inline |
Definition at line 176 of file hsa_queue_entry.hh.
References codeAddress.
Referenced by ComputeUnit::startWavefront(), and GPUCommandProcessor::submitDispatchPkt().
|
inline |
Definition at line 170 of file hsa_queue_entry.hh.
References _completionSignal.
Referenced by GPUCommandProcessor::submitAgentDispatchPkt().
|
inline |
Definition at line 196 of file hsa_queue_entry.hh.
References _contextId.
|
inline |
Definition at line 152 of file hsa_queue_entry.hh.
References _dispatchId.
Referenced by GPUDispatcher::dispatch(), ComputeUnit::dispWorkgroup(), Shader::prepareInvalidate(), and ComputeUnit::startWavefront().
|
inline |
Definition at line 202 of file hsa_queue_entry.hh.
References dispatchComplete.
Referenced by Shader::dispatchWorkgroups().
|
inline |
Definition at line 158 of file hsa_queue_entry.hh.
References dispPkt.
|
inline |
Definition at line 222 of file hsa_queue_entry.hh.
References _globalWgId.
Referenced by Shader::dispatchWorkgroups(), ComputeUnit::dispWorkgroup(), and ComputeUnit::startWavefront().
|
inline |
Definition at line 228 of file hsa_queue_entry.hh.
References _globalWgId, and X86ISA::val.
|
inline |
Definition at line 127 of file hsa_queue_entry.hh.
References _gridSize, and MAX_DIM.
Referenced by ComputeUnit::fillKernelState(), ComputeUnit::hasDispResources(), Wavefront::initRegState(), and markWgDispatch().
|
inline |
Definition at line 164 of file hsa_queue_entry.hh.
References _hostDispPktAddr.
Referenced by Wavefront::initRegState().
|
inline |
Is invalidate done?
Definition at line 353 of file hsa_queue_entry.hh.
References _outstandingInvs.
Referenced by ComputeUnit::dispWorkgroup().
|
inline |
Whether invalidate has started or finished -1 is the initial value indicating inv has not started for the kernel.
Definition at line 323 of file hsa_queue_entry.hh.
References _outstandingInvs.
Referenced by Shader::prepareInvalidate().
|
inline |
Definition at line 182 of file hsa_queue_entry.hh.
References kernargAddress.
Referenced by Wavefront::initRegState().
|
inline |
Definition at line 114 of file hsa_queue_entry.hh.
References kernName.
Referenced by GPUDispatcher::dispatch().
|
inline |
Definition at line 188 of file hsa_queue_entry.hh.
References _ldsSize.
Referenced by ComputeUnit::dispWorkgroup(), and ComputeUnit::hasDispResources().
|
inline |
Forcefully change the state to be inv done.
Definition at line 344 of file hsa_queue_entry.hh.
References _outstandingInvs.
|
inline |
Definition at line 259 of file hsa_queue_entry.hh.
References _globalWgId, _wgId, dispatchComplete, gridSize(), wgId(), and wgSize().
Referenced by Shader::dispatchWorkgroups().
|
inline |
Definition at line 241 of file hsa_queue_entry.hh.
References _numWgCompleted.
|
inline |
Definition at line 140 of file hsa_queue_entry.hh.
References numSgprs.
Referenced by ComputeUnit::dispWorkgroup(), ComputeUnit::fillKernelState(), ComputeUnit::hasDispResources(), and GPUCommandProcessor::submitDispatchPkt().
|
inline |
Definition at line 134 of file hsa_queue_entry.hh.
References numVgprs.
Referenced by ComputeUnit::dispWorkgroup(), ComputeUnit::fillKernelState(), ComputeUnit::hasDispResources(), and GPUCommandProcessor::submitDispatchPkt().
|
inline |
Definition at line 234 of file hsa_queue_entry.hh.
References _numWg, and MAX_DIM.
Referenced by ComputeUnit::startWavefront().
|
inline |
Definition at line 280 of file hsa_queue_entry.hh.
References numWgArrivedAtBarrier.
|
inline |
Definition at line 247 of file hsa_queue_entry.hh.
References _numWgCompleted.
|
inline |
Definition at line 253 of file hsa_queue_entry.hh.
References _numWgTotal.
|
inline |
Definition at line 313 of file hsa_queue_entry.hh.
References _outstandingInvs.
Referenced by Shader::prepareInvalidate().
|
inline |
Definition at line 360 of file hsa_queue_entry.hh.
References _outstandingWbs.
|
inlineprivate |
set the enable bits for the initial SGPR state
set the enable bits for the initial VGPR state. the workitem Id in the X dimension is always initialized.
Definition at line 379 of file hsa_queue_entry.hh.
References DispatchId, DispatchPtr, AMDKernelCode::enable_sgpr_dispatch_id, AMDKernelCode::enable_sgpr_dispatch_ptr, AMDKernelCode::enable_sgpr_flat_scratch_init, AMDKernelCode::enable_sgpr_grid_workgroup_count_x, AMDKernelCode::enable_sgpr_grid_workgroup_count_y, AMDKernelCode::enable_sgpr_grid_workgroup_count_z, AMDKernelCode::enable_sgpr_kernarg_segment_ptr, AMDKernelCode::enable_sgpr_private_segment_buffer, AMDKernelCode::enable_sgpr_private_segment_size, AMDKernelCode::enable_sgpr_private_segment_wave_byte_offset, AMDKernelCode::enable_sgpr_queue_ptr, AMDKernelCode::enable_sgpr_workgroup_id_x, AMDKernelCode::enable_sgpr_workgroup_id_y, AMDKernelCode::enable_sgpr_workgroup_id_z, AMDKernelCode::enable_sgpr_workgroup_info, AMDKernelCode::enable_vgpr_workitem_id, FlatScratchInit, GridWorkgroupCountX, GridWorkgroupCountY, GridWorkgroupCountZ, initialSgprState, initialVgprState, KernargSegPtr, PrivateSegBuf, PrivateSegSize, PrivSegWaveByteOffset, QueuePtr, WorkgroupIdX, WorkgroupIdY, WorkgroupIdZ, WorkgroupInfo, WorkitemIdX, WorkitemIdY, and WorkitemIdZ.
|
inline |
Definition at line 193 of file hsa_queue_entry.hh.
References _privMemPerItem.
|
inline |
Definition at line 146 of file hsa_queue_entry.hh.
References _queueId.
Referenced by GPUCommandProcessor::initABI(), and GPUCommandProcessor::ReadDispIdOffsetDmaEvent::process().
|
inline |
Definition at line 290 of file hsa_queue_entry.hh.
References initialSgprState.
Referenced by Wavefront::initRegState().
|
inline |
update the number of pending invalidate requests
val: negative to decrement, positive to increment
Definition at line 334 of file hsa_queue_entry.hh.
References _outstandingInvs, and X86ISA::val.
|
inline |
Update the number of pending writeback requests.
val: negative to decrement, positive to increment
Definition at line 371 of file hsa_queue_entry.hh.
References _outstandingWbs, and X86ISA::val.
|
inline |
Definition at line 285 of file hsa_queue_entry.hh.
References initialVgprState.
Referenced by Wavefront::initRegState().
|
inline |
Definition at line 208 of file hsa_queue_entry.hh.
References _wgId, and MAX_DIM.
Referenced by Wavefront::computeActualWgSz(), ComputeUnit::hasDispResources(), and markWgDispatch().
|
inline |
Definition at line 215 of file hsa_queue_entry.hh.
References _wgId, MAX_DIM, and X86ISA::val.
|
inline |
Definition at line 120 of file hsa_queue_entry.hh.
References _wgSize, and MAX_DIM.
Referenced by ComputeUnit::fillKernelState(), ComputeUnit::hasDispResources(), Wavefront::initRegState(), and markWgDispatch().
|
private |
Definition at line 440 of file hsa_queue_entry.hh.
Referenced by completionSignal().
|
private |
Definition at line 464 of file hsa_queue_entry.hh.
Referenced by contextId().
|
private |
Definition at line 434 of file hsa_queue_entry.hh.
Referenced by dispatchId().
|
private |
Definition at line 471 of file hsa_queue_entry.hh.
Referenced by globalWgId(), and markWgDispatch().
|
private |
Definition at line 427 of file hsa_queue_entry.hh.
Referenced by gridSize().
|
private |
Definition at line 438 of file hsa_queue_entry.hh.
Referenced by hostDispPktAddr().
|
private |
Definition at line 462 of file hsa_queue_entry.hh.
Referenced by ldsSize().
|
private |
Definition at line 466 of file hsa_queue_entry.hh.
Referenced by numWg().
|
private |
Definition at line 470 of file hsa_queue_entry.hh.
Referenced by notifyWgCompleted(), and numWgCompleted().
|
private |
Definition at line 467 of file hsa_queue_entry.hh.
Referenced by numWgTotal().
|
private |
Number of outstanding invs for the kernel.
values: -1: initial value, invalidate has not started for the kernel 0: 1)-1->0, about to start (a transient state, added in the same cycle) 2)+1->0, all inv requests are finished, i.e., invalidate done ?: positive value, indicating the number of pending inv requests
Definition at line 453 of file hsa_queue_entry.hh.
Referenced by isInvDone(), isInvStarted(), markInvDone(), outstandingInvs(), and updateOutstandingInvs().
|
private |
Number of outstanding wbs for the kernel values: 0: 1)initial value, flush has not started for the kernel 2)+1->0: all wb requests are finished, i.e., flush done ?: positive value, indicating the number of pending wb requests.
Definition at line 461 of file hsa_queue_entry.hh.
Referenced by outstandingWbs(), and updateOutstandingWbs().
|
private |
Definition at line 463 of file hsa_queue_entry.hh.
Referenced by privMemPerItem().
|
private |
Definition at line 433 of file hsa_queue_entry.hh.
Referenced by queueId().
|
private |
Definition at line 465 of file hsa_queue_entry.hh.
Referenced by markWgDispatch(), and wgId().
|
private |
Definition at line 425 of file hsa_queue_entry.hh.
Referenced by wgSize().
_amd_queue_t HSAQueueEntry::amdQueue |
Keep a copy of the AMD HSA queue because we need info from some of its fields to initialize register state.
Definition at line 306 of file hsa_queue_entry.hh.
Referenced by Wavefront::initRegState(), and GPUCommandProcessor::ReadDispIdOffsetDmaEvent::process().
|
private |
Definition at line 442 of file hsa_queue_entry.hh.
Referenced by codeAddr().
|
private |
Definition at line 472 of file hsa_queue_entry.hh.
Referenced by dispComplete(), and markWgDispatch().
|
private |
Definition at line 436 of file hsa_queue_entry.hh.
Referenced by dispPktPtr().
Addr HSAQueueEntry::hostAMDQueueAddr |
Host-side addr of the amd_queue_t on which this task was queued.
Definition at line 299 of file hsa_queue_entry.hh.
Referenced by Wavefront::initRegState(), and GPUCommandProcessor::ReadDispIdOffsetDmaEvent::process().
|
private |
Definition at line 475 of file hsa_queue_entry.hh.
Referenced by parseKernelCode(), and sgprBitEnabled().
|
private |
Definition at line 474 of file hsa_queue_entry.hh.
Referenced by parseKernelCode(), and vgprBitEnabled().
|
private |
Definition at line 444 of file hsa_queue_entry.hh.
Referenced by kernargAddr().
|
private |
Definition at line 423 of file hsa_queue_entry.hh.
Referenced by kernelName().
|
static |
Definition at line 309 of file hsa_queue_entry.hh.
Referenced by Wavefront::computeActualWgSz(), gridSize(), ComputeUnit::hasDispResources(), numWg(), wgId(), and wgSize().
|
private |
Definition at line 431 of file hsa_queue_entry.hh.
Referenced by numScalarRegs().
|
private |
Definition at line 429 of file hsa_queue_entry.hh.
Referenced by numVectorRegs().
|
private |
Definition at line 468 of file hsa_queue_entry.hh.
Referenced by numWgAtBarrier().