gem5  v22.0.0.2
Topology.hh
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29 
30 /*
31  * The topology here is configurable; it can be a hierachical (default
32  * one) or a 2D torus or a 2D torus with half switches killed. I think
33  * all input port has a one-input-one-output switch connected just to
34  * control and bandwidth, since we don't control bandwidth on input
35  * ports. Basically, the class has a vector of nodes and edges. First
36  * 2*m_nodes elements in the node vector are input and output
37  * ports. Edges are represented in two vectors of src and dest
38  * nodes. All edges have latency.
39  */
40 
41 #ifndef __MEM_RUBY_NETWORK_TOPOLOGY_HH__
42 #define __MEM_RUBY_NETWORK_TOPOLOGY_HH__
43 
44 #include <iostream>
45 #include <vector>
46 
49 #include "mem/ruby/protocol/LinkDirection.hh"
50 
51 namespace gem5
52 {
53 
54 namespace ruby
55 {
56 
57 class NetDest;
58 class Network;
59 
60 /*
61  * We use a three-dimensional vector matrix for calculating
62  * the shortest paths for each pair of source and destination
63  * and for each type of virtual network. The three dimensions
64  * represent the source ID, destination ID, and vnet number.
65  */
67 
68 struct LinkEntry
69 {
73 };
74 
75 typedef std::map<std::pair<SwitchID, SwitchID>,
77 
78 class Topology
79 {
80  public:
81  Topology(uint32_t num_nodes, uint32_t num_routers, uint32_t num_vnets,
82  const std::vector<BasicExtLink *> &ext_links,
83  const std::vector<BasicIntLink *> &int_links);
84 
85  uint32_t numSwitches() const { return m_number_of_switches; }
86  void createLinks(Network *net);
87  void print(std::ostream& out) const { out << "[Topology]"; }
88 
89  private:
90  void addLink(SwitchID src, SwitchID dest, BasicLink* link,
91  PortDirection src_outport_dirn = "",
92  PortDirection dest_inport_dirn = "");
93  void makeLink(Network *net, SwitchID src, SwitchID dest,
94  std::vector<NetDest>& routing_table_entry);
95 
96  // Helper functions based on chapter 29 of Cormen et al.
97  void extend_shortest_path(Matrix &current_dist, Matrix &latencies,
98  Matrix &inter_switches);
99 
100  Matrix shortest_path(const Matrix &weights,
101  Matrix &latencies, Matrix &inter_switches);
102 
104  SwitchID final, const Matrix &weights, const Matrix &dist,
105  int vnet);
106 
108  const Matrix &weights, const Matrix &dist,
109  int vnet);
110 
111  const uint32_t m_nodes;
112  const uint32_t m_number_of_switches;
113  int m_vnets;
114 
117 
119 };
120 
121 inline std::ostream&
122 operator<<(std::ostream& out, const Topology& obj)
123 {
124  obj.print(out);
125  out << std::flush;
126  return out;
127 }
128 
129 } // namespace ruby
130 } // namespace gem5
131 
132 #endif // __MEM_RUBY_NETWORK_TOPOLOGY_HH__
gem5::ruby::LinkEntry::link
BasicLink * link
Definition: Topology.hh:70
gem5::ruby::PortDirection
std::string PortDirection
Definition: TypeDefines.hh:44
gem5::ruby::LinkEntry
Definition: Topology.hh:68
gem5::ruby::Topology
Definition: Topology.hh:78
gem5::ruby::LinkMap
std::map< std::pair< SwitchID, SwitchID >, std::vector< LinkEntry > > LinkMap
Definition: Topology.hh:76
gem5::ruby::operator<<
std::ostream & operator<<(std::ostream &os, const BoolVec &myvector)
Definition: BoolVec.cc:49
gem5::ruby::Matrix
std::vector< std::vector< std::vector< int > > > Matrix
Definition: Topology.hh:58
gem5::ruby::Topology::m_int_link_vector
std::vector< BasicIntLink * > m_int_link_vector
Definition: Topology.hh:116
gem5::ruby::Topology::addLink
void addLink(SwitchID src, SwitchID dest, BasicLink *link, PortDirection src_outport_dirn="", PortDirection dest_inport_dirn="")
Definition: Topology.cc:218
gem5::ruby::Network
Definition: Network.hh:82
gem5::ruby::Topology::createLinks
void createLinks(Network *net)
Definition: Topology.cc:115
gem5::ruby::Topology::Topology
Topology(uint32_t num_nodes, uint32_t num_routers, uint32_t num_vnets, const std::vector< BasicExtLink * > &ext_links, const std::vector< BasicIntLink * > &int_links)
Definition: Topology.cc:56
std::vector
STL vector class.
Definition: stl.hh:37
gem5::statistics::dist
const FlagsType dist
Print the distribution.
Definition: info.hh:66
gem5::ruby::Topology::shortest_path_to_node
NetDest shortest_path_to_node(SwitchID src, SwitchID next, const Matrix &weights, const Matrix &dist, int vnet)
Definition: Topology.cc:412
gem5::ruby::Topology::extend_shortest_path
void extend_shortest_path(Matrix &current_dist, Matrix &latencies, Matrix &inter_switches)
Definition: Topology.cc:336
gem5::ruby::Topology::numSwitches
uint32_t numSwitches() const
Definition: Topology.hh:85
TypeDefines.hh
gem5::ruby::Topology::print
void print(std::ostream &out) const
Definition: Topology.hh:87
gem5::ruby::Topology::m_nodes
const uint32_t m_nodes
Definition: Topology.hh:111
gem5::ruby::LinkEntry::src_outport_dirn
PortDirection src_outport_dirn
Definition: Topology.hh:71
gem5::ruby::LinkEntry::dst_inport_dirn
PortDirection dst_inport_dirn
Definition: Topology.hh:72
gem5::ruby::SwitchID
unsigned int SwitchID
Definition: TypeDefines.hh:43
gem5::ruby::Topology::makeLink
void makeLink(Network *net, SwitchID src, SwitchID dest, std::vector< NetDest > &routing_table_entry)
Definition: Topology.cc:250
gem5::ruby::NetDest
Definition: NetDest.hh:45
gem5::ruby::Topology::m_number_of_switches
const uint32_t m_number_of_switches
Definition: Topology.hh:112
gem5::ruby::Topology::m_vnets
int m_vnets
Definition: Topology.hh:113
gem5::ruby::Topology::shortest_path
Matrix shortest_path(const Matrix &weights, Matrix &latencies, Matrix &inter_switches)
Definition: Topology.cc:394
gem5::ruby::Topology::link_is_shortest_path_to_node
bool link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final, const Matrix &weights, const Matrix &dist, int vnet)
Definition: Topology.cc:403
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::ruby::Topology::m_link_map
LinkMap m_link_map
Definition: Topology.hh:118
gem5::ruby::Topology::m_ext_link_vector
std::vector< BasicExtLink * > m_ext_link_vector
Definition: Topology.hh:115

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