gem5 v24.0.0.0
Loading...
Searching...
No Matches
base_set_assoc.hh
Go to the documentation of this file.
1/*
2 * Copyright (c) 2012-2014, 2017, 2023-2024 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005,2014 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 */
40
46#ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
47#define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
48
49#include <cstdint>
50#include <functional>
51#include <string>
52#include <vector>
53
54#include "base/logging.hh"
55#include "base/types.hh"
56#include "mem/cache/base.hh"
63#include "mem/packet.hh"
64#include "params/BaseSetAssoc.hh"
65
66namespace gem5
67{
68
76class BaseSetAssoc : public BaseTags
77{
78 protected:
80 unsigned allocAssoc;
81
84
86 const bool sequentialAccess;
87
90
91 public:
93 typedef BaseSetAssocParams Params;
94
98 BaseSetAssoc(const Params &p);
99
103 virtual ~BaseSetAssoc() {};
104
108 void tagsInit() override;
109
116 void invalidate(CacheBlk *blk) override;
117
128 CacheBlk* accessBlock(const PacketPtr pkt, Cycles &lat) override
129 {
130 CacheBlk *blk = findBlock(pkt->getAddr(), pkt->isSecure());
131
132 // Access all tags in parallel, hence one in each way. The data side
133 // either accesses all blocks in parallel, or one block sequentially on
134 // a hit. Sequential access with a miss doesn't access data.
136 if (sequentialAccess) {
137 if (blk != nullptr) {
138 stats.dataAccesses += 1;
139 }
140 } else {
142 }
143
144 // If a cache hit
145 if (blk != nullptr) {
146 // Update number of references to accessed block
147 blk->increaseRefCount();
148
149 // Update replacement data of accessed block
151 }
152
153 // The tag lookup latency is the same for a hit or a miss
154 lat = lookupLatency;
155
156 return blk;
157 }
158
170 CacheBlk* findVictim(Addr addr, const bool is_secure,
171 const std::size_t size,
172 std::vector<CacheBlk*>& evict_blks,
173 const uint64_t partition_id=0) override
174 {
175 // Get possible entries to be victimized
178
179 // Filter entries based on PartitionID
180 if (partitionManager) {
181 partitionManager->filterByPartition(entries, partition_id);
182 }
183
184 // Choose replacement victim from replacement candidates
185 CacheBlk* victim = entries.empty() ? nullptr :
186 static_cast<CacheBlk*>(replacementPolicy->getVictim(entries));
187
188 // There is only one eviction for this replacement
189 evict_blks.push_back(victim);
190
191 return victim;
192 }
193
200 void insertBlock(const PacketPtr pkt, CacheBlk *blk) override
201 {
202 // Insert block
203 BaseTags::insertBlock(pkt, blk);
204
205 // Increment tag counter
207
208 if (partitionManager) {
209 auto partition_id = partitionManager->readPacketPartitionID(pkt);
210 partitionManager->notifyAcquire(partition_id);
211 }
212
213 // Update replacement policy
215 }
216
217 void moveBlock(CacheBlk *src_blk, CacheBlk *dest_blk) override;
218
223 virtual void setWayAllocationMax(int ways) override
224 {
225 fatal_if(ways < 1, "Allocation limit must be greater than zero");
226 allocAssoc = ways;
227 }
228
233 virtual int getWayAllocationMax() const override
234 {
235 return allocAssoc;
236 }
237
244 Addr regenerateBlkAddr(const CacheBlk* blk) const override
245 {
246 return indexingPolicy->regenerateAddr(blk->getTag(), blk);
247 }
248
249 bool anyBlk(std::function<bool(CacheBlk &)> visitor) override {
250 for (CacheBlk& blk : blks) {
251 if (visitor(blk)) {
252 return true;
253 }
254 }
255 return false;
256 }
257};
258
259} // namespace gem5
260
261#endif //__MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Definitions of a simple cache block class.
virtual Addr regenerateAddr(const Addr tag, const ReplaceableEntry *entry) const =0
Regenerate an entry's address from its tag and assigned indexing bits.
virtual std::vector< ReplaceableEntry * > getPossibleEntries(const Addr addr) const =0
Find all possible entries for insertion and replacement of an address.
A basic cache tag store.
std::vector< CacheBlk > blks
The cache blocks.
void insertBlock(const PacketPtr pkt, CacheBlk *blk) override
Insert the new block into the cache and update replacement data.
const bool sequentialAccess
Whether tags and data are accessed sequentially.
virtual int getWayAllocationMax() const override
Get the way allocation mask limit.
void invalidate(CacheBlk *blk) override
This function updates the tags when a block is invalidated.
BaseSetAssoc(const Params &p)
Construct and initialize this tag store.
CacheBlk * findVictim(Addr addr, const bool is_secure, const std::size_t size, std::vector< CacheBlk * > &evict_blks, const uint64_t partition_id=0) override
Find replacement victim based on address.
virtual ~BaseSetAssoc()
Destructor.
unsigned allocAssoc
The allocatable associativity of the cache (alloc mask).
void moveBlock(CacheBlk *src_blk, CacheBlk *dest_blk) override
Move a block's metadata to another location decided by the replacement policy.
bool anyBlk(std::function< bool(CacheBlk &)> visitor) override
Find if any of the blocks satisfies a condition.
BaseSetAssocParams Params
Convenience typedef.
CacheBlk * accessBlock(const PacketPtr pkt, Cycles &lat) override
Access block and update replacement data.
replacement_policy::Base * replacementPolicy
Replacement policy.
Addr regenerateBlkAddr(const CacheBlk *blk) const override
Regenerate the block address from the tag and indexing location.
virtual void setWayAllocationMax(int ways) override
Limit the allocation for the cache ways.
void tagsInit() override
Initialize blocks as CacheBlk instances.
A common base class of Cache tagstore objects.
Definition base.hh:74
partitioning_policy::PartitionManager * partitionManager
Partitioning manager.
Definition base.hh:92
virtual void insertBlock(const PacketPtr pkt, CacheBlk *blk)
Insert the new block into the cache and update stats.
Definition base.cc:104
virtual CacheBlk * findBlock(Addr addr, bool is_secure) const
Finds the block in the cache without touching it.
Definition base.cc:82
const unsigned size
The size of the cache.
Definition base.hh:81
gem5::BaseTags::BaseTagStats stats
BaseIndexingPolicy * indexingPolicy
Indexing policy.
Definition base.hh:89
const Cycles lookupLatency
The tag lookup latency of the cache.
Definition base.hh:83
A Basic Cache block.
Definition cache_blk.hh:72
void increaseRefCount()
Get the number of references to this block since insertion.
Definition cache_blk.hh:300
virtual Addr getTag() const
Get tag associated to this block.
Cycles is a wrapper class for representing cycle counts, i.e.
Definition types.hh:79
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
bool isSecure() const
Definition packet.hh:836
Addr getAddr() const
Definition packet.hh:807
std::shared_ptr< replacement_policy::ReplacementData > replacementData
Replacement data associated to this entry.
void filterByPartition(std::vector< ReplaceableEntry * > &entries, const uint64_t partition_id) const
void notifyAcquire(uint64_t partition_id)
Notify of acquisition of ownership of a cache line.
virtual uint64_t readPacketPartitionID(PacketPtr pkt) const
PartitionManager interface to retrieve PartitionID from a packet; This base implementation returns ze...
A common base class of cache replacement policy objects.
Definition base.hh:55
virtual void reset(const std::shared_ptr< ReplacementData > &replacement_data, const PacketPtr pkt)
Reset replacement data.
Definition base.hh:89
virtual void touch(const std::shared_ptr< ReplacementData > &replacement_data, const PacketPtr pkt)
Update replacement data.
Definition base.hh:75
virtual ReplaceableEntry * getVictim(const ReplacementCandidates &candidates) const =0
Find replacement victim among candidates.
STL vector class.
Definition stl.hh:37
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition logging.hh:236
Declares a basic cache interface BaseCache.
Declaration of a common base class for cache tagstore objects.
Declaration of a common framework for indexing policies.
Bitfield< 0 > p
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
Declaration of the Packet class.
statistics::Scalar tagAccesses
Number of tags consulted over all accesses.
Definition base.hh:158
statistics::Scalar dataAccesses
Number of data blocks consulted over all accesses.
Definition base.hh:160
statistics::Average tagsInUse
Per tick average of the number of tags that hold valid data.
Definition base.hh:121

Generated on Tue Jun 18 2024 16:24:05 for gem5 by doxygen 1.11.0