base_set_assoc.hh

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#ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
#define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
 
#include <cstdint>
#include <functional>
#include <string>
#include <vector>
 
#include "base/logging.hh"
#include "base/types.hh"
#include "mem/cache/base.hh"
#include "mem/cache/cache_blk.hh"
#include "mem/cache/replacement_policies/base.hh"
#include "mem/cache/replacement_policies/replaceable_entry.hh"
#include "mem/cache/tags/base.hh"
#include "mem/cache/tags/indexing_policies/base.hh"
#include "mem/packet.hh"
#include "params/BaseSetAssoc.hh"
 
namespace gem5
{
 
class BaseSetAssoc : public BaseTags
{
  protected:
    unsigned allocAssoc;
 
    std::vector<CacheBlk> blks;
 
    const bool sequentialAccess;
 
    replacement_policy::Base *replacementPolicy;
 
  public:
     typedef BaseSetAssocParams Params;
 
    BaseSetAssoc(const Params &p);
 
    virtual ~BaseSetAssoc() {};
 
    void tagsInit() override;
 
    void invalidate(CacheBlk *blk) override;
 
    CacheBlk* accessBlock(const PacketPtr pkt, Cycles &lat) override
    {
        CacheBlk *blk = findBlock(pkt->getAddr(), pkt->isSecure());
 
        // Access all tags in parallel, hence one in each way.  The data side
        // either accesses all blocks in parallel, or one block sequentially on
        // a hit.  Sequential access with a miss doesn't access data.
        stats.tagAccesses += allocAssoc;
        if (sequentialAccess) {
            if (blk != nullptr) {
                stats.dataAccesses += 1;
            }
        } else {
            stats.dataAccesses += allocAssoc;
        }
 
        // If a cache hit
        if (blk != nullptr) {
            // Update number of references to accessed block
            blk->increaseRefCount();
 
            // Update replacement data of accessed block
            replacementPolicy->touch(blk->replacementData, pkt);
        }
 
        // The tag lookup latency is the same for a hit or a miss
        lat = lookupLatency;
 
        return blk;
    }
 
    CacheBlk* findVictim(Addr addr, const bool is_secure,
                         const std::size_t size,
                         std::vector<CacheBlk*>& evict_blks) override
    {
        // Get possible entries to be victimized
        const std::vector<ReplaceableEntry*> entries =
            indexingPolicy->getPossibleEntries(addr);
 
        // Choose replacement victim from replacement candidates
        CacheBlk* victim = static_cast<CacheBlk*>(replacementPolicy->getVictim(
                                entries));
 
        // There is only one eviction for this replacement
        evict_blks.push_back(victim);
 
        return victim;
    }
 
    void insertBlock(const PacketPtr pkt, CacheBlk *blk) override
    {
        // Insert block
        BaseTags::insertBlock(pkt, blk);
 
        // Increment tag counter
        stats.tagsInUse++;
 
        // Update replacement policy
        replacementPolicy->reset(blk->replacementData, pkt);
    }
 
    void moveBlock(CacheBlk *src_blk, CacheBlk *dest_blk) override;
 
    virtual void setWayAllocationMax(int ways) override
    {
        fatal_if(ways < 1, "Allocation limit must be greater than zero");
        allocAssoc = ways;
    }
 
    virtual int getWayAllocationMax() const override
    {
        return allocAssoc;
    }
 
    Addr regenerateBlkAddr(const CacheBlk* blk) const override
    {
        return indexingPolicy->regenerateAddr(blk->getTag(), blk);
    }
 
    void forEachBlk(std::function<void(CacheBlk &)> visitor) override {
        for (CacheBlk& blk : blks) {
            visitor(blk);
        }
    }
 
    bool anyBlk(std::function<bool(CacheBlk &)> visitor) override {
        for (CacheBlk& blk : blks) {
            if (visitor(blk)) {
                return true;
            }
        }
        return false;
    }
};
 
} // namespace gem5
 
#endif //__MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__