gem5::MipsISA::MipsFaultBase Class Reference

#include <faults.hh>

Inheritance diagram for gem5::MipsISA::MipsFaultBase:

Classes
struct	FaultVals

Public Member Functions
void	setExceptionState (ThreadContext *, uint8_t)
virtual FaultVect	offset (ThreadContext *tc) const =0
virtual ExcCode	code () const =0
virtual FaultVect	base (ThreadContext *tc) const
FaultVect	vect (ThreadContext *tc) const
void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
Public Member Functions inherited from gem5::FaultBase
virtual FaultName	name () const =0
virtual	~FaultBase ()

Detailed Description

Definition at line 76 of file faults.hh.

Member Function Documentation

base()

virtual FaultVect gem5::MipsISA::MipsFaultBase::base ( ThreadContext *  tc ) const

inlinevirtual

Definition at line 90 of file faults.hh.

References gem5::MipsISA::misc_reg::Ebase, gem5::ThreadContext::readMiscReg(), gem5::ArmISA::status, and gem5::MipsISA::misc_reg::Status.

Referenced by vect().

code()

virtual ExcCode gem5::MipsISA::MipsFaultBase::code ( ) const

pure virtual

Implemented in gem5::MipsISA::TlbModifiedFault, gem5::MipsISA::TlbFault< T >, gem5::MipsISA::TlbFault< TlbRefillFault >, gem5::MipsISA::TlbFault< TlbModifiedFault >, gem5::MipsISA::TlbFault< TlbInvalidFault >, gem5::MipsISA::AddressErrorFault, gem5::MipsISA::MipsFault< T >, gem5::MipsISA::MipsFault< IntegerOverflowFault >, gem5::MipsISA::MipsFault< SoftResetFault >, gem5::MipsISA::MipsFault< TrapFault >, gem5::MipsISA::MipsFault< DspStateDisabledFault >, gem5::MipsISA::MipsFault< NonMaskableInterrupt >, gem5::MipsISA::MipsFault< MachineCheckFault >, gem5::MipsISA::MipsFault< ThreadFault >, gem5::MipsISA::MipsFault< CoprocessorUnusableFault >, gem5::MipsISA::MipsFault< ResetFault >, gem5::MipsISA::MipsFault< ReservedInstructionFault >, gem5::MipsISA::MipsFault< BreakpointFault >, gem5::MipsISA::MipsFault< InterruptFault >, and gem5::MipsISA::MipsFault< SystemCallFault >.

Referenced by invoke().

invoke()

void gem5::MipsISA::MipsFaultBase::invoke ( ThreadContext *  tc, const StaticInstPtr &  inst = nullStaticInstPtr  )

virtual

Reimplemented from gem5::FaultBase.

Reimplemented in gem5::MipsISA::TlbFault< T >, gem5::MipsISA::TlbFault< TlbRefillFault >, gem5::MipsISA::TlbFault< TlbModifiedFault >, gem5::MipsISA::TlbFault< TlbInvalidFault >, gem5::MipsISA::AddressFault< T >, gem5::MipsISA::AddressFault< AddressErrorFault >, gem5::MipsISA::CoprocessorUnusableFault, gem5::MipsISA::NonMaskableInterrupt, gem5::MipsISA::SoftResetFault, and gem5::MipsISA::ResetFault.

Definition at line 132 of file faults.cc.

References code(), DPRINTF, gem5::FullSystem, gem5::FaultBase::name(), panic, gem5::ThreadContext::pcState(), setExceptionState(), and vect().

Referenced by gem5::MipsISA::CoprocessorUnusableFault::invoke(), and gem5::MipsISA::AddressFault< T >::invoke().

offset()

virtual FaultVect gem5::MipsISA::MipsFaultBase::offset ( ThreadContext *  tc ) const

pure virtual

Implemented in gem5::MipsISA::TlbRefillFault, gem5::MipsISA::InterruptFault, gem5::MipsISA::MipsFault< T >, gem5::MipsISA::MipsFault< IntegerOverflowFault >, gem5::MipsISA::MipsFault< SoftResetFault >, gem5::MipsISA::MipsFault< TrapFault >, gem5::MipsISA::MipsFault< DspStateDisabledFault >, gem5::MipsISA::MipsFault< NonMaskableInterrupt >, gem5::MipsISA::MipsFault< MachineCheckFault >, gem5::MipsISA::MipsFault< ThreadFault >, gem5::MipsISA::MipsFault< CoprocessorUnusableFault >, gem5::MipsISA::MipsFault< ResetFault >, gem5::MipsISA::MipsFault< ReservedInstructionFault >, gem5::MipsISA::MipsFault< BreakpointFault >, gem5::MipsISA::MipsFault< InterruptFault >, and gem5::MipsISA::MipsFault< SystemCallFault >.

Referenced by vect().

setExceptionState()

void gem5::MipsISA::MipsFaultBase::setExceptionState	(	ThreadContext *	tc,
		uint8_t	excCode
	)

Definition at line 100 of file faults.cc.

References gem5::PCStateBase::as(), gem5::MipsISA::misc_reg::Cause, DPRINTF, gem5::MipsISA::misc_reg::Epc, gem5::MipsISA::excCode, gem5::MipsISA::pc, gem5::ThreadContext::pcState(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::setMiscRegNoEffect(), gem5::MipsISA::misc_reg::Srsctl, gem5::ArmISA::status, and gem5::MipsISA::misc_reg::Status.

Referenced by invoke(), and gem5::MipsISA::TlbFault< T >::setTlbExceptionState().

vect()

FaultVect gem5::MipsISA::MipsFaultBase::vect ( ThreadContext *  tc ) const

inline

Definition at line 100 of file faults.hh.

References base(), and offset().

Referenced by invoke(), gem5::MipsISA::ResetFault::invoke(), and gem5::MipsISA::TlbFault< T >::invoke().

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The documentation for this class was generated from the following files:

• arch/mips/faults.hh
• arch/mips/faults.cc