gem5 v24.1.0.1
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Public Member Functions | |
Registers (const std::string &, Iris::BaseCPU *, CorePins *) | |
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void | setDebugFlag (const ::gem5::debug::SimpleFlag &flag) |
constexpr | RegisterBank (const std::string &new_name, Addr new_base) |
virtual | ~RegisterBank () |
void | addRegisters (std::initializer_list< RegisterAdder > adders) |
void | addRegistersAt (std::initializer_list< RegisterAdder > adders) |
void | addRegister (RegisterAdder reg) |
Addr | base () const |
Addr | size () const |
const std::string & | name () const |
virtual void | read (Addr addr, void *buf, Addr bytes) |
virtual void | write (Addr addr, const void *buf, Addr bytes) |
virtual void | reset () |
Private Attributes | |
Iris::BaseCPU * | cpu |
CorePins * | pins |
Register64 | nsrvbar |
Register64 | rvbar |
Register32 | reset |
Register32 | halt |
Additional Inherited Members | |
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using | Register8 = Register< uint8_t > |
using | Register8LE = Register< uint8_t, ByteOrder::little > |
using | Register8BE = Register< uint8_t, ByteOrder::big > |
using | Register16 = Register< uint16_t > |
using | Register16LE = Register< uint16_t, ByteOrder::little > |
using | Register16BE = Register< uint16_t, ByteOrder::big > |
using | Register32 = Register< uint32_t > |
using | Register32LE = Register< uint32_t, ByteOrder::little > |
using | Register32BE = Register< uint32_t, ByteOrder::big > |
using | Register64 = Register< uint64_t > |
using | Register64LE = Register< uint64_t, ByteOrder::little > |
using | Register64BE = Register< uint64_t, ByteOrder::big > |
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static constexpr Data | readWithMask (const Data &value, const Data &bitmask) |
static constexpr Data | writeWithMask (const Data &old, const Data &value, const Data &bitmask) |
Definition at line 57 of file example.hh.
gem5::fastmodel::ResetControllerExample::Registers::Registers | ( | const std::string & | module_name, |
Iris::BaseCPU * | c, | ||
CorePins * | p | ||
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Definition at line 44 of file example.cc.
References gem5::RegisterBank< ByteOrder::little >::addRegisters(), cpu, gem5::fastmodel::ResetControllerExample::CorePins::halt, halt, gem5::Port::isConnected(), gem5::Port::name(), nsrvbar, panic_if, pins, gem5::X86ISA::reg, gem5::fastmodel::ResetControllerExample::CorePins::reset, reset, rvbar, gem5::SignalSourcePort< State >::set(), gem5::Iris::BaseCPU::setResetAddr(), and gem5::X86ISA::val.
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private |
Definition at line 60 of file example.hh.
Referenced by Registers().
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private |
Definition at line 66 of file example.hh.
Referenced by Registers().
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private |
Definition at line 63 of file example.hh.
Referenced by Registers().
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private |
Definition at line 61 of file example.hh.
Referenced by Registers().
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private |
Definition at line 65 of file example.hh.
Referenced by Registers().
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private |
Definition at line 64 of file example.hh.
Referenced by Registers().