gem5  v22.0.0.2
example.cc
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27 
29 
30 #include <algorithm>
31 
32 #include "base/logging.hh"
33 
34 namespace gem5
35 {
36 namespace fastmodel
37 {
38 
39 ResetControllerExample::CorePins::CorePins(const std::string &module_name)
40  : reset(module_name + ".reset", 0, this),
41  halt(module_name + ".halt", 0, this)
42 {}
43 
45  const std::string &module_name, Iris::BaseCPU *c, CorePins *p)
46  : RegisterBankLE(module_name, 0), cpu(c), pins(p),
47  nsrvbar(module_name + ".nsrvbar"),
48  rvbar(module_name + ".rvbar"),
49  reset(module_name + ".reset"),
50  halt(module_name + ".halt")
51 {
52  panic_if(cpu == nullptr, "ResetControllerExample needs a target cpu.");
53  nsrvbar.writer(
54  [this] (auto &reg, auto val)
55  {
56  cpu->setResetAddr(val, false);
57  });
58  rvbar.writer(
59  [this] (auto &reg, auto val)
60  {
61  cpu->setResetAddr(val, true);
62  });
63  reset.writer(
64  [this] (auto &reg, auto val)
65  {
67  "%s is not connected.", pins->reset.name());
68 
69  if (val)
70  pins->reset.raise();
71  else
72  pins->reset.lower();
73  });
74  halt.writer(
75  [this] (auto &reg, auto val)
76  {
78  "%s is not connected.", pins->halt.name());
79 
80  if (val)
81  pins->halt.raise();
82  else
83  pins->halt.lower();
84  });
85 
86  addRegisters({
87  nsrvbar,
88  rvbar,
89  reset,
90  halt,
91  });
92 }
93 
95  : BasicPioDevice(p, 0x20),
96  pins(p.name + ".pins"),
97  registers(p.name + ".registers", p.cpu, &pins)
98 {}
99 
100 Tick
102 {
103  pkt->makeResponse();
104  auto data = pkt->getPtr<uint8_t>();
105  auto size = pkt->getSize();
106  std::fill(data, data + size, 0);
107  return pioDelay;
108 }
109 
110 Tick
112 {
113  pkt->makeResponse();
114  size_t size = pkt->getSize();
115  if (size != 4 && size != 8) {
116  pkt->setBadAddress();
117  } else {
118  auto addr = pkt->getAddr() - pioAddr;
119  registers.write(addr, pkt->getPtr<void>(), size);
120  }
121  return pioDelay;
122 }
123 
124 Port &
125 ResetControllerExample::getPort(const std::string &if_name, PortID idx)
126 {
127  if (if_name == "reset")
128  return pins.reset;
129  else if (if_name == "halt")
130  return pins.halt;
131 
132  return BasicPioDevice::getPort(if_name, idx);
133 }
134 
135 } // namespace fastmodel
136 } // namespace gem5
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:245
gem5::MipsISA::fill
fill
Definition: pra_constants.hh:57
gem5::BasicPioDevice::pioAddr
Addr pioAddr
Address that the device listens to.
Definition: io_device.hh:151
gem5::Port::name
const std::string name() const
Return port name (for DPRINTF).
Definition: port.hh:111
data
const char data[]
Definition: circlebuf.test.cc:48
gem5::Iris::BaseCPU::setResetAddr
virtual void setResetAddr(Addr addr, bool secure=false)
Definition: cpu.hh:91
gem5::fastmodel::ResetControllerExample::ResetControllerExample
ResetControllerExample(const Params &)
Definition: example.cc:94
example.hh
gem5::fastmodel::ResetControllerExample::Params
FastModelResetControllerExampleParams Params
Definition: example.hh:77
gem5::Iris::BaseCPU
Definition: cpu.hh:61
gem5::Packet::setBadAddress
void setBadAddress()
Definition: packet.hh:782
gem5::fastmodel::ResetControllerExample::Registers::reset
Register32 reset
Definition: example.hh:66
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
gem5::fastmodel::ResetControllerExample::Registers::Registers
Registers(const std::string &, Iris::BaseCPU *, CorePins *)
Definition: example.cc:44
gem5::RegisterBank::write
virtual void write(Addr addr, const void *buf, Addr bytes)
Definition: reg_bank.hh:884
gem5::RegisterBank< ByteOrder::little >::addRegisters
void addRegisters(std::initializer_list< std::reference_wrapper< RegisterBase >> regs)
Definition: reg_bank.hh:809
gem5::IntSourcePinBase::raise
void raise()
Definition: intpin.hh:104
gem5::fastmodel::ResetControllerExample::CorePins::reset
CoreInt reset
Definition: example.hh:52
gem5::VegaISA::c
Bitfield< 2 > c
Definition: pagetable.hh:63
gem5::fastmodel::ResetControllerExample::Registers::cpu
Iris::BaseCPU * cpu
Definition: example.hh:61
gem5::fastmodel::ResetControllerExample::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: example.cc:111
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::VegaISA::p
Bitfield< 54 > p
Definition: pagetable.hh:70
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
gem5::fastmodel::ResetControllerExample::CorePins::halt
CoreInt halt
Definition: example.hh:53
gem5::IntSourcePinBase::lower
void lower()
Definition: intpin.hh:105
gem5::fastmodel::ResetControllerExample::getPort
Port & getPort(const std::string &, PortID=InvalidPortID) override
Get a port with a given name and index.
Definition: example.cc:125
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::fastmodel::ResetControllerExample::registers
Registers registers
Definition: example.hh:74
gem5::statistics::reset
void reset()
Definition: statistics.cc:310
gem5::BasicPioDevice::pioDelay
Tick pioDelay
Delay that the device experinces on an access.
Definition: io_device.hh:157
gem5::MipsISA::halt
Bitfield< 26 > halt
Definition: dt_constants.hh:47
gem5::Port::isConnected
bool isConnected() const
Is this port currently connected to a peer?
Definition: port.hh:133
gem5::fastmodel::ResetControllerExample::CorePins::CorePins
CorePins(const std::string &)
Definition: example.cc:39
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:92
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:204
gem5::fastmodel::ResetControllerExample::pins
CorePins pins
Definition: example.hh:73
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::Packet::makeResponse
void makeResponse()
Take a request packet and modify it in place to be suitable for returning as a response to that reque...
Definition: packet.hh:1044
gem5::fastmodel::ResetControllerExample::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: example.cc:101
gem5::fastmodel::ResetControllerExample::Registers::pins
CorePins * pins
Definition: example.hh:62
gem5::RegisterBank< ByteOrder::little >
logging.hh
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:790
gem5::fastmodel::ResetControllerExample::Registers::rvbar
Register64 rvbar
Definition: example.hh:65
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::BasicPioDevice
Definition: io_device.hh:147
gem5::fastmodel::ResetControllerExample::CorePins
Definition: example.hh:49
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:800
gem5::fastmodel::ResetControllerExample::Registers::halt
Register32 halt
Definition: example.hh:67
gem5::fastmodel::ResetControllerExample::Registers::nsrvbar
Register64 nsrvbar
Definition: example.hh:64
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::PioDevice::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: io_device.cc:67
gem5::Packet::getPtr
T * getPtr()
get a pointer to the data ptr.
Definition: packet.hh:1197

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