gem5  v22.0.0.2
Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
gem5::Iris::BaseCPU Class Reference

#include <cpu.hh>

Inheritance diagram for gem5::Iris::BaseCPU:
gem5::Iris::CPU< CortexA76TC > gem5::Iris::CPU< CortexR52TC > gem5::Iris::CPU< TC > gem5::fastmodel::CortexA76 gem5::fastmodel::CortexR52

Public Member Functions

 BaseCPU (const BaseCPUParams &params, sc_core::sc_module *_evs)
 
virtual ~BaseCPU ()
 
PortgetDataPort () override
 
PortgetInstPort () override
 
void wakeup (ThreadID tid) override
 
Counter totalInsts () const override
 
Counter totalOps () const override
 
virtual void setResetAddr (Addr addr, bool secure=false)
 

Protected Member Functions

void clockPeriodUpdated () override
 
void serializeThread (CheckpointOut &cp, ThreadID tid) const override
 

Protected Attributes

sc_core::sc_moduleevs
 
Iris::BaseCpuEvsevs_base_cpu
 
friend ThreadContext
 

Detailed Description

Definition at line 61 of file cpu.hh.

Constructor & Destructor Documentation

◆ BaseCPU()

BaseCPU::BaseCPU ( const BaseCPUParams &  params,
sc_core::sc_module _evs 
)

Definition at line 40 of file cpu.cc.

References evs_base_cpu, and panic_if.

◆ ~BaseCPU()

BaseCPU::~BaseCPU ( )
virtual

Definition at line 53 of file cpu.cc.

Member Function Documentation

◆ clockPeriodUpdated()

void gem5::Iris::BaseCPU::clockPeriodUpdated ( )
inlineoverrideprotected

Definition at line 105 of file cpu.hh.

References evs_base_cpu, and gem5::Iris::BaseCpuEvs::setClkPeriod().

◆ getDataPort()

Port& gem5::Iris::BaseCPU::getDataPort ( )
inlineoverride

Definition at line 68 of file cpu.hh.

References panic.

◆ getInstPort()

Port& gem5::Iris::BaseCPU::getInstPort ( )
inlineoverride

Definition at line 74 of file cpu.hh.

References panic.

◆ serializeThread()

void BaseCPU::serializeThread ( CheckpointOut cp,
ThreadID  tid 
) const
overrideprotected

Definition at line 70 of file cpu.cc.

References gem5::serialize().

◆ setResetAddr()

virtual void gem5::Iris::BaseCPU::setResetAddr ( Addr  addr,
bool  secure = false 
)
inlinevirtual

◆ totalInsts()

Counter BaseCPU::totalInsts ( ) const
override

Definition at line 61 of file cpu.cc.

References gem5::X86ISA::count.

Referenced by totalOps().

◆ totalOps()

Counter gem5::Iris::BaseCPU::totalOps ( ) const
inlineoverride

Definition at line 88 of file cpu.hh.

References totalInsts().

◆ wakeup()

void gem5::Iris::BaseCPU::wakeup ( ThreadID  tid)
inlineoverride

Definition at line 80 of file cpu.hh.

References gem5::ThreadContext::Suspended.

Member Data Documentation

◆ evs

sc_core::sc_module* gem5::Iris::BaseCPU::evs
protected

◆ evs_base_cpu

Iris::BaseCpuEvs* gem5::Iris::BaseCPU::evs_base_cpu
protected

◆ ThreadContext

friend gem5::Iris::BaseCPU::ThreadContext
protected

Definition at line 102 of file cpu.hh.


The documentation for this class was generated from the following files:

Generated on Thu Jul 28 2022 13:34:07 for gem5 by doxygen 1.8.17