condition.cc

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/*
 * Copyright (c) 2009 The University of Edinburgh
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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#include "arch/power/insts/condition.hh"
 
namespace gem5
{
 
using namespace PowerISA;
 
std::string
CondLogicOp::generateDisassembly(
        Addr pc, const loader::SymbolTable *symtab) const
{
    std::stringstream ss;
 
    ccprintf(ss, "%-10s ", mnemonic);
 
    // Format is <mnemonic> bt, ba, bb
    ss << bt << ", " << ba << ", " << bb;
 
    return ss.str();
}
 
std::string
CondMoveOp::generateDisassembly(
        Addr pc, const loader::SymbolTable *symtab) const
{
    std::stringstream ss;
 
    ccprintf(ss, "%-10s ", mnemonic);
 
    // Format is <mnemonic> bf, bfa
    ss << bf << ", " << bfa;
 
    return ss.str();
}
 
} // namespace gem5