Go to the documentation of this file.
49 #ifndef __CPU_PRED_LTAGE_HH__
50 #define __CPU_PRED_LTAGE_HH__
58 #include "params/LTAGE.hh"
63 namespace branch_prediction
75 Addr corrTarget)
override;
115 ThreadID tid,
Addr branch_pc,
bool cond_branch,
void* &
b)
override;
121 #endif // __CPU_PRED_LTAGE_HH__
void squash(ThreadID tid, void *bp_history) override
virtual ~LTageBranchInfo()
void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed, const StaticInstPtr &inst, Addr corrTarget) override
Updates the BP with taken/not taken information.
LTageBranchInfo(TAGEBase &tage, LoopPredictor &lp)
LTAGE(const LTAGEParams ¶ms)
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
const Params & params() const
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
bool predict(ThreadID tid, Addr branch_pc, bool cond_branch, void *&b) override
Get a branch prediction from LTAGE.
LoopPredictor::BranchInfo * lpBranchInfo
LoopPredictor * loopPredictor
The loop predictor object.
@ LAST_TAGE_PROVIDER_TYPE
@ LAST_LTAGE_PROVIDER_TYPE
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
int16_t ThreadID
Thread index/ID type.
Generated on Wed May 4 2022 12:13:54 for gem5 by doxygen 1.8.17