gem5  v21.1.0.2
tage.hh
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1 /*
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3  *
4  * Copyright (c) 2006 INRIA (Institut National de Recherche en
5  * Informatique et en Automatique / French National Research Institute
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33 
34 /* @file
35  * Implementation of a TAGE branch predictor. TAGE is a global-history based
36  * branch predictor. It features a PC-indexed bimodal predictor and N
37  * partially tagged tables, indexed with a hash of the PC and the global
38  * branch history. The different lengths of global branch history used to
39  * index the partially tagged tables grow geometrically. A small path history
40  * is also used in the hash.
41  *
42  * All TAGE tables are accessed in parallel, and the one using the longest
43  * history that matches provides the prediction (some exceptions apply).
44  * Entries are allocated in components using a longer history than the
45  * one that predicted when the prediction is incorrect.
46  */
47 
48 #ifndef __CPU_PRED_TAGE_HH__
49 #define __CPU_PRED_TAGE_HH__
50 
51 #include <vector>
52 
53 #include "base/types.hh"
54 #include "cpu/pred/bpred_unit.hh"
55 #include "cpu/pred/tage_base.hh"
56 #include "params/TAGE.hh"
57 
58 namespace gem5
59 {
60 
61 namespace branch_prediction
62 {
63 
64 class TAGE: public BPredUnit
65 {
66  protected:
68 
70  {
72 
74  {}
75 
76  virtual ~TageBranchInfo()
77  {
78  delete tageBranchInfo;
79  }
80  };
81 
82  virtual bool predict(ThreadID tid, Addr branch_pc, bool cond_branch,
83  void* &b);
84 
85  public:
86 
87  TAGE(const TAGEParams &params);
88 
89  // Base class methods.
90  void uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history) override;
91  bool lookup(ThreadID tid, Addr branch_addr, void* &bp_history) override;
92  void btbUpdate(ThreadID tid, Addr branch_addr, void* &bp_history) override;
93  void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history,
94  bool squashed, const StaticInstPtr & inst,
95  Addr corrTarget) override;
96  virtual void squash(ThreadID tid, void *bp_history) override;
97 };
98 
99 } // namespace branch_prediction
100 } // namespace gem5
101 
102 #endif // __CPU_PRED_TAGE_HH__
gem5::branch_prediction::TAGE::TAGE
TAGE(const TAGEParams &params)
Definition: tage.cc:53
gem5::branch_prediction::TAGE::squash
virtual void squash(ThreadID tid, void *bp_history) override
Definition: tage.cc:90
tage_base.hh
gem5::branch_prediction::TAGE::btbUpdate
void btbUpdate(ThreadID tid, Addr branch_addr, void *&bp_history) override
If a branch is not taken, because the BTB address is invalid or missing, this function sets the appro...
Definition: tage.cc:120
gem5::branch_prediction::TAGE::TageBranchInfo::tageBranchInfo
TAGEBase::BranchInfo * tageBranchInfo
Definition: tage.hh:71
gem5::branch_prediction::TAGE::update
void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed, const StaticInstPtr &inst, Addr corrTarget) override
Updates the BP with taken/not taken information.
Definition: tage.cc:59
gem5::branch_prediction::TAGEBase::BranchInfo
Definition: tage_base.hh:128
gem5::RefCountingPtr< StaticInst >
gem5::branch_prediction::TAGE::predict
virtual bool predict(ThreadID tid, Addr branch_pc, bool cond_branch, void *&b)
Definition: tage.cc:98
gem5::branch_prediction::TAGE::TageBranchInfo::TageBranchInfo
TageBranchInfo(TAGEBase &tage)
Definition: tage.hh:73
gem5::branch_prediction::TAGEBase
Definition: tage_base.hh:65
gem5::ArmISA::b
Bitfield< 7 > b
Definition: misc_types.hh:381
gem5::branch_prediction::TAGE::uncondBranch
void uncondBranch(ThreadID tid, Addr br_pc, void *&bp_history) override
Definition: tage.cc:127
gem5::SimObject::params
const Params & params() const
Definition: sim_object.hh:176
gem5::branch_prediction::TAGE::TageBranchInfo::~TageBranchInfo
virtual ~TageBranchInfo()
Definition: tage.hh:76
gem5::branch_prediction::TAGE::TageBranchInfo
Definition: tage.hh:69
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::branch_prediction::TAGE
Definition: tage.hh:64
types.hh
bpred_unit.hh
gem5::branch_prediction::BPredUnit
Basically a wrapper class to hold both the branch predictor and the BTB.
Definition: bpred_unit.hh:68
gem5::branch_prediction::TAGE::tage
TAGEBase * tage
Definition: tage.hh:67
gem5::branch_prediction::TAGE::lookup
bool lookup(ThreadID tid, Addr branch_addr, void *&bp_history) override
Looks up a given PC in the BP to see if it is taken or not taken.
Definition: tage.cc:106
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:242

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