gem5  v22.1.0.0
mmu.hh
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37 
38 #ifndef __ARCH_MIPS_MMU_HH__
39 #define __ARCH_MIPS_MMU_HH__
40 
41 #include "arch/generic/mmu.hh"
42 #include "arch/mips/page_size.hh"
43 #include "params/MipsMMU.hh"
44 
45 namespace gem5
46 {
47 
48 namespace MipsISA {
49 
50 class MMU : public BaseMMU
51 {
52  public:
53  MMU(const MipsMMUParams &p)
54  : BaseMMU(p)
55  {}
56 
59  Mode mode, Request::Flags flags) override
60  {
62  PageBytes, start, size, tc, this, mode, flags));
63  }
64 };
65 
66 } // namespace MipsISA
67 } // namespace gem5
68 
69 #endif // __ARCH_MIPS_MMU_HH__
TranslationGenPtr translateFunctional(Addr start, Addr size, ThreadContext *tc, Mode mode, Request::Flags flags) override
Returns a translation generator for a region of virtual addresses, instead of directly translating a ...
Definition: mmu.hh:58
MMU(const MipsMMUParams &p)
Definition: mmu.hh:53
ThreadContext is the external interface to all thread state for anything outside of the CPU.
uint8_t flags
Definition: helpers.cc:66
const Addr PageBytes
Definition: page_size.hh:42
Bitfield< 11, 7 > mode
Definition: dt_constants.hh:98
Bitfield< 0 > p
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
std::unique_ptr< TranslationGen > TranslationGenPtr

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