gem5 v24.0.0.0
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#include "arch/mips/utility.hh"
#include <cmath>
#include "arch/mips/regs/float.hh"
#include "arch/mips/regs/int.hh"
#include "arch/mips/regs/misc.hh"
#include "base/bitfield.hh"
#include "base/logging.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "sim/serialize.hh"
Go to the source code of this file.
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
namespace | gem5::MipsISA |
Functions | |
uint64_t | gem5::MipsISA::fpConvert (ConvertType cvt_type, double fp_val) |
double | gem5::MipsISA::roundFP (double val, int digits) |
double | gem5::MipsISA::truncFP (double val) |
bool | gem5::MipsISA::getCondCode (uint32_t fcsr, int cc_idx) |
uint32_t | gem5::MipsISA::genCCVector (uint32_t fcsr, int cc_num, uint32_t cc_val) |
uint32_t | gem5::MipsISA::genInvalidVector (uint32_t fcsr_bits) |
bool | gem5::MipsISA::isNan (void *val_ptr, int size) |
bool | gem5::MipsISA::isQnan (void *val_ptr, int size) |
bool | gem5::MipsISA::isSnan (void *val_ptr, int size) |