gem5  v21.1.0.2
utility.cc
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1 /*
2  * Copyright (c) 2007 MIPS Technologies, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
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8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include "arch/mips/utility.hh"
30 
31 #include <cmath>
32 
33 #include "arch/mips/regs/float.hh"
34 #include "arch/mips/regs/int.hh"
35 #include "arch/mips/regs/misc.hh"
36 #include "base/bitfield.hh"
37 #include "base/logging.hh"
38 #include "cpu/static_inst.hh"
39 #include "cpu/thread_context.hh"
40 #include "sim/serialize.hh"
41 
42 namespace gem5
43 {
44 
45 using namespace MipsISA;
46 
47 namespace MipsISA {
48 
49 uint64_t
50 fpConvert(ConvertType cvt_type, double fp_val)
51 {
52 
53  switch (cvt_type)
54  {
55  case SINGLE_TO_DOUBLE:
56  {
57  double sdouble_val = fp_val;
58  void *sdouble_ptr = &sdouble_val;
59  uint64_t sdp_bits = *(uint64_t *) sdouble_ptr;
60  return sdp_bits;
61  }
62 
63  case SINGLE_TO_WORD:
64  {
65  int32_t sword_val = (int32_t) fp_val;
66  void *sword_ptr = &sword_val;
67  uint64_t sword_bits= *(uint32_t *) sword_ptr;
68  return sword_bits;
69  }
70 
71  case WORD_TO_SINGLE:
72  {
73  float wfloat_val = fp_val;
74  void *wfloat_ptr = &wfloat_val;
75  uint64_t wfloat_bits = *(uint32_t *) wfloat_ptr;
76  return wfloat_bits;
77  }
78 
79  case WORD_TO_DOUBLE:
80  {
81  double wdouble_val = fp_val;
82  void *wdouble_ptr = &wdouble_val;
83  uint64_t wdp_bits = *(uint64_t *) wdouble_ptr;
84  return wdp_bits;
85  }
86 
87  default:
88  panic("Invalid Floating Point Conversion Type (%d). See \"types.hh\" for List of Conversions\n",cvt_type);
89  return 0;
90  }
91 }
92 
93 double
94 roundFP(double val, int digits)
95 {
96  double digit_offset = pow(10.0,digits);
97  val = val * digit_offset;
98  val = val + 0.5;
99  val = floor(val);
100  val = val / digit_offset;
101  return val;
102 }
103 
104 double
105 truncFP(double val)
106 {
107  int trunc_val = (int) val;
108  return (double) trunc_val;
109 }
110 
111 bool
112 getCondCode(uint32_t fcsr, int cc_idx)
113 {
114  int shift = (cc_idx == 0) ? 23 : cc_idx + 24;
115  bool cc_val = (fcsr >> shift) & 0x00000001;
116  return cc_val;
117 }
118 
119 uint32_t
120 genCCVector(uint32_t fcsr, int cc_num, uint32_t cc_val)
121 {
122  int cc_idx = (cc_num == 0) ? 23 : cc_num + 24;
123 
124  fcsr = bits(fcsr, 31, cc_idx + 1) << (cc_idx + 1) |
125  cc_val << cc_idx |
126  bits(fcsr, cc_idx - 1, 0);
127 
128  return fcsr;
129 }
130 
131 uint32_t
132 genInvalidVector(uint32_t fcsr_bits)
133 {
134  //Set FCSR invalid in "flag" field
135  int invalid_offset = Invalid + Flag_Field;
136  fcsr_bits = fcsr_bits | (1 << invalid_offset);
137 
138  //Set FCSR invalid in "cause" flag
139  int cause_offset = Invalid + Cause_Field;
140  fcsr_bits = fcsr_bits | (1 << cause_offset);
141 
142  return fcsr_bits;
143 }
144 
145 bool
146 isNan(void *val_ptr, int size)
147 {
148  switch (size)
149  {
150  case 32:
151  {
152  uint32_t val_bits = *(uint32_t *) val_ptr;
153  return (bits(val_bits, 30, 23) == 0xFF);
154  }
155 
156  case 64:
157  {
158  uint64_t val_bits = *(uint64_t *) val_ptr;
159  return (bits(val_bits, 62, 52) == 0x7FF);
160  }
161 
162  default:
163  panic("Type unsupported. Size mismatch\n");
164  }
165 }
166 
167 
168 bool
169 isQnan(void *val_ptr, int size)
170 {
171  switch (size)
172  {
173  case 32:
174  {
175  uint32_t val_bits = *(uint32_t *) val_ptr;
176  return (bits(val_bits, 30, 22) == 0x1FE);
177  }
178 
179  case 64:
180  {
181  uint64_t val_bits = *(uint64_t *) val_ptr;
182  return (bits(val_bits, 62, 51) == 0xFFE);
183  }
184 
185  default:
186  panic("Type unsupported. Size mismatch\n");
187  }
188 }
189 
190 bool
191 isSnan(void *val_ptr, int size)
192 {
193  switch (size)
194  {
195  case 32:
196  {
197  uint32_t val_bits = *(uint32_t *) val_ptr;
198  return (bits(val_bits, 30, 22) == 0x1FF);
199  }
200 
201  case 64:
202  {
203  uint64_t val_bits = *(uint64_t *) val_ptr;
204  return (bits(val_bits, 62, 51) == 0xFFF);
205  }
206 
207  default:
208  panic("Type unsupported. Size mismatch\n");
209  }
210 }
211 
212 } // namespace MipsISA
213 } // namespace gem5
gem5::MipsISA::genCCVector
uint32_t genCCVector(uint32_t fcsr, int cc_num, uint32_t cc_val)
Definition: utility.cc:120
misc.hh
gem5::MipsISA::Flag_Field
@ Flag_Field
Definition: float.hh:71
gem5::MipsISA::WORD_TO_DOUBLE
@ WORD_TO_DOUBLE
Definition: types.hh:62
serialize.hh
gem5::MipsISA::truncFP
double truncFP(double val)
Definition: utility.cc:105
gem5::MipsISA::Invalid
@ Invalid
Definition: float.hh:65
gem5::MipsISA::fpConvert
uint64_t fpConvert(ConvertType cvt_type, double fp_val)
Definition: utility.cc:50
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::MipsISA::genInvalidVector
uint32_t genInvalidVector(uint32_t fcsr_bits)
Definition: utility.cc:132
gem5::ArmISA::shift
Bitfield< 6, 5 > shift
Definition: types.hh:117
gem5::MipsISA::isQnan
bool isQnan(void *val_ptr, int size)
Definition: utility.cc:169
bitfield.hh
utility.hh
gem5::bits
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:76
static_inst.hh
gem5::MipsISA::roundFP
double roundFP(double val, int digits)
Definition: utility.cc:94
gem5::MipsISA::SINGLE_TO_DOUBLE
@ SINGLE_TO_DOUBLE
Definition: types.hh:48
float.hh
gem5::MipsISA::Cause_Field
@ Cause_Field
Definition: float.hh:73
gem5::MipsISA::getCondCode
bool getCondCode(uint32_t fcsr, int cc_idx)
Definition: utility.cc:112
int.hh
gem5::MipsISA::ConvertType
ConvertType
Definition: types.hh:46
gem5::MipsISA::isNan
bool isNan(void *val_ptr, int size)
Definition: utility.cc:146
gem5::MipsISA::SINGLE_TO_WORD
@ SINGLE_TO_WORD
Definition: types.hh:49
logging.hh
gem5::MipsISA::isSnan
bool isSnan(void *val_ptr, int size)
Definition: utility.cc:191
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
thread_context.hh
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
gem5::MipsISA::WORD_TO_SINGLE
@ WORD_TO_SINGLE
Definition: types.hh:61

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