gem5
v24.0.0.0
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systemc
core
sc_simcontext.cc
Go to the documentation of this file.
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/*
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* Copyright 2018 Google, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
systemc/core/object.hh
"
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#include "
systemc/core/scheduler.hh
"
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#include "
systemc/ext/core/sc_main.hh
"
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#include "
systemc/ext/core/sc_simcontext.hh
"
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namespace
sc_core
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{
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namespace
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{
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size_t
objIndex = 0;
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sc_simcontext currContext;
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sc_curr_proc_info currProcInfo;
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}
// anonymous namespace
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sc_dt::uint64
sc_simcontext::delta_count
()
const
{
return
sc_delta_count
(); }
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void
sc_simcontext::reset
() { objIndex = 0; }
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sc_curr_proc_handle
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sc_simcontext::get_curr_proc_info
()
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{
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::sc_gem5::Process
*p =
::sc_gem5::scheduler
.
current
();
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currProcInfo.process_handle = p;
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currProcInfo.kind = p ? p->procKind() :
SC_NO_PROC_
;
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return
&currProcInfo;
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}
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sc_object
*
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sc_simcontext::first_object
()
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{
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objIndex = 0;
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if
(!
::sc_gem5::allObjects
.empty())
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return ::sc_gem5::allObjects[0];
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else
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return
nullptr
;
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}
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sc_object
*
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sc_simcontext::next_object
()
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{
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objIndex++;
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if
(
::sc_gem5::allObjects
.size() > objIndex)
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return ::sc_gem5::allObjects[objIndex];
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else
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return
nullptr
;
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}
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bool
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sc_simcontext::elaboration_done
()
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{
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return ::sc_gem5::scheduler.elaborationDone();
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}
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sc_simcontext
*
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sc_get_curr_simcontext
()
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{
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return
&currContext;
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}
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}
// namespace sc_core
sc_core::sc_object
Definition
sc_object.hh:51
sc_core::sc_simcontext
Definition
sc_simcontext.hh:38
sc_core::sc_simcontext::next_object
sc_object * next_object()
Definition
sc_simcontext.cc:69
sc_core::sc_simcontext::get_curr_proc_info
sc_curr_proc_handle get_curr_proc_info()
Definition
sc_simcontext.cc:50
sc_core::sc_simcontext::elaboration_done
bool elaboration_done()
Definition
sc_simcontext.cc:79
sc_core::sc_simcontext::reset
void reset()
Definition
sc_simcontext.cc:47
sc_core::sc_simcontext::delta_count
sc_dt::uint64 delta_count() const
Definition
sc_simcontext.cc:46
sc_core::sc_simcontext::first_object
sc_object * first_object()
Definition
sc_simcontext.cc:59
sc_gem5::Process
Definition
process.hh:63
sc_gem5::Scheduler::current
Process * current()
Definition
scheduler.hh:185
sc_core
Definition
messages.cc:32
sc_core::sc_delta_count
sc_dt::uint64 sc_delta_count()
Definition
sc_main.cc:135
sc_core::SC_NO_PROC_
@ SC_NO_PROC_
Definition
sc_process_handle.hh:86
sc_core::sc_get_curr_simcontext
sc_simcontext * sc_get_curr_simcontext()
Definition
sc_simcontext.cc:85
sc_dt::uint64
uint64_t uint64
Definition
sc_nbdefs.hh:172
sc_gem5::allObjects
Objects allObjects
Definition
object.cc:287
sc_gem5::scheduler
Scheduler scheduler
Definition
scheduler.cc:494
object.hh
sc_main.hh
sc_simcontext.hh
sc_core::sc_curr_proc_info
Definition
sc_process_handle.hh:142
scheduler.hh
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