gem5 v24.0.0.0
|
#include "arch/x86/interrupts.hh"
#include <list>
#include <memory>
#include "arch/x86/intmessage.hh"
#include "arch/x86/regs/apic.hh"
#include "arch/x86/regs/misc.hh"
#include "cpu/base.hh"
#include "debug/LocalApic.hh"
#include "dev/x86/i82094aa.hh"
#include "dev/x86/pc.hh"
#include "dev/x86/south_bridge.hh"
#include "mem/packet_access.hh"
#include "sim/full_system.hh"
#include "sim/system.hh"
Go to the source code of this file.
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
namespace | gem5::X86ISA |
This is exposed globally, independent of the ISA. | |
Functions | |
int | gem5::divideFromConf (uint32_t conf) |
ApicRegIndex | gem5::X86ISA::decodeAddr (Addr paddr) |