gem5  v21.1.0.2
intmessage.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2008 The Regents of The University of Michigan
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef __ARCH_X86_INTMESSAGE_HH__
30 #define __ARCH_X86_INTMESSAGE_HH__
31 
32 #include "arch/x86/x86_traits.hh"
33 #include "base/bitunion.hh"
34 #include "base/compiler.hh"
35 #include "base/types.hh"
36 #include "dev/x86/intdev.hh"
37 #include "mem/packet.hh"
38 #include "mem/packet_access.hh"
39 #include "mem/request.hh"
40 
41 namespace gem5
42 {
43 
44 namespace X86ISA
45 {
46  BitUnion32(TriggerIntMessage)
47  Bitfield<7, 0> destination;
48  Bitfield<15, 8> vector;
49  Bitfield<18, 16> deliveryMode;
50  Bitfield<19> destMode;
51  Bitfield<20> level;
52  Bitfield<21> trigger;
53  EndBitUnion(TriggerIntMessage)
54 
57  {
59  {
60  Fixed = 0,
62  SMI = 2,
63  NMI = 4,
64  INIT = 5,
65  SIPI = 6,
66  ExtInt = 7,
68  };
69 
70  static const char * const names[NumModes] = {
71  "Fixed", "LowestPriority", "SMI", "Reserved",
72  "NMI", "INIT", "Startup", "ExtInt"
73  };
74 
75  static inline bool
77  {
78  return mode == 3;
79  }
80  } // namespace delivery_mode
81 
82  static const Addr TriggerIntOffset = 0;
83 
84  static inline PacketPtr
85  buildIntTriggerPacket(int id, TriggerIntMessage message)
86  {
88  return buildIntPacket(addr, message);
89  }
90 
91 } // namespace X86ISA
92 } // namespace gem5
93 
94 #endif
gem5::X86ISA::level
Bitfield< 20 > level
Definition: intmessage.hh:51
x86_traits.hh
gem5::X86ISA::vector
Bitfield< 15, 8 > vector
Definition: intmessage.hh:48
gem5::X86ISA::delivery_mode::isReserved
static bool isReserved(int mode)
Definition: intmessage.hh:76
gem5::X86ISA::delivery_mode::NumModes
@ NumModes
Definition: intmessage.hh:67
gem5::X86ISA::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(IntelMP, intelmp)
gem5::X86ISA::destination
destination
Definition: intmessage.hh:47
gem5::X86ISA::delivery_mode::Fixed
@ Fixed
Definition: intmessage.hh:60
gem5::X86ISA::delivery_mode::LowestPriority
@ LowestPriority
Definition: intmessage.hh:61
request.hh
packet.hh
gem5::X86ISA::delivery_mode::SMI
@ SMI
Definition: intmessage.hh:62
gem5::X86ISA::delivery_mode::IntDeliveryMode
IntDeliveryMode
Definition: intmessage.hh:58
intdev.hh
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
bitunion.hh
gem5::auxv::AuxVector
Definition: aux_vector.hh:45
gem5::X86ISA::delivery_mode::NMI
@ NMI
Definition: intmessage.hh:63
gem5::X86ISA::buildIntPacket
PacketPtr buildIntPacket(Addr addr, T payload)
Definition: intdev.hh:89
compiler.hh
gem5::X86ISA::delivery_mode::names
static const char *const names[NumModes]
Definition: intmessage.hh:70
gem5::X86ISA::delivery_mode::INIT
@ INIT
Definition: intmessage.hh:64
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
packet_access.hh
gem5::X86ISA::destMode
Bitfield< 19 > destMode
Definition: intmessage.hh:50
gem5::X86ISA::BitUnion32
BitUnion32(TriggerIntMessage) Bitfield< 7
gem5::X86ISA::delivery_mode::ExtInt
@ ExtInt
Definition: intmessage.hh:66
gem5::X86ISA::buildIntTriggerPacket
static PacketPtr buildIntTriggerPacket(int id, TriggerIntMessage message)
Definition: intmessage.hh:85
gem5::X86ISA::x86InterruptAddress
static Addr x86InterruptAddress(const uint8_t id, const uint16_t addr)
Definition: x86_traits.hh:95
types.hh
gem5::X86ISA::delivery_mode
delivery_mode
Definition: intmessage.hh:55
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::X86ISA::deliveryMode
Bitfield< 18, 16 > deliveryMode
Definition: intmessage.hh:49
gem5::X86ISA::EndBitUnion
EndBitUnion(TriggerIntMessage) GEM5_DEPRECATED_NAMESPACE(DeliveryMode
gem5::X86ISA::TriggerIntOffset
static const Addr TriggerIntOffset
Definition: intmessage.hh:82
gem5::X86ISA::trigger
Bitfield< 21 > trigger
Definition: intmessage.hh:52
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:73
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::X86ISA::delivery_mode::SIPI
@ SIPI
Definition: intmessage.hh:65

Generated on Tue Sep 21 2021 12:24:51 for gem5 by doxygen 1.8.17