gem5  v22.1.0.0
x86_cpu.hh
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28 
29 #ifndef __CPU_KVM_X86_CPU_HH__
30 #define __CPU_KVM_X86_CPU_HH__
31 
32 #include <vector>
33 
34 #include "arch/x86/pcstate.hh"
35 #include "cpu/kvm/base.hh"
36 #include "cpu/kvm/vm.hh"
37 #include "params/X86KvmCPU.hh"
38 
39 struct kvm_debugregs;
40 struct kvm_msr_entry;
41 struct kvm_msrs;
42 struct kvm_vcpu_events;
43 struct kvm_xcrs;
44 struct kvm_xsave;
45 
46 namespace gem5
47 {
48 
52 class X86KvmCPU : public BaseKvmCPU
53 {
54  public:
55  X86KvmCPU(const X86KvmCPUParams &params);
56  virtual ~X86KvmCPU();
57 
58  void startup() override;
59  void init() override;
60 
62  void dump() const override;
63  void dumpFpuRegs() const;
64  void dumpIntRegs() const;
65  void dumpSpecRegs() const;
66  void dumpDebugRegs() const;
67  void dumpXCRs() const;
68  void dumpXSave() const;
69  void dumpVCpuEvents() const;
70  void dumpMSRs() const;
73  protected:
75 
76  Tick kvmRun(Tick ticks) override;
77 
93  Tick kvmRunDrain() override;
94 
95  uint64_t getHostCycles() const override;
96  void
97  stutterPC(PCStateBase &pc) const override
98  {
99  pc.as<X86ISA::PCState>().setNPC(pc.instAddr());
100  }
101 
108  void setCPUID(const struct kvm_cpuid2 &cpuid);
109  void setCPUID(const Kvm::CPUIDVector &cpuid);
117  void setMSRs(const struct kvm_msrs &msrs);
118  void setMSRs(const KvmMSRVector &msrs);
119  void getMSRs(struct kvm_msrs &msrs) const;
120  void setMSR(uint32_t index, uint64_t value);
121  uint64_t getMSR(uint32_t index) const;
132  const Kvm::MSRIndexVector &getMsrIntersection() const;
133 
139  void getDebugRegisters(struct kvm_debugregs &regs) const;
140  void setDebugRegisters(const struct kvm_debugregs &regs);
141  void getXCRs(struct kvm_xcrs &regs) const;
142  void setXCRs(const struct kvm_xcrs &regs);
143  void getXSave(struct kvm_xsave &xsave) const;
144  void setXSave(const struct kvm_xsave &xsave);
145  void getVCpuEvents(struct kvm_vcpu_events &events) const;
146  void setVCpuEvents(const struct kvm_vcpu_events &events);
149  void updateKvmState() override;
150  void updateThreadContext() override;
151 
155  void deliverInterrupts();
156 
160  Tick handleKvmExitIO() override;
161 
162  Tick handleKvmExitIRQWindowOpen() override;
163 
175  bool archIsDrained() const override;
176 
178  void ioctlRun() override;
179 
180  private:
188  void updateKvmStateRegs();
190  void updateKvmStateSRegs();
201  void updateKvmStateFPU();
217  void updateKvmStateFPUXSave();
219  void updateKvmStateMSRs();
229  void updateThreadContextRegs(const struct kvm_regs &regs,
230  const struct kvm_sregs &sregs);
232  void updateThreadContextSRegs(const struct kvm_sregs &sregs);
234  void updateThreadContextFPU(const struct kvm_fpu &fpu);
236  void updateThreadContextXSave(const struct kvm_xsave &kxsave);
242  void updateCPUID();
243 
252  void handleIOMiscReg32(int miscreg);
253 
255  mutable Kvm::MSRIndexVector cachedMsrIntersection;
256 
261  bool haveXSave;
266  bool useXSave;
268  bool haveXCRs;
270 };
271 
272 } // namespace gem5
273 
274 #endif
Base class for KVM based CPU models.
Definition: base.hh:88
x86 implementation of a KVM-based hardware virtualized CPU.
Definition: x86_cpu.hh:53
void updateThreadContextFPU(const struct kvm_fpu &fpu)
Update FPU and SIMD registers using the legacy API.
Definition: x86_cpu.cc:1091
Tick handleKvmExitIRQWindowOpen() override
The guest exited because an interrupt window was requested.
Definition: x86_cpu.cc:1366
void updateThreadContextXSave(const struct kvm_xsave &kxsave)
Update FPU and SIMD registers using the XSave API.
Definition: x86_cpu.cc:1102
void updateThreadContextMSRs()
Update MSR registers.
Definition: x86_cpu.cc:1115
void startup() override
startup() is the final initialization call before simulation.
Definition: x86_cpu.cc:576
void updateKvmState() override
Update the KVM state from the current thread context.
Definition: x86_cpu.cc:694
void updateCPUID()
Transfer gem5's CPUID values into the virtual CPU.
Definition: x86_cpu.cc:1437
void handleIOMiscReg32(int miscreg)
Handle a 32-bit IO access that should be mapped to a MiscReg.
Definition: x86_cpu.cc:1277
void dumpIntRegs() const
Definition: x86_cpu.cc:613
void setMSRs(const struct kvm_msrs &msrs)
Methods to access MSRs in the guest.
Definition: x86_cpu.cc:1493
void setCPUID(const struct kvm_cpuid2 &cpuid)
Methods to access CPUID information using the extended API.
Definition: x86_cpu.cc:1473
void getXSave(struct kvm_xsave &xsave) const
Definition: x86_cpu.cc:1608
void dumpXSave() const
Definition: x86_cpu.cc:655
bool haveXCRs
Kvm::capXCRs() available?
Definition: x86_cpu.hh:268
void updateKvmStateSRegs()
Update control registers (CRx, segments, etc.)
Definition: x86_cpu.cc:769
void getXCRs(struct kvm_xcrs &regs) const
Definition: x86_cpu.cc:1594
bool useXSave
Should the XSave interface be used to sync the FPU and SIMD registers?
Definition: x86_cpu.hh:266
void getVCpuEvents(struct kvm_vcpu_events &events) const
Definition: x86_cpu.cc:1623
X86KvmCPU(const X86KvmCPUParams &params)
Definition: x86_cpu.cc:537
void updateKvmStateFPU()
Update FPU and SIMD registers.
Definition: x86_cpu.cc:921
std::vector< struct kvm_msr_entry > KvmMSRVector
Definition: x86_cpu.hh:74
uint64_t getHostCycles() const override
Get the value of the hardware cycle counter in the guest.
Definition: x86_cpu.cc:1271
void dumpFpuRegs() const
Definition: x86_cpu.cc:605
void updateKvmStateMSRs()
Update MSR registers.
Definition: x86_cpu.cc:930
void getDebugRegisters(struct kvm_debugregs &regs) const
Wrappers around KVM's state transfer methods.
Definition: x86_cpu.cc:1572
void updateKvmStateRegs()
Support routines to update the state of the KVM CPU from gem5's state representation.
Definition: x86_cpu.cc:707
Tick kvmRunDrain() override
Run the virtual CPU until draining completes.
Definition: x86_cpu.cc:1246
const Kvm::MSRIndexVector & getMsrIntersection() const
Get a list of MSRs supported by both gem5 and KVM.
Definition: x86_cpu.cc:1551
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: x86_cpu.cc:543
void dumpSpecRegs() const
Definition: x86_cpu.cc:621
void setMSR(uint32_t index, uint64_t value)
Definition: x86_cpu.cc:1522
void stutterPC(PCStateBase &pc) const override
Modify a PCStatePtr's value so that its next PC is the current PC.
Definition: x86_cpu.hh:97
void ioctlRun() override
Override for synchronizing state in kvm_run.
Definition: x86_cpu.cc:1404
void setXCRs(const struct kvm_xcrs &regs)
Definition: x86_cpu.cc:1601
void dumpMSRs() const
Definition: x86_cpu.cc:675
void updateThreadContext() override
Update the current thread context with the KVM state.
Definition: x86_cpu.cc:952
void getMSRs(struct kvm_msrs &msrs) const
Definition: x86_cpu.cc:1513
Tick kvmRun(Tick ticks) override
Request KVM to run the guest for a given number of ticks.
Definition: x86_cpu.cc:1198
void setVCpuEvents(const struct kvm_vcpu_events &events)
Definition: x86_cpu.cc:1630
void deliverInterrupts()
Inject pending interrupts from gem5 into the virtual CPU.
Definition: x86_cpu.cc:1145
bool haveDebugRegs
Kvm::capDebugRegs() available?
Definition: x86_cpu.hh:259
void dump() const override
Dump the internal state to the terminal.
Definition: x86_cpu.cc:590
bool archIsDrained() const override
Check if there are pending events in the vCPU that prevents it from being drained.
Definition: x86_cpu.cc:1375
Kvm::MSRIndexVector cachedMsrIntersection
Cached intersection of supported MSRs.
Definition: x86_cpu.hh:255
void setXSave(const struct kvm_xsave &xsave)
Definition: x86_cpu.cc:1615
void dumpVCpuEvents() const
Definition: x86_cpu.cc:667
uint64_t getMSR(uint32_t index) const
Definition: x86_cpu.cc:1536
void dumpXCRs() const
Definition: x86_cpu.cc:643
Tick handleKvmExitIO() override
Handle x86 legacy IO (in/out)
Definition: x86_cpu.cc:1302
void updateThreadContextRegs(const struct kvm_regs &regs, const struct kvm_sregs &sregs)
Support routines to update the state of gem5's thread context from KVM's state representation.
Definition: x86_cpu.cc:986
void setDebugRegisters(const struct kvm_debugregs &regs)
Definition: x86_cpu.cc:1583
bool haveXSave
Kvm::capXSave() available?
Definition: x86_cpu.hh:261
void updateKvmStateFPUXSave()
Update FPU and SIMD registers using the XSave API.
Definition: x86_cpu.cc:896
virtual ~X86KvmCPU()
Definition: x86_cpu.cc:571
void dumpDebugRegs() const
Definition: x86_cpu.cc:629
void updateKvmStateFPULegacy()
Update FPU and SIMD registers using the legacy API.
Definition: x86_cpu.cc:872
void updateThreadContextSRegs(const struct kvm_sregs &sregs)
Update control registers (CRx, segments, etc.)
Definition: x86_cpu.cc:1040
STL vector class.
Definition: stl.hh:37
const Params & params() const
Definition: sim_object.hh:176
Bitfield< 4 > pc
Bitfield< 30, 0 > index
Bitfield< 28, 21 > cpuid
Definition: dt_constants.hh:95
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Tick
Tick count type.
Definition: types.hh:58

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