gem5  v21.1.0.2
x86_cpu.hh
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28 
29 #ifndef __CPU_KVM_X86_CPU_HH__
30 #define __CPU_KVM_X86_CPU_HH__
31 
32 #include <vector>
33 
34 #include "cpu/kvm/base.hh"
35 #include "cpu/kvm/vm.hh"
36 #include "params/X86KvmCPU.hh"
37 
38 struct kvm_debugregs;
39 struct kvm_msr_entry;
40 struct kvm_msrs;
41 struct kvm_vcpu_events;
42 struct kvm_xcrs;
43 struct kvm_xsave;
44 
45 namespace gem5
46 {
47 
51 class X86KvmCPU : public BaseKvmCPU
52 {
53  public:
54  X86KvmCPU(const X86KvmCPUParams &params);
55  virtual ~X86KvmCPU();
56 
57  void startup() override;
58 
60  void dump() const override;
61  void dumpFpuRegs() const;
62  void dumpIntRegs() const;
63  void dumpSpecRegs() const;
64  void dumpDebugRegs() const;
65  void dumpXCRs() const;
66  void dumpXSave() const;
67  void dumpVCpuEvents() const;
68  void dumpMSRs() const;
71  protected:
73 
74  Tick kvmRun(Tick ticks) override;
75 
91  Tick kvmRunDrain() override;
92 
93  uint64_t getHostCycles() const override;
94 
101  void setCPUID(const struct kvm_cpuid2 &cpuid);
102  void setCPUID(const Kvm::CPUIDVector &cpuid);
110  void setMSRs(const struct kvm_msrs &msrs);
111  void setMSRs(const KvmMSRVector &msrs);
112  void getMSRs(struct kvm_msrs &msrs) const;
113  void setMSR(uint32_t index, uint64_t value);
114  uint64_t getMSR(uint32_t index) const;
125  const Kvm::MSRIndexVector &getMsrIntersection() const;
126 
132  void getDebugRegisters(struct kvm_debugregs &regs) const;
133  void setDebugRegisters(const struct kvm_debugregs &regs);
134  void getXCRs(struct kvm_xcrs &regs) const;
135  void setXCRs(const struct kvm_xcrs &regs);
136  void getXSave(struct kvm_xsave &xsave) const;
137  void setXSave(const struct kvm_xsave &xsave);
138  void getVCpuEvents(struct kvm_vcpu_events &events) const;
139  void setVCpuEvents(const struct kvm_vcpu_events &events);
142  void updateKvmState() override;
143  void updateThreadContext() override;
144 
148  void deliverInterrupts();
149 
153  Tick handleKvmExitIO() override;
154 
155  Tick handleKvmExitIRQWindowOpen() override;
156 
168  bool archIsDrained() const override;
169 
171  void ioctlRun() override;
172 
173  private:
181  void updateKvmStateRegs();
183  void updateKvmStateSRegs();
194  void updateKvmStateFPU();
210  void updateKvmStateFPUXSave();
212  void updateKvmStateMSRs();
222  void updateThreadContextRegs(const struct kvm_regs &regs,
223  const struct kvm_sregs &sregs);
225  void updateThreadContextSRegs(const struct kvm_sregs &sregs);
227  void updateThreadContextFPU(const struct kvm_fpu &fpu);
229  void updateThreadContextXSave(const struct kvm_xsave &kxsave);
235  void updateCPUID();
236 
245  void handleIOMiscReg32(int miscreg);
246 
248  mutable Kvm::MSRIndexVector cachedMsrIntersection;
249 
254  bool haveXSave;
259  bool useXSave;
261  bool haveXCRs;
263 };
264 
265 } // namespace gem5
266 
267 #endif
gem5::X86KvmCPU::dumpDebugRegs
void dumpDebugRegs() const
Definition: x86_cpu.cc:616
gem5::X86KvmCPU::setCPUID
void setCPUID(const struct kvm_cpuid2 &cpuid)
Methods to access CPUID information using the extended API.
Definition: x86_cpu.cc:1465
gem5::X86KvmCPU::updateThreadContextRegs
void updateThreadContextRegs(const struct kvm_regs &regs, const struct kvm_sregs &sregs)
Support routines to update the state of gem5's thread context from KVM's state representation.
Definition: x86_cpu.cc:979
gem5::X86KvmCPU::dumpSpecRegs
void dumpSpecRegs() const
Definition: x86_cpu.cc:608
gem5::X86KvmCPU::startup
void startup() override
startup() is the final initialization call before simulation.
Definition: x86_cpu.cc:563
gem5::X86KvmCPU::dumpVCpuEvents
void dumpVCpuEvents() const
Definition: x86_cpu.cc:654
gem5::X86KvmCPU::haveXSave
bool haveXSave
Kvm::capXSave() available?
Definition: x86_cpu.hh:254
gem5::MipsISA::cpuid
Bitfield< 28, 21 > cpuid
Definition: dt_constants.hh:95
gem5::X86KvmCPU::dumpXCRs
void dumpXCRs() const
Definition: x86_cpu.cc:630
gem5::X86KvmCPU::~X86KvmCPU
virtual ~X86KvmCPU()
Definition: x86_cpu.cc:558
gem5::X86KvmCPU::dumpIntRegs
void dumpIntRegs() const
Definition: x86_cpu.cc:600
gem5::MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:47
gem5::X86KvmCPU::handleIOMiscReg32
void handleIOMiscReg32(int miscreg)
Handle a 32-bit IO access that should be mapped to a MiscReg.
Definition: x86_cpu.cc:1270
gem5::X86KvmCPU::getDebugRegisters
void getDebugRegisters(struct kvm_debugregs &regs) const
Wrappers around KVM's state transfer methods.
Definition: x86_cpu.cc:1566
gem5::X86KvmCPU::updateKvmStateFPU
void updateKvmStateFPU()
Update FPU and SIMD registers.
Definition: x86_cpu.cc:914
gem5::X86KvmCPU::updateKvmStateRegs
void updateKvmStateRegs()
Support routines to update the state of the KVM CPU from gem5's state representation.
Definition: x86_cpu.cc:695
gem5::X86KvmCPU::setMSRs
void setMSRs(const struct kvm_msrs &msrs)
Methods to access MSRs in the guest.
Definition: x86_cpu.cc:1485
gem5::X86KvmCPU::setDebugRegisters
void setDebugRegisters(const struct kvm_debugregs &regs)
Definition: x86_cpu.cc:1577
gem5::X86KvmCPU::updateThreadContextXSave
void updateThreadContextXSave(const struct kvm_xsave &kxsave)
Update FPU and SIMD registers using the XSave API.
Definition: x86_cpu.cc:1095
gem5::X86KvmCPU::updateCPUID
void updateCPUID()
Transfer gem5's CPUID values into the virtual CPU.
Definition: x86_cpu.cc:1429
std::vector
STL vector class.
Definition: stl.hh:37
gem5::X86KvmCPU::updateThreadContextFPU
void updateThreadContextFPU(const struct kvm_fpu &fpu)
Update FPU and SIMD registers using the legacy API.
Definition: x86_cpu.cc:1084
gem5::X86KvmCPU::dumpXSave
void dumpXSave() const
Definition: x86_cpu.cc:642
gem5::X86KvmCPU::cachedMsrIntersection
Kvm::MSRIndexVector cachedMsrIntersection
Cached intersection of supported MSRs.
Definition: x86_cpu.hh:248
gem5::X86KvmCPU::setMSR
void setMSR(uint32_t index, uint64_t value)
Definition: x86_cpu.cc:1514
gem5::X86KvmCPU::kvmRunDrain
Tick kvmRunDrain() override
Run the virtual CPU until draining completes.
Definition: x86_cpu.cc:1239
gem5::X86KvmCPU::ioctlRun
void ioctlRun() override
Override for synchronizing state in kvm_run.
Definition: x86_cpu.cc:1396
gem5::X86KvmCPU::archIsDrained
bool archIsDrained() const override
Check if there are pending events in the vCPU that prevents it from being drained.
Definition: x86_cpu.cc:1367
gem5::X86KvmCPU::getMsrIntersection
const Kvm::MSRIndexVector & getMsrIntersection() const
Get a list of MSRs supported by both gem5 and KVM.
Definition: x86_cpu.cc:1545
gem5::X86KvmCPU::KvmMSRVector
std::vector< struct kvm_msr_entry > KvmMSRVector
Definition: x86_cpu.hh:72
gem5::X86KvmCPU::haveDebugRegs
bool haveDebugRegs
Kvm::capDebugRegs() available?
Definition: x86_cpu.hh:252
gem5::X86KvmCPU::getMSR
uint64_t getMSR(uint32_t index) const
Definition: x86_cpu.cc:1529
gem5::X86KvmCPU::updateKvmStateSRegs
void updateKvmStateSRegs()
Update control registers (CRx, segments, etc.)
Definition: x86_cpu.cc:762
gem5::SimObject::params
const Params & params() const
Definition: sim_object.hh:176
gem5::BaseKvmCPU
Base class for KVM based CPU models.
Definition: base.hh:87
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::X86KvmCPU::updateKvmStateMSRs
void updateKvmStateMSRs()
Update MSR registers.
Definition: x86_cpu.cc:923
gem5::X86KvmCPU::setXCRs
void setXCRs(const struct kvm_xcrs &regs)
Definition: x86_cpu.cc:1595
gem5::X86KvmCPU::getMSRs
void getMSRs(struct kvm_msrs &msrs) const
Definition: x86_cpu.cc:1505
gem5::X86KvmCPU::dumpFpuRegs
void dumpFpuRegs() const
Definition: x86_cpu.cc:592
gem5::X86KvmCPU
x86 implementation of a KVM-based hardware virtualized CPU.
Definition: x86_cpu.hh:51
gem5::X86KvmCPU::getHostCycles
uint64_t getHostCycles() const override
Get the value of the hardware cycle counter in the guest.
Definition: x86_cpu.cc:1264
gem5::X86KvmCPU::handleKvmExitIO
Tick handleKvmExitIO() override
Handle x86 legacy IO (in/out)
Definition: x86_cpu.cc:1295
gem5::X86KvmCPU::updateThreadContextMSRs
void updateThreadContextMSRs()
Update MSR registers.
Definition: x86_cpu.cc:1108
base.hh
vm.hh
gem5::X86KvmCPU::updateKvmState
void updateKvmState() override
Update the KVM state from the current thread context.
Definition: x86_cpu.cc:682
gem5::X86KvmCPU::getVCpuEvents
void getVCpuEvents(struct kvm_vcpu_events &events) const
Definition: x86_cpu.cc:1617
gem5::X86KvmCPU::getXSave
void getXSave(struct kvm_xsave &xsave) const
Definition: x86_cpu.cc:1602
gem5::X86KvmCPU::deliverInterrupts
void deliverInterrupts()
Inject pending interrupts from gem5 into the virtual CPU.
Definition: x86_cpu.cc:1138
gem5::X86KvmCPU::dump
void dump() const override
Dump the internal state to the terminal.
Definition: x86_cpu.cc:577
gem5::X86KvmCPU::haveXCRs
bool haveXCRs
Kvm::capXCRs() available?
Definition: x86_cpu.hh:261
gem5::X86KvmCPU::updateKvmStateFPUXSave
void updateKvmStateFPUXSave()
Update FPU and SIMD registers using the XSave API.
Definition: x86_cpu.cc:889
gem5::X86KvmCPU::updateKvmStateFPULegacy
void updateKvmStateFPULegacy()
Update FPU and SIMD registers using the legacy API.
Definition: x86_cpu.cc:865
gem5::X86KvmCPU::X86KvmCPU
X86KvmCPU(const X86KvmCPUParams &params)
Definition: x86_cpu.cc:530
gem5::X86KvmCPU::kvmRun
Tick kvmRun(Tick ticks) override
Request KVM to run the guest for a given number of ticks.
Definition: x86_cpu.cc:1191
gem5::X86KvmCPU::handleKvmExitIRQWindowOpen
Tick handleKvmExitIRQWindowOpen() override
The guest exited because an interrupt window was requested.
Definition: x86_cpu.cc:1358
gem5::X86KvmCPU::setXSave
void setXSave(const struct kvm_xsave &xsave)
Definition: x86_cpu.cc:1609
gem5::X86KvmCPU::getXCRs
void getXCRs(struct kvm_xcrs &regs) const
Definition: x86_cpu.cc:1588
gem5::X86KvmCPU::updateThreadContextSRegs
void updateThreadContextSRegs(const struct kvm_sregs &sregs)
Update control registers (CRx, segments, etc.)
Definition: x86_cpu.cc:1033
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::X86KvmCPU::updateThreadContext
void updateThreadContext() override
Update the current thread context with the KVM state.
Definition: x86_cpu.cc:945
gem5::X86KvmCPU::dumpMSRs
void dumpMSRs() const
Definition: x86_cpu.cc:662
gem5::X86KvmCPU::useXSave
bool useXSave
Should the XSave interface be used to sync the FPU and SIMD registers?
Definition: x86_cpu.hh:259
gem5::X86KvmCPU::setVCpuEvents
void setVCpuEvents(const struct kvm_vcpu_events &events)
Definition: x86_cpu.cc:1624

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