gem5  v21.2.1.1
x86_cpu.hh
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28 
29 #ifndef __CPU_KVM_X86_CPU_HH__
30 #define __CPU_KVM_X86_CPU_HH__
31 
32 #include <vector>
33 
34 #include "arch/x86/pcstate.hh"
35 #include "cpu/kvm/base.hh"
36 #include "cpu/kvm/vm.hh"
37 #include "params/X86KvmCPU.hh"
38 
39 struct kvm_debugregs;
40 struct kvm_msr_entry;
41 struct kvm_msrs;
42 struct kvm_vcpu_events;
43 struct kvm_xcrs;
44 struct kvm_xsave;
45 
46 namespace gem5
47 {
48 
52 class X86KvmCPU : public BaseKvmCPU
53 {
54  public:
55  X86KvmCPU(const X86KvmCPUParams &params);
56  virtual ~X86KvmCPU();
57 
58  void startup() override;
59 
61  void dump() const override;
62  void dumpFpuRegs() const;
63  void dumpIntRegs() const;
64  void dumpSpecRegs() const;
65  void dumpDebugRegs() const;
66  void dumpXCRs() const;
67  void dumpXSave() const;
68  void dumpVCpuEvents() const;
69  void dumpMSRs() const;
72  protected:
74 
75  Tick kvmRun(Tick ticks) override;
76 
92  Tick kvmRunDrain() override;
93 
94  uint64_t getHostCycles() const override;
95  void
96  stutterPC(PCStateBase &pc) const override
97  {
98  pc.as<X86ISA::PCState>().setNPC(pc.instAddr());
99  }
100 
107  void setCPUID(const struct kvm_cpuid2 &cpuid);
108  void setCPUID(const Kvm::CPUIDVector &cpuid);
116  void setMSRs(const struct kvm_msrs &msrs);
117  void setMSRs(const KvmMSRVector &msrs);
118  void getMSRs(struct kvm_msrs &msrs) const;
119  void setMSR(uint32_t index, uint64_t value);
120  uint64_t getMSR(uint32_t index) const;
131  const Kvm::MSRIndexVector &getMsrIntersection() const;
132 
138  void getDebugRegisters(struct kvm_debugregs &regs) const;
139  void setDebugRegisters(const struct kvm_debugregs &regs);
140  void getXCRs(struct kvm_xcrs &regs) const;
141  void setXCRs(const struct kvm_xcrs &regs);
142  void getXSave(struct kvm_xsave &xsave) const;
143  void setXSave(const struct kvm_xsave &xsave);
144  void getVCpuEvents(struct kvm_vcpu_events &events) const;
145  void setVCpuEvents(const struct kvm_vcpu_events &events);
148  void updateKvmState() override;
149  void updateThreadContext() override;
150 
154  void deliverInterrupts();
155 
159  Tick handleKvmExitIO() override;
160 
161  Tick handleKvmExitIRQWindowOpen() override;
162 
174  bool archIsDrained() const override;
175 
177  void ioctlRun() override;
178 
179  private:
187  void updateKvmStateRegs();
189  void updateKvmStateSRegs();
200  void updateKvmStateFPU();
216  void updateKvmStateFPUXSave();
218  void updateKvmStateMSRs();
228  void updateThreadContextRegs(const struct kvm_regs &regs,
229  const struct kvm_sregs &sregs);
231  void updateThreadContextSRegs(const struct kvm_sregs &sregs);
233  void updateThreadContextFPU(const struct kvm_fpu &fpu);
235  void updateThreadContextXSave(const struct kvm_xsave &kxsave);
241  void updateCPUID();
242 
251  void handleIOMiscReg32(int miscreg);
252 
254  mutable Kvm::MSRIndexVector cachedMsrIntersection;
255 
260  bool haveXSave;
265  bool useXSave;
267  bool haveXCRs;
269 };
270 
271 } // namespace gem5
272 
273 #endif
gem5::X86KvmCPU::dumpDebugRegs
void dumpDebugRegs() const
Definition: x86_cpu.cc:622
pcstate.hh
gem5::X86KvmCPU::setCPUID
void setCPUID(const struct kvm_cpuid2 &cpuid)
Methods to access CPUID information using the extended API.
Definition: x86_cpu.cc:1471
gem5::X86KvmCPU::updateThreadContextRegs
void updateThreadContextRegs(const struct kvm_regs &regs, const struct kvm_sregs &sregs)
Support routines to update the state of gem5's thread context from KVM's state representation.
Definition: x86_cpu.cc:984
gem5::X86KvmCPU::dumpSpecRegs
void dumpSpecRegs() const
Definition: x86_cpu.cc:614
gem5::X86KvmCPU::startup
void startup() override
Definition: x86_cpu.cc:569
gem5::X86KvmCPU::dumpVCpuEvents
void dumpVCpuEvents() const
Definition: x86_cpu.cc:660
gem5::X86KvmCPU::haveXSave
bool haveXSave
Kvm::capXSave() available?
Definition: x86_cpu.hh:260
gem5::MipsISA::cpuid
Bitfield< 28, 21 > cpuid
Definition: dt_constants.hh:95
gem5::X86KvmCPU::dumpXCRs
void dumpXCRs() const
Definition: x86_cpu.cc:636
gem5::X86KvmCPU::~X86KvmCPU
virtual ~X86KvmCPU()
Definition: x86_cpu.cc:564
gem5::X86KvmCPU::dumpIntRegs
void dumpIntRegs() const
Definition: x86_cpu.cc:606
gem5::MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:47
gem5::X86KvmCPU::handleIOMiscReg32
void handleIOMiscReg32(int miscreg)
Handle a 32-bit IO access that should be mapped to a MiscReg.
Definition: x86_cpu.cc:1275
gem5::X86KvmCPU::getDebugRegisters
void getDebugRegisters(struct kvm_debugregs &regs) const
Wrappers around KVM's state transfer methods.
Definition: x86_cpu.cc:1570
gem5::X86KvmCPU::updateKvmStateFPU
void updateKvmStateFPU()
Update FPU and SIMD registers.
Definition: x86_cpu.cc:919
gem5::X86KvmCPU::updateKvmStateRegs
void updateKvmStateRegs()
Support routines to update the state of the KVM CPU from gem5's state representation.
Definition: x86_cpu.cc:700
gem5::X86KvmCPU::setMSRs
void setMSRs(const struct kvm_msrs &msrs)
Methods to access MSRs in the guest.
Definition: x86_cpu.cc:1491
gem5::X86KvmCPU::setDebugRegisters
void setDebugRegisters(const struct kvm_debugregs &regs)
Definition: x86_cpu.cc:1581
gem5::X86KvmCPU::updateThreadContextXSave
void updateThreadContextXSave(const struct kvm_xsave &kxsave)
Update FPU and SIMD registers using the XSave API.
Definition: x86_cpu.cc:1100
gem5::X86KvmCPU::updateCPUID
void updateCPUID()
Transfer gem5's CPUID values into the virtual CPU.
Definition: x86_cpu.cc:1435
std::vector
STL vector class.
Definition: stl.hh:37
gem5::X86KvmCPU::updateThreadContextFPU
void updateThreadContextFPU(const struct kvm_fpu &fpu)
Update FPU and SIMD registers using the legacy API.
Definition: x86_cpu.cc:1089
gem5::X86KvmCPU::dumpXSave
void dumpXSave() const
Definition: x86_cpu.cc:648
gem5::X86KvmCPU::cachedMsrIntersection
Kvm::MSRIndexVector cachedMsrIntersection
Cached intersection of supported MSRs.
Definition: x86_cpu.hh:254
gem5::X86KvmCPU::setMSR
void setMSR(uint32_t index, uint64_t value)
Definition: x86_cpu.cc:1520
gem5::X86KvmCPU::kvmRunDrain
Tick kvmRunDrain() override
Run the virtual CPU until draining completes.
Definition: x86_cpu.cc:1244
gem5::X86KvmCPU::ioctlRun
void ioctlRun() override
Override for synchronizing state in kvm_run.
Definition: x86_cpu.cc:1402
gem5::X86KvmCPU::archIsDrained
bool archIsDrained() const override
Check if there are pending events in the vCPU that prevents it from being drained.
Definition: x86_cpu.cc:1373
gem5::X86KvmCPU::getMsrIntersection
const Kvm::MSRIndexVector & getMsrIntersection() const
Get a list of MSRs supported by both gem5 and KVM.
Definition: x86_cpu.cc:1549
gem5::X86KvmCPU::KvmMSRVector
std::vector< struct kvm_msr_entry > KvmMSRVector
Definition: x86_cpu.hh:73
gem5::X86KvmCPU::haveDebugRegs
bool haveDebugRegs
Kvm::capDebugRegs() available?
Definition: x86_cpu.hh:258
gem5::X86KvmCPU::getMSR
uint64_t getMSR(uint32_t index) const
Definition: x86_cpu.cc:1534
gem5::X86KvmCPU::updateKvmStateSRegs
void updateKvmStateSRegs()
Update control registers (CRx, segments, etc.)
Definition: x86_cpu.cc:767
gem5::BaseKvmCPU
Base class for KVM based CPU models.
Definition: base.hh:87
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::X86KvmCPU::updateKvmStateMSRs
void updateKvmStateMSRs()
Update MSR registers.
Definition: x86_cpu.cc:928
gem5::X86KvmCPU::setXCRs
void setXCRs(const struct kvm_xcrs &regs)
Definition: x86_cpu.cc:1599
gem5::X86KvmCPU::getMSRs
void getMSRs(struct kvm_msrs &msrs) const
Definition: x86_cpu.cc:1511
gem5::X86KvmCPU::dumpFpuRegs
void dumpFpuRegs() const
Definition: x86_cpu.cc:598
gem5::X86KvmCPU
x86 implementation of a KVM-based hardware virtualized CPU.
Definition: x86_cpu.hh:52
gem5::X86KvmCPU::getHostCycles
uint64_t getHostCycles() const override
Get the value of the hardware cycle counter in the guest.
Definition: x86_cpu.cc:1269
gem5::X86KvmCPU::handleKvmExitIO
Tick handleKvmExitIO() override
Handle x86 legacy IO (in/out)
Definition: x86_cpu.cc:1300
gem5::X86KvmCPU::updateThreadContextMSRs
void updateThreadContextMSRs()
Update MSR registers.
Definition: x86_cpu.cc:1113
base.hh
vm.hh
gem5::X86KvmCPU::updateKvmState
void updateKvmState() override
Update the KVM state from the current thread context.
Definition: x86_cpu.cc:687
gem5::X86KvmCPU::getVCpuEvents
void getVCpuEvents(struct kvm_vcpu_events &events) const
Definition: x86_cpu.cc:1621
gem5::X86KvmCPU::getXSave
void getXSave(struct kvm_xsave &xsave) const
Definition: x86_cpu.cc:1606
gem5::X86KvmCPU::deliverInterrupts
void deliverInterrupts()
Inject pending interrupts from gem5 into the virtual CPU.
Definition: x86_cpu.cc:1143
gem5::X86KvmCPU::dump
void dump() const override
Dump the internal state to the terminal.
Definition: x86_cpu.cc:583
gem5::X86KvmCPU::haveXCRs
bool haveXCRs
Kvm::capXCRs() available?
Definition: x86_cpu.hh:267
gem5::X86KvmCPU::updateKvmStateFPUXSave
void updateKvmStateFPUXSave()
Update FPU and SIMD registers using the XSave API.
Definition: x86_cpu.cc:894
gem5::X86KvmCPU::stutterPC
void stutterPC(PCStateBase &pc) const override
Modify a PCStatePtr's value so that its next PC is the current PC.
Definition: x86_cpu.hh:96
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5::X86KvmCPU::updateKvmStateFPULegacy
void updateKvmStateFPULegacy()
Update FPU and SIMD registers using the legacy API.
Definition: x86_cpu.cc:870
gem5::X86ISA::PCState
Definition: pcstate.hh:50
gem5::X86KvmCPU::X86KvmCPU
X86KvmCPU(const X86KvmCPUParams &params)
Definition: x86_cpu.cc:536
gem5::X86KvmCPU::kvmRun
Tick kvmRun(Tick ticks) override
Request KVM to run the guest for a given number of ticks.
Definition: x86_cpu.cc:1196
gem5::X86KvmCPU::handleKvmExitIRQWindowOpen
Tick handleKvmExitIRQWindowOpen() override
The guest exited because an interrupt window was requested.
Definition: x86_cpu.cc:1364
gem5::X86KvmCPU::setXSave
void setXSave(const struct kvm_xsave &xsave)
Definition: x86_cpu.cc:1613
gem5::X86KvmCPU::getXCRs
void getXCRs(struct kvm_xcrs &regs) const
Definition: x86_cpu.cc:1592
gem5::X86KvmCPU::updateThreadContextSRegs
void updateThreadContextSRegs(const struct kvm_sregs &sregs)
Update control registers (CRx, segments, etc.)
Definition: x86_cpu.cc:1038
gem5::PCStateBase
Definition: pcstate.hh:57
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::X86KvmCPU::updateThreadContext
void updateThreadContext() override
Update the current thread context with the KVM state.
Definition: x86_cpu.cc:950
gem5::X86KvmCPU::dumpMSRs
void dumpMSRs() const
Definition: x86_cpu.cc:668
gem5::X86KvmCPU::useXSave
bool useXSave
Should the XSave interface be used to sync the FPU and SIMD registers?
Definition: x86_cpu.hh:265
gem5::X86KvmCPU::setVCpuEvents
void setVCpuEvents(const struct kvm_vcpu_events &events)
Definition: x86_cpu.cc:1628

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