gem5 v24.0.0.0
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x86_cpu.hh
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1/*
2 * Copyright (c) 2013 Andreas Sandberg
3 * All rights reserved
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __CPU_KVM_X86_CPU_HH__
30#define __CPU_KVM_X86_CPU_HH__
31
32#include <vector>
33
34#include "arch/x86/pcstate.hh"
35#include "cpu/kvm/base.hh"
36#include "cpu/kvm/vm.hh"
37#include "params/X86KvmCPU.hh"
38
39struct kvm_debugregs;
40struct kvm_msr_entry;
41struct kvm_msrs;
42struct kvm_vcpu_events;
43struct kvm_xcrs;
44struct kvm_xsave;
45
46namespace gem5
47{
48
52class X86KvmCPU : public BaseKvmCPU
53{
54 public:
55 X86KvmCPU(const X86KvmCPUParams &params);
56 virtual ~X86KvmCPU();
57
58 void startup() override;
59 void init() override;
60
62 void dump() const override;
63 void dumpFpuRegs() const;
64 void dumpIntRegs() const;
65 void dumpSpecRegs() const;
66 void dumpDebugRegs() const;
67 void dumpXCRs() const;
68 void dumpXSave() const;
69 void dumpVCpuEvents() const;
70 void dumpMSRs() const;
73 protected:
75
76 Tick kvmRun(Tick ticks) override;
77
93 Tick kvmRunDrain() override;
94
95 uint64_t getHostCycles() const override;
96 void
97 stutterPC(PCStateBase &pc) const override
98 {
99 pc.as<X86ISA::PCState>().setNPC(pc.instAddr());
100 }
101
108 void setCPUID(const struct kvm_cpuid2 &cpuid);
109 void setCPUID(const Kvm::CPUIDVector &cpuid);
117 void setMSRs(const struct kvm_msrs &msrs);
118 void setMSRs(const KvmMSRVector &msrs);
119 void getMSRs(struct kvm_msrs &msrs) const;
120 void setMSR(uint32_t index, uint64_t value);
121 uint64_t getMSR(uint32_t index) const;
132 const Kvm::MSRIndexVector &getMsrIntersection() const;
133
139 void getDebugRegisters(struct kvm_debugregs &regs) const;
140 void setDebugRegisters(const struct kvm_debugregs &regs);
141 void getXCRs(struct kvm_xcrs &regs) const;
142 void setXCRs(const struct kvm_xcrs &regs);
143 void getXSave(struct kvm_xsave &xsave) const;
144 void setXSave(const struct kvm_xsave &xsave);
145 void getVCpuEvents(struct kvm_vcpu_events &events) const;
146 void setVCpuEvents(const struct kvm_vcpu_events &events);
149 void updateKvmState() override;
150 void updateThreadContext() override;
151
155 void deliverInterrupts();
156
160 Tick handleKvmExitIO() override;
161
163
175 bool archIsDrained() const override;
176
178 void ioctlRun() override;
179
180 private:
188 void updateKvmStateRegs();
190 void updateKvmStateSRegs();
201 void updateKvmStateFPU();
219 void updateKvmStateMSRs();
221 void updateKvmStateXCRs();
231 void updateThreadContextRegs(const struct kvm_regs &regs,
232 const struct kvm_sregs &sregs);
234 void updateThreadContextSRegs(const struct kvm_sregs &sregs);
236 void updateThreadContextFPU(const struct kvm_fpu &fpu);
238 void updateThreadContextXSave(const struct kvm_xsave &kxsave);
246 void updateCPUID();
247
256 void handleIOMiscReg32(int miscreg);
257
259 mutable Kvm::MSRIndexVector cachedMsrIntersection;
260
274};
275
276} // namespace gem5
277
278#endif
Base class for KVM based CPU models.
Definition base.hh:88
x86 implementation of a KVM-based hardware virtualized CPU.
Definition x86_cpu.hh:53
void updateThreadContextFPU(const struct kvm_fpu &fpu)
Update FPU and SIMD registers using the legacy API.
Definition x86_cpu.cc:1159
Tick handleKvmExitIRQWindowOpen() override
The guest exited because an interrupt window was requested.
Definition x86_cpu.cc:1449
void updateThreadContextXSave(const struct kvm_xsave &kxsave)
Update FPU and SIMD registers using the XSave API.
Definition x86_cpu.cc:1170
void updateThreadContextMSRs()
Update MSR registers.
Definition x86_cpu.cc:1183
void startup() override
startup() is the final initialization call before simulation.
Definition x86_cpu.cc:611
void updateKvmState() override
Update the KVM state from the current thread context.
Definition x86_cpu.cc:729
void updateCPUID()
Transfer gem5's CPUID values into the virtual CPU.
Definition x86_cpu.cc:1520
void handleIOMiscReg32(int miscreg)
Handle a 32-bit IO access that should be mapped to a MiscReg.
Definition x86_cpu.cc:1360
void dumpIntRegs() const
Definition x86_cpu.cc:648
void setMSRs(const struct kvm_msrs &msrs)
Methods to access MSRs in the guest.
Definition x86_cpu.cc:1619
void setCPUID(const struct kvm_cpuid2 &cpuid)
Methods to access CPUID information using the extended API.
Definition x86_cpu.cc:1599
void getXSave(struct kvm_xsave &xsave) const
Definition x86_cpu.cc:1734
void dumpXSave() const
Definition x86_cpu.cc:690
bool haveXCRs
Kvm::capXCRs() available?
Definition x86_cpu.hh:272
void updateKvmStateSRegs()
Update control registers (CRx, segments, etc.)
Definition x86_cpu.cc:805
void getXCRs(struct kvm_xcrs &regs) const
Definition x86_cpu.cc:1720
bool useXSave
Should the XSave interface be used to sync the FPU and SIMD registers?
Definition x86_cpu.hh:270
void getVCpuEvents(struct kvm_vcpu_events &events) const
Definition x86_cpu.cc:1749
X86KvmCPU(const X86KvmCPUParams &params)
Definition x86_cpu.cc:572
void updateKvmStateFPU()
Update FPU and SIMD registers.
Definition x86_cpu.cc:970
std::vector< struct kvm_msr_entry > KvmMSRVector
Definition x86_cpu.hh:74
uint64_t getHostCycles() const override
Get the value of the hardware cycle counter in the guest.
Definition x86_cpu.cc:1354
void dumpFpuRegs() const
Definition x86_cpu.cc:640
void updateKvmStateMSRs()
Update MSR registers.
Definition x86_cpu.cc:979
void getDebugRegisters(struct kvm_debugregs &regs) const
Wrappers around KVM's state transfer methods.
Definition x86_cpu.cc:1698
void updateKvmStateRegs()
Support routines to update the state of the KVM CPU from gem5's state representation.
Definition x86_cpu.cc:743
Tick kvmRunDrain() override
Run the virtual CPU until draining completes.
Definition x86_cpu.cc:1329
const Kvm::MSRIndexVector & getMsrIntersection() const
Get a list of MSRs supported by both gem5 and KVM.
Definition x86_cpu.cc:1677
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition x86_cpu.cc:578
void dumpSpecRegs() const
Definition x86_cpu.cc:656
void setMSR(uint32_t index, uint64_t value)
Definition x86_cpu.cc:1648
void stutterPC(PCStateBase &pc) const override
Modify a PCStatePtr's value so that its next PC is the current PC.
Definition x86_cpu.hh:97
void ioctlRun() override
Override for synchronizing state in kvm_run.
Definition x86_cpu.cc:1487
void setXCRs(const struct kvm_xcrs &regs)
Definition x86_cpu.cc:1727
void dumpMSRs() const
Definition x86_cpu.cc:710
void updateThreadContext() override
Update the current thread context with the KVM state.
Definition x86_cpu.cc:1019
void getMSRs(struct kvm_msrs &msrs) const
Definition x86_cpu.cc:1639
Tick kvmRun(Tick ticks) override
Request KVM to run the guest for a given number of ticks.
Definition x86_cpu.cc:1281
void updateKvmStateXCRs()
Update XCR registers.
Definition x86_cpu.cc:1001
void setVCpuEvents(const struct kvm_vcpu_events &events)
Definition x86_cpu.cc:1756
void deliverInterrupts()
Inject pending interrupts from gem5 into the virtual CPU.
Definition x86_cpu.cc:1228
void updateThreadContextXCRs()
Update XCR registers.
Definition x86_cpu.cc:1213
bool haveDebugRegs
Kvm::capDebugRegs() available?
Definition x86_cpu.hh:263
void dump() const override
Dump the internal state to the terminal.
Definition x86_cpu.cc:625
bool archIsDrained() const override
Check if there are pending events in the vCPU that prevents it from being drained.
Definition x86_cpu.cc:1458
Kvm::MSRIndexVector cachedMsrIntersection
Cached intersection of supported MSRs.
Definition x86_cpu.hh:259
void setXSave(const struct kvm_xsave &xsave)
Definition x86_cpu.cc:1741
void dumpVCpuEvents() const
Definition x86_cpu.cc:702
uint64_t getMSR(uint32_t index) const
Definition x86_cpu.cc:1662
void dumpXCRs() const
Definition x86_cpu.cc:678
Tick handleKvmExitIO() override
Handle x86 legacy IO (in/out)
Definition x86_cpu.cc:1385
void updateThreadContextRegs(const struct kvm_regs &regs, const struct kvm_sregs &sregs)
Support routines to update the state of gem5's thread context from KVM's state representation.
Definition x86_cpu.cc:1054
void setDebugRegisters(const struct kvm_debugregs &regs)
Definition x86_cpu.cc:1709
bool haveXSave
Kvm::capXSave() available?
Definition x86_cpu.hh:265
void updateKvmStateFPUXSave()
Update FPU and SIMD registers using the XSave API.
Definition x86_cpu.cc:932
virtual ~X86KvmCPU()
Definition x86_cpu.cc:606
void dumpDebugRegs() const
Definition x86_cpu.cc:664
void updateKvmStateFPULegacy()
Update FPU and SIMD registers using the legacy API.
Definition x86_cpu.cc:908
void updateThreadContextSRegs(const struct kvm_sregs &sregs)
Update control registers (CRx, segments, etc.)
Definition x86_cpu.cc:1108
STL vector class.
Definition stl.hh:37
const Params & params() const
Bitfield< 4 > pc
Bitfield< 30, 0 > index
Bitfield< 28, 21 > cpuid
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Tick
Tick count type.
Definition types.hh:58

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