Device model for an Intel PIIX4 IDE controller. More...

#include <ide_ctrl.hh>

Inheritance diagram for IdeController:

Public Types
typedef IdeControllerParams	Params

Public Types inherited from DmaDevice
typedef DmaDeviceParams	Params

Public Types inherited from PioDevice
typedef PioDeviceParams	Params

Public Types inherited from ClockedObject
typedef ClockedObjectParams	Params
	Parameters of ClockedObject. More...

Public Types inherited from SimObject
typedef SimObjectParams	Params

Public Member Functions
const Params *	params () const

	IdeController (Params *p)

bool	isDiskSelected (IdeDisk *diskPtr)
	See if a disk is selected based on its pointer. More...

void	intrPost ()

Tick	writeConfig (PacketPtr pkt) override
	Write to the PCI config space data that is stored locally. More...

Tick	readConfig (PacketPtr pkt) override
	Read from the PCI config space data that is stored locally. More...

void	setDmaComplete (IdeDisk *disk)

Tick	read (PacketPtr pkt) override
	Pure virtual function that the device must implement. More...

Tick	write (PacketPtr pkt) override
	Pure virtual function that the device must implement. More...

void	serialize (CheckpointOut &cp) const override
	Serialize this object to the given output stream. More...

void	unserialize (CheckpointIn &cp) override
	Reconstruct the state of this object from a checkpoint. More...

Public Member Functions inherited from PciDevice
Addr	pciToDma (Addr pci_addr) const

void	intrPost ()

void	intrClear ()

uint8_t	interruptLine () const

AddrRangeList	getAddrRanges () const override
	Determine the address ranges that this device responds to. More...

	PciDevice (const PciDeviceParams *params)
	Constructor for PCI Dev. More...

const PciBusAddr &	busAddr () const

Public Member Functions inherited from DmaDevice
	DmaDevice (const Params *p)

virtual	~DmaDevice ()

void	dmaWrite (Addr addr, int size, Event event, uint8_t data, uint32_t sid, uint32_t ssid, Tick delay=0)

void	dmaWrite (Addr addr, int size, Event event, uint8_t data, Tick delay=0)

void	dmaRead (Addr addr, int size, Event event, uint8_t data, uint32_t sid, uint32_t ssid, Tick delay=0)

void	dmaRead (Addr addr, int size, Event event, uint8_t data, Tick delay=0)

bool	dmaPending () const

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

unsigned int	cacheBlockSize () const

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index. More...

Public Member Functions inherited from PioDevice
	PioDevice (const Params *p)

virtual	~PioDevice ()

const Params *	params () const

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index. More...

Public Member Functions inherited from ClockedObject
	ClockedObject (const ClockedObjectParams *p)

const Params *	params () const

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from SimObject
virtual	~SimObject ()

virtual const std::string	name () const

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

virtual void	startup ()
	startup() is the final initialization call before simulation. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

const Params *	params () const

	SimObject (const Params *_params)

Public Member Functions inherited from EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from Stats::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group. More...

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters. More...

virtual void	resetStats ()
	Callback to reset stats. More...

virtual void	preDumpStats ()
	Callback before stats are dumped. More...

void	addStat (Stats::Info *info)
	Register a stat with this group. More...

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block. More...

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from Clocked
void	updateClockPeriod ()
	Update the tick to the current tick. More...

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge. More...

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Private Member Functions
	BitUnion8 (BMIStatusReg) Bitfield< 6 > dmaCap0

	EndBitUnion (BMIStatusReg) BitUnion8(BMICommandReg) Bitfield< 3 > rw

	EndBitUnion (BMICommandReg) struct Channel

void	dispatchAccess (PacketPtr pkt, bool read)

Private Attributes
Bitfield< 5 >	dmaCap1

Bitfield< 2 >	intStatus

Bitfield< 1 >	dmaError

Bitfield< 0 >	active

Bitfield< 0 >	startStop

Channel	primary

Channel	secondary

Addr	bmiAddr
	Bus master interface (BMI) registers. More...

Addr	bmiSize

uint16_t	primaryTiming
	Registers used in device specific PCI configuration. More...

uint16_t	secondaryTiming

uint8_t	deviceTiming

uint8_t	udmaControl

uint16_t	udmaTiming

uint16_t	ideConfig

bool	ioEnabled

bool	bmEnabled

uint32_t	ioShift

uint32_t	ctrlOffset

Additional Inherited Members
Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...

static void	serializeAll (const std::string &cpt_dir)

static void	unserializeGlobals (CheckpointIn &cp)

Public Attributes inherited from ClockedObject
PowerState *	powerState

Protected Member Functions inherited from PciDevice
bool	isLargeBAR (int bar) const
	Does the given BAR represent 32 lower bits of a 64-bit address? More...

bool	isBAR (Addr addr, int bar) const
	Does the given address lie within the space mapped by the given base address register? More...

int	getBAR (Addr addr)
	Which base address register (if any) maps the given address? More...

bool	getBAR (Addr addr, int &bar, Addr &offs)
	Which base address register (if any) maps the given address? More...

Protected Member Functions inherited from Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain. More...

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Member Functions inherited from Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters. More...

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance. More...

void	resetClock () const
	Reset the object's clock using the current global tick value. More...

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...

Protected Attributes inherited from PciDevice
const PciBusAddr	_busAddr

PCIConfig	config
	The current config space. More...

std::vector< MSIXTable >	msix_table
	MSIX Table and PBA Structures. More...

std::vector< MSIXPbaEntry >	msix_pba

uint32_t	BARSize [6]
	The size of the BARs. More...

Addr	BARAddrs [6]
	The current address mapping of the BARs. More...

bool	legacyIO [6]
	Whether the BARs are really hardwired legacy IO locations. More...

PciHost::DeviceInterface	hostInterface

Tick	pioDelay

Tick	configDelay

const int	PMCAP_BASE
	The capability list structures and base addresses. More...

const int	PMCAP_ID_OFFSET

const int	PMCAP_PC_OFFSET

const int	PMCAP_PMCS_OFFSET

PMCAP	pmcap

const int	MSICAP_BASE

MSICAP	msicap

const int	MSIXCAP_BASE

const int	MSIXCAP_ID_OFFSET

const int	MSIXCAP_MXC_OFFSET

const int	MSIXCAP_MTAB_OFFSET

const int	MSIXCAP_MPBA_OFFSET

int	MSIX_TABLE_OFFSET

int	MSIX_TABLE_END

int	MSIX_PBA_OFFSET

int	MSIX_PBA_END

MSIXCAP	msixcap

const int	PXCAP_BASE

PXCAP	pxcap

Protected Attributes inherited from DmaDevice
DmaPort	dmaPort

Protected Attributes inherited from PioDevice
System *	sys

PioPort< PioDevice >	pioPort
	The pioPort that handles the requests for us and provides us requests that it sees. More...

Protected Attributes inherited from SimObject
const SimObjectParams *	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Detailed Description

Device model for an Intel PIIX4 IDE controller.

Definition at line 48 of file ide_ctrl.hh.

Member Typedef Documentation

◆ Params

typedef IdeControllerParams IdeController::Params

Definition at line 140 of file ide_ctrl.hh.

Constructor & Destructor Documentation

◆ IdeController()

IdeController::IdeController ( Params * p )

Definition at line 91 of file ide_ctrl.cc.

References BAR_IO_MASK, PciDevice::BARAddrs, PciDevice::BARSize, bmEnabled, PCIConfig::command, PciDevice::config, System::getPageBytes(), htole(), ArmISA::i, ioEnabled, ioShift, PciDevice::legacyIO, panic, params(), PCI_CMD_BME, PCI_CMD_IOSE, primary, secondary, and PioDevice::sys.

Referenced by params(), and unserialize().

Member Function Documentation

◆ BitUnion8()

IdeController::BitUnion8 ( BMIStatusReg )

private

◆ dispatchAccess()

void IdeController::dispatchAccess	(	PacketPtr	pkt,
		bool	read
	)

private

Definition at line 484 of file ide_ctrl.cc.

References addr, bmEnabled, bmiAddr, bmiSize, ctrlOffset, data, DPRINTF, Packet::getAddr(), Packet::getLE(), Packet::getPtr(), Packet::getSize(), ioEnabled, ioShift, Packet::makeAtomicResponse(), panic, primary, and secondary.

Referenced by read(), and write().

◆ EndBitUnion() [1/2]

IdeController::EndBitUnion ( BMIStatusReg )

private

◆ EndBitUnion() [2/2]

IdeController::EndBitUnion ( BMICommandReg )

inlineprivate

Command and control block registers

Registers used for bus master interface

IDE disks connected to this controller

Currently selected disk

Definition at line 63 of file ide_ctrl.hh.

References X86ISA::base, data, SimObject::name(), ArmISA::offset, X86ISA::os, read(), Stats::reset(), serialize(), ArmISA::status, and unserialize().

◆ intrPost()

void IdeController::intrPost ( )

Definition at line 149 of file ide_ctrl.cc.

References PciDevice::intrPost(), and primary.

Referenced by IdeDisk::intrPost(), and params().

◆ isDiskSelected()

bool IdeController::isDiskSelected ( IdeDisk * diskPtr )

See if a disk is selected based on its pointer.

Definition at line 143 of file ide_ctrl.cc.

References primary, and secondary.

Referenced by IdeDisk::isDEVSelect(), and params().

◆ params()

const Params* IdeController::params ( ) const

inline

Definition at line 141 of file ide_ctrl.hh.

References SimObject::_params, IdeController(), intrPost(), isDiskSelected(), MipsISA::p, read(), readConfig(), serialize(), setDmaComplete(), unserialize(), write(), and writeConfig().

Referenced by IdeController().

◆ read()

Tick IdeController::read ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements PioDevice.

Definition at line 549 of file ide_ctrl.cc.

References dispatchAccess(), and PciDevice::pioDelay.

Referenced by EndBitUnion(), params(), and writeConfig().

◆ readConfig()

Tick IdeController::readConfig ( PacketPtr pkt )

overridevirtual

Read from the PCI config space data that is stored locally.

This may be overridden by the device but at some point it will eventually call this for normal operations that it does not need to override.

Parameters

pkt	packet containing the write the offset into config space

Reimplemented from PciDevice.

Definition at line 173 of file ide_ctrl.cc.

References bits(), PciDevice::configDelay, DeviceTiming, deviceTiming, DPRINTF, Packet::getAddr(), Packet::getLE(), Packet::getSize(), htole(), IDEConfig, ideConfig, Packet::makeAtomicResponse(), ArmISA::offset, panic, PCI_CONFIG_SIZE, PCI_DEVICE_SPECIFIC, PrimaryTiming, primaryTiming, PciDevice::readConfig(), SecondaryTiming, secondaryTiming, Packet::setLE(), UDMAControl, udmaControl, UDMATiming, and udmaTiming.

Referenced by params().

◆ serialize()

void IdeController::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize this object to the given output stream.

Parameters

os	The stream to serialize to.

Reimplemented from PciDevice.

Definition at line 563 of file ide_ctrl.cc.

References X86ISA::base, bmEnabled, bmiAddr, bmiSize, deviceTiming, ideConfig, ioEnabled, paramOut(), primary, primaryTiming, secondary, secondaryTiming, serialize(), PciDevice::serialize(), SERIALIZE_SCALAR, ArmISA::status, udmaControl, and udmaTiming.

Referenced by EndBitUnion(), and params().

◆ setDmaComplete()

void IdeController::setDmaComplete ( IdeDisk * disk )

Definition at line 156 of file ide_ctrl.cc.

References panic, primary, and secondary.

Referenced by params(), and IdeDisk::updateState().

◆ unserialize()

void IdeController::unserialize ( CheckpointIn & cp )

overridevirtual

Reconstruct the state of this object from a checkpoint.

Parameters

cp	The checkpoint use.
section	The section name of this object

Reimplemented from PciDevice.

Definition at line 606 of file ide_ctrl.cc.

References X86ISA::base, bmEnabled, bmiAddr, bmiSize, deviceTiming, ideConfig, IdeController(), ioEnabled, paramIn(), primary, primaryTiming, secondary, secondaryTiming, ArmISA::status, udmaControl, udmaTiming, unserialize(), PciDevice::unserialize(), and UNSERIALIZE_SCALAR.

Referenced by EndBitUnion(), and params().

◆ write()

Tick IdeController::write ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements PioDevice.

Definition at line 556 of file ide_ctrl.cc.

References dispatchAccess(), and PciDevice::pioDelay.

Referenced by params().

◆ writeConfig()

Tick IdeController::writeConfig ( PacketPtr pkt )

overridevirtual

Write to the PCI config space data that is stored locally.

This may be overridden by the device but at some point it will eventually call this for normal operations that it does not need to override.

Parameters

pkt	packet containing the write the offset into config space

Reimplemented from PciDevice.

Definition at line 255 of file ide_ctrl.cc.

References PciDevice::BARAddrs, bmEnabled, bmiAddr, BMICommand, BMIDescTablePtr, BMIStatus, PCIConfig::command, PciDevice::config, PciDevice::configDelay, data, DeviceTiming, deviceTiming, DPRINTF, Packet::getAddr(), Packet::getLE(), Packet::getSize(), htole(), IDEConfig, ideConfig, ioEnabled, letoh(), Packet::makeAtomicResponse(), ArmISA::offset, panic, PCI0_BASE_ADDR0, PCI0_BASE_ADDR1, PCI0_BASE_ADDR2, PCI0_BASE_ADDR3, PCI0_BASE_ADDR4, PCI_CMD_BME, PCI_CMD_IOSE, PCI_COMMAND, PCI_CONFIG_SIZE, PCI_DEVICE_SPECIFIC, primary, PrimaryTiming, primaryTiming, read(), replaceBits(), secondary, SecondaryTiming, secondaryTiming, UDMAControl, udmaControl, UDMATiming, udmaTiming, and PciDevice::writeConfig().

Referenced by params().

Member Data Documentation

◆ active

Bitfield<0> IdeController::active

private

Definition at line 57 of file ide_ctrl.hh.

◆ bmEnabled

bool IdeController::bmEnabled

private

Definition at line 133 of file ide_ctrl.hh.

Referenced by dispatchAccess(), IdeController(), serialize(), unserialize(), and writeConfig().

◆ bmiAddr

Addr IdeController::bmiAddr

private

Bus master interface (BMI) registers.

Definition at line 122 of file ide_ctrl.hh.

Referenced by dispatchAccess(), serialize(), unserialize(), and writeConfig().

◆ bmiSize

Addr IdeController::bmiSize

private

Definition at line 122 of file ide_ctrl.hh.

Referenced by dispatchAccess(), serialize(), and unserialize().

◆ ctrlOffset

uint32_t IdeController::ctrlOffset

private

Definition at line 135 of file ide_ctrl.hh.

Referenced by dispatchAccess().

◆ deviceTiming

uint8_t IdeController::deviceTiming

private

Definition at line 126 of file ide_ctrl.hh.

Referenced by readConfig(), serialize(), unserialize(), and writeConfig().

◆ dmaCap1

Bitfield<5> IdeController::dmaCap1

private

Definition at line 54 of file ide_ctrl.hh.

◆ dmaError

Bitfield<1> IdeController::dmaError

private

Definition at line 56 of file ide_ctrl.hh.

◆ ideConfig

uint16_t IdeController::ideConfig

private

Definition at line 129 of file ide_ctrl.hh.

Referenced by readConfig(), serialize(), unserialize(), and writeConfig().

◆ intStatus

Bitfield<2> IdeController::intStatus

private

Definition at line 55 of file ide_ctrl.hh.

◆ ioEnabled

bool IdeController::ioEnabled

private

Definition at line 132 of file ide_ctrl.hh.

Referenced by dispatchAccess(), IdeController(), serialize(), unserialize(), and writeConfig().

◆ ioShift

uint32_t IdeController::ioShift

private

Definition at line 135 of file ide_ctrl.hh.

Referenced by dispatchAccess(), and IdeController().

◆ primary

Channel IdeController::primary

private

Definition at line 116 of file ide_ctrl.hh.

Referenced by dispatchAccess(), IdeController(), intrPost(), isDiskSelected(), serialize(), setDmaComplete(), unserialize(), and writeConfig().

◆ primaryTiming

uint16_t IdeController::primaryTiming

private

Registers used in device specific PCI configuration.

Definition at line 125 of file ide_ctrl.hh.

Referenced by readConfig(), serialize(), unserialize(), and writeConfig().

◆ secondary

Channel IdeController::secondary

private

Definition at line 119 of file ide_ctrl.hh.

Referenced by dispatchAccess(), IdeController(), isDiskSelected(), serialize(), setDmaComplete(), unserialize(), and writeConfig().

◆ secondaryTiming

uint16_t IdeController::secondaryTiming

private

Definition at line 125 of file ide_ctrl.hh.

Referenced by readConfig(), serialize(), unserialize(), and writeConfig().

◆ startStop

Bitfield<0> IdeController::startStop

private

Definition at line 62 of file ide_ctrl.hh.

◆ udmaControl

uint8_t IdeController::udmaControl

private

Definition at line 127 of file ide_ctrl.hh.

Referenced by readConfig(), serialize(), unserialize(), and writeConfig().

◆ udmaTiming

uint16_t IdeController::udmaTiming

private

Definition at line 128 of file ide_ctrl.hh.

Referenced by readConfig(), serialize(), unserialize(), and writeConfig().

The documentation for this class was generated from the following files:

dev/storage/ide_ctrl.hh
dev/storage/ide_ctrl.cc

Public Types

Public Member Functions

Private Member Functions

Private Attributes

Additional Inherited Members

Detailed Description

Member Typedef Documentation

◆ Params

Constructor & Destructor Documentation

◆ IdeController()

Member Function Documentation

◆ BitUnion8()

◆ dispatchAccess()

◆ EndBitUnion() [1/2]

◆ EndBitUnion() [2/2]

◆ intrPost()

◆ isDiskSelected()

◆ params()

◆ read()

◆ readConfig()

◆ serialize()

◆ setDmaComplete()

◆ unserialize()

◆ write()

◆ writeConfig()

Member Data Documentation

◆ active

◆ bmEnabled

◆ bmiAddr

◆ bmiSize

◆ ctrlOffset

◆ deviceTiming

◆ dmaCap1

◆ dmaError

◆ ideConfig

◆ intStatus

◆ ioEnabled

◆ ioShift

◆ primary

◆ primaryTiming

◆ secondary

◆ secondaryTiming

◆ startStop

◆ udmaControl

◆ udmaTiming