gem5  v20.0.0.3
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MinorCPU Class Reference

MinorCPU is an in-order CPU model with four fixed pipeline stages: More...

#include <cpu.hh>

Inheritance diagram for MinorCPU:
BaseCPU ClockedObject SimObject Clocked EventManager Serializable Drainable Stats::Group

Classes

class  MinorCPUPort
 Provide a non-protected base class for Minor's Ports as derived classes are created by Fetch1 and Execute. More...
 

Public Member Functions

 MinorCPU (MinorCPUParams *params)
 
 ~MinorCPU ()
 
void init () override
 Starting, waking and initialisation. More...
 
void startup () override
 startup() is the final initialization call before simulation. More...
 
void wakeup (ThreadID tid) override
 
void regStats () override
 Stats interface from SimObject (by way of BaseCPU) More...
 
Counter totalInsts () const override
 Simple inst count interface from BaseCPU. More...
 
Counter totalOps () const override
 
void serializeThread (CheckpointOut &cp, ThreadID tid) const override
 Serialize a single thread. More...
 
void unserializeThread (CheckpointIn &cp, ThreadID tid) override
 Unserialize one thread. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize pipeline data. More...
 
void unserialize (CheckpointIn &cp) override
 Reconstruct the state of this object from a checkpoint. More...
 
DrainState drain () override
 Drain interface. More...
 
void drainResume () override
 Resume execution after a successful drain. More...
 
void signalDrainDone ()
 Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState. More...
 
void memWriteback () override
 Write back dirty buffers to memory using functional writes. More...
 
void switchOut () override
 Switching interface from BaseCPU. More...
 
void takeOverFrom (BaseCPU *old_cpu) override
 Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More...
 
void activateContext (ThreadID thread_id) override
 Thread activation interface from BaseCPU. More...
 
void suspendContext (ThreadID thread_id) override
 Notify the CPU that the indicated context is now suspended. More...
 
std::vector< ThreadIDroundRobinPriority (ThreadID priority)
 Thread scheduling utility functions. More...
 
std::vector< ThreadIDrandomPriority ()
 
void wakeupOnEvent (unsigned int stage_id)
 Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled. More...
 
- Public Member Functions inherited from BaseCPU
virtual PortProxy::SendFunctionalFunc getSendFunctional ()
 Returns a sendFunctional delegate for use with port proxies. More...
 
int cpuId () const
 Reads this CPU's ID. More...
 
uint32_t socketId () const
 Reads this CPU's Socket ID. More...
 
MasterID dataMasterId () const
 Reads this CPU's unique data requestor ID. More...
 
MasterID instMasterId () const
 Reads this CPU's unique instruction requestor ID. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port on this CPU. More...
 
uint32_t taskId () const
 Get cpu task id. More...
 
void taskId (uint32_t id)
 Set cpu task id. More...
 
uint32_t getPid () const
 
void setPid (uint32_t pid)
 
void workItemBegin ()
 
void workItemEnd ()
 
Tick instCount ()
 
BaseInterruptsgetInterruptController (ThreadID tid)
 
void postInterrupt (ThreadID tid, int int_num, int index)
 
void clearInterrupt (ThreadID tid, int int_num, int index)
 
void clearInterrupts (ThreadID tid)
 
bool checkInterrupts (ThreadContext *tc) const
 
void processProfileEvent ()
 
Trace::InstTracergetTracer ()
 Provide access to the tracer pointer. More...
 
virtual void haltContext (ThreadID thread_num)
 Notify the CPU that the indicated context is now halted. More...
 
int findContext (ThreadContext *tc)
 Given a Thread Context pointer return the thread num. More...
 
virtual ThreadContextgetContext (int tn)
 Given a thread num get tho thread context for it. More...
 
unsigned numContexts ()
 Get the number of thread contexts available. More...
 
ThreadID contextToThread (ContextID cid)
 Convert ContextID to threadID. More...
 
const Paramsparams () const
 
 BaseCPU (Params *params, bool is_checker=false)
 
virtual ~BaseCPU ()
 
void regProbePoints () override
 Register probe points for this object. More...
 
void registerThreadContexts ()
 
void deschedulePowerGatingEvent ()
 
void schedulePowerGatingEvent ()
 
void flushTLBs ()
 Flush all TLBs in the CPU. More...
 
bool switchedOut () const
 Determine if the CPU is switched out. More...
 
virtual void verifyMemoryMode () const
 Verify that the system is in a memory mode supported by the CPU. More...
 
unsigned int cacheLineSize () const
 Get the cache line size of the system. More...
 
void scheduleInstStop (ThreadID tid, Counter insts, const char *cause)
 Schedule an event that exits the simulation loops after a predefined number of instructions. More...
 
uint64_t getCurrentInstCount (ThreadID tid)
 Get the number of instructions executed by the specified thread on this CPU. More...
 
void traceFunctions (Addr pc)
 
void armMonitor (ThreadID tid, Addr address)
 
bool mwait (ThreadID tid, PacketPtr pkt)
 
void mwaitAtomic (ThreadID tid, ThreadContext *tc, BaseTLB *dtb)
 
AddressMonitorgetCpuAddrMonitor (ThreadID tid)
 
bool waitForRemoteGDB () const
 
virtual void probeInstCommit (const StaticInstPtr &inst, Addr pc)
 Helper method to trigger PMU probes for a committed instruction. More...
 
- Public Member Functions inherited from ClockedObject
 ClockedObject (const ClockedObjectParams *p)
 
const Paramsparams () const
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from SimObject
virtual ~SimObject ()
 
virtual const std::string name () const
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
const Paramsparams () const
 
 SimObject (const Params *_params)
 
- Public Member Functions inherited from EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from Stats::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (Stats::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Public Attributes

Minor::MinorActivityRecorderactivityRecorder
 Activity recording for pipeline. More...
 
std::vector< Minor::MinorThread * > threads
 These are thread state-representing objects for this CPU. More...
 
Enums::ThreadPolicy threadPolicy
 Thread Scheduling Policy (RoundRobin, Random, etc) More...
 
Minor::MinorStats stats
 Processor-specific statistics. More...
 
- Public Attributes inherited from BaseCPU
TheISA::MicrocodeRom microcodeRom
 
EventFunctionWrapperprofileEvent
 
ThreadID numThreads
 Number of threads we're actually simulating (<= SMT_MAX_THREADS). More...
 
Systemsystem
 
Stats::Scalar numCycles
 
Stats::Scalar numWorkItemsStarted
 
Stats::Scalar numWorkItemsCompleted
 
Cycles syscallRetryLatency
 
- Public Attributes inherited from ClockedObject
PowerStatepowerState
 

Protected Member Functions

PortgetDataPort () override
 Return a reference to the data port. More...
 
PortgetInstPort () override
 Return a reference to the instruction port. More...
 
- Protected Member Functions inherited from BaseCPU
void updateCycleCounters (CPUState state)
 base method keeping track of cycle progression More...
 
void enterPwrGating ()
 
ProbePoints::PMUUPtr pmuProbePoint (const char *name)
 Helper method to instantiate probe points belonging to this object. More...
 
- Protected Member Functions inherited from Drainable
 Drainable ()
 
virtual ~Drainable ()
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 

Protected Attributes

Minor::Pipelinepipeline
 pipeline is a container for the clockable pipeline stage objects. More...
 
- Protected Attributes inherited from BaseCPU
Tick instCnt
 Instruction count used for SPARC misc register. More...
 
int _cpuId
 
const uint32_t _socketId
 Each cpu will have a socket ID that corresponds to its physical location in the system. More...
 
MasterID _instMasterId
 instruction side request id that must be placed in all requests More...
 
MasterID _dataMasterId
 data side request id that must be placed in all requests More...
 
uint32_t _taskId
 An intrenal representation of a task identifier within gem5. More...
 
uint32_t _pid
 The current OS process ID that is executing on this processor. More...
 
bool _switchedOut
 Is the CPU switched out or active? More...
 
const unsigned int _cacheLineSize
 Cache the cache line size that we get from the system. More...
 
std::vector< BaseInterrupts * > interrupts
 
std::vector< ThreadContext * > threadContexts
 
Trace::InstTracertracer
 
Cycles previousCycle
 
CPUState previousState
 
const Cycles pwrGatingLatency
 
const bool powerGatingOnIdle
 
EventFunctionWrapper enterPwrGatingEvent
 
ProbePoints::PMUUPtr ppRetiredInsts
 Instruction commit probe point. More...
 
ProbePoints::PMUUPtr ppRetiredInstsPC
 
ProbePoints::PMUUPtr ppRetiredLoads
 Retired load instructions. More...
 
ProbePoints::PMUUPtr ppRetiredStores
 Retired store instructions. More...
 
ProbePoints::PMUUPtr ppRetiredBranches
 Retired branches (any type) More...
 
ProbePoints::PMUUPtr ppAllCycles
 CPU cycle counter even if any thread Context is suspended. More...
 
ProbePoints::PMUUPtr ppActiveCycles
 CPU cycle counter, only counts if any thread contexts is active. More...
 
ProbePointArg< bool > * ppSleeping
 ProbePoint that signals transitions of threadContexts sets. More...
 
- Protected Attributes inherited from SimObject
const SimObjectParams * _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Additional Inherited Members

- Public Types inherited from BaseCPU
typedef BaseCPUParams Params
 
- Public Types inherited from ClockedObject
typedef ClockedObjectParams Params
 Parameters of ClockedObject. More...
 
- Public Types inherited from SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from BaseCPU
static int numSimulatedInsts ()
 
static int numSimulatedOps ()
 
static void wakeup (ThreadID tid)
 
static int numSimulatedCPUs ()
 
static Counter numSimulatedInsts ()
 
static Counter numSimulatedOps ()
 
- Static Public Member Functions inherited from SimObject
static void serializeAll (CheckpointOut &cp)
 Serialize all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
- Static Public Member Functions inherited from Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void serializeAll (const std::string &cpt_dir)
 
static void unserializeGlobals (CheckpointIn &cp)
 
- Static Public Attributes inherited from BaseCPU
static const uint32_t invldPid = std::numeric_limits<uint32_t>::max()
 Invalid or unknown Pid. More...
 
static const Addr PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1)
 
- Protected Types inherited from BaseCPU
enum  CPUState { CPU_STATE_ON, CPU_STATE_SLEEP, CPU_STATE_WAKEUP }
 

Detailed Description

MinorCPU is an in-order CPU model with four fixed pipeline stages:

Fetch1 - fetches lines from memory Fetch2 - decomposes lines into macro-op instructions Decode - decomposes macro-ops into micro-ops Execute - executes those micro-ops

This pipeline is carried in the MinorCPU::pipeline object. The exec_context interface is not carried by MinorCPU but by Minor::ExecContext objects created by Minor::Execute.

Definition at line 77 of file cpu.hh.

Constructor & Destructor Documentation

◆ MinorCPU()

MinorCPU::MinorCPU ( MinorCPUParams *  params)

◆ ~MinorCPU()

MinorCPU::~MinorCPU ( )

Definition at line 82 of file cpu.cc.

References pipeline, and threads.

Member Function Documentation

◆ activateContext()

void MinorCPU::activateContext ( ThreadID  thread_id)
overridevirtual

Thread activation interface from BaseCPU.

Reimplemented from BaseCPU.

Definition at line 258 of file cpu.cc.

References BaseCPU::activateContext(), Minor::Pipeline::CPUStageId, DPRINTF, Minor::MinorStats::quiesceCycles, stats, threads, and wakeupOnEvent().

◆ drain()

DrainState MinorCPU::drain ( )
overridevirtual

Drain interface.

Implements Drainable.

Definition at line 171 of file cpu.cc.

References BaseCPU::deschedulePowerGatingEvent(), DPRINTF, Drained, Draining, and BaseCPU::switchedOut().

◆ drainResume()

void MinorCPU::drainResume ( )
overridevirtual

Resume execution after a successful drain.

Reimplemented from Drainable.

Definition at line 202 of file cpu.cc.

References DPRINTF, fatal, System::isTimingMode(), BaseCPU::numThreads, BaseCPU::schedulePowerGatingEvent(), BaseCPU::switchedOut(), BaseCPU::system, and wakeup().

◆ getDataPort()

Port & MinorCPU::getDataPort ( )
overrideprotectedvirtual

Return a reference to the data port.

Implements BaseCPU.

Definition at line 309 of file cpu.cc.

◆ getInstPort()

Port & MinorCPU::getInstPort ( )
overrideprotectedvirtual

Return a reference to the instruction port.

Implements BaseCPU.

Definition at line 303 of file cpu.cc.

◆ init()

void MinorCPU::init ( )
overridevirtual

Starting, waking and initialisation.

Reimplemented from BaseCPU.

Definition at line 92 of file cpu.cc.

References fatal, BaseCPU::getContext(), System::getMemoryMode(), BaseCPU::init(), ThreadContext::initMemProxies(), BaseCPU::params(), BaseCPU::system, and threads.

◆ memWriteback()

void MinorCPU::memWriteback ( )
overridevirtual

Write back dirty buffers to memory using functional writes.

After returning, an object implementing this method should have written all its dirty data back to memory. This method is typically used to prepare a system with caches for checkpointing.

Reimplemented from SimObject.

Definition at line 232 of file cpu.cc.

References DPRINTF.

◆ randomPriority()

std::vector<ThreadID> MinorCPU::randomPriority ( )
inline

◆ regStats()

void MinorCPU::regStats ( )
overridevirtual

Stats interface from SimObject (by way of BaseCPU)

Reimplemented from BaseCPU.

Definition at line 113 of file cpu.cc.

References SimObject::name(), Minor::MinorStats::regStats(), BaseCPU::regStats(), and stats.

◆ roundRobinPriority()

std::vector<ThreadID> MinorCPU::roundRobinPriority ( ThreadID  priority)
inline

◆ serialize()

void MinorCPU::serialize ( CheckpointOut cp) const
overridevirtual

Serialize pipeline data.

Reimplemented from BaseCPU.

Definition at line 133 of file cpu.cc.

References BaseCPU::serialize().

◆ serializeThread()

void MinorCPU::serializeThread ( CheckpointOut cp,
ThreadID  tid 
) const
overridevirtual

Serialize a single thread.

Parameters
cpThe stream to serialize to.
tidID of the current thread.

Reimplemented from BaseCPU.

Definition at line 121 of file cpu.cc.

References threads.

◆ signalDrainDone()

void MinorCPU::signalDrainDone ( )

Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState.

Definition at line 195 of file cpu.cc.

References DPRINTF, and Drainable::signalDrainDone().

Referenced by Minor::Pipeline::evaluate().

◆ startup()

void MinorCPU::startup ( )
overridevirtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from BaseCPU.

Definition at line 158 of file cpu.cc.

References DPRINTF, BaseCPU::numThreads, BaseCPU::startup(), and threads.

◆ suspendContext()

void MinorCPU::suspendContext ( ThreadID  thread_num)
overridevirtual

Notify the CPU that the indicated context is now suspended.

Check if possible to enter a lower power state

Reimplemented from BaseCPU.

Definition at line 277 of file cpu.cc.

References DPRINTF, BaseCPU::suspendContext(), and threads.

◆ switchOut()

void MinorCPU::switchOut ( )
overridevirtual

Switching interface from BaseCPU.

Reimplemented from BaseCPU.

Definition at line 238 of file cpu.cc.

References activityRecorder, DPRINTF, ActivityRecorder::reset(), BaseCPU::switchedOut(), and BaseCPU::switchOut().

◆ takeOverFrom()

void MinorCPU::takeOverFrom ( BaseCPU cpu)
overridevirtual

Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in.

A CPU model implementing this method is expected to initialize its state from the old CPU and connect its memory (unless they are already connected) to the memories connected to the old CPU.

Parameters
cpuCPU to initialize read state from.

Reimplemented from BaseCPU.

Definition at line 250 of file cpu.cc.

References DPRINTF, and BaseCPU::takeOverFrom().

◆ totalInsts()

Counter MinorCPU::totalInsts ( ) const
overridevirtual

Simple inst count interface from BaseCPU.

Implements BaseCPU.

Definition at line 315 of file cpu.cc.

References ArmISA::i, and threads.

◆ totalOps()

Counter MinorCPU::totalOps ( ) const
overridevirtual

Implements BaseCPU.

Definition at line 326 of file cpu.cc.

References ArmISA::i, and threads.

◆ unserialize()

void MinorCPU::unserialize ( CheckpointIn cp)
overridevirtual

Reconstruct the state of this object from a checkpoint.

Note
CPU models should normally overload the unserializeThread() method instead of the unserialize() method as this provides a uniform data format for all CPU models and promotes better code reuse.
Parameters
cpThe checkpoint use.

Reimplemented from BaseCPU.

Definition at line 140 of file cpu.cc.

References BaseCPU::unserialize().

◆ unserializeThread()

void MinorCPU::unserializeThread ( CheckpointIn cp,
ThreadID  tid 
)
overridevirtual

Unserialize one thread.

Parameters
cpThe checkpoint use.
tidID of the current thread.

Reimplemented from BaseCPU.

Definition at line 127 of file cpu.cc.

References threads.

◆ wakeup()

void MinorCPU::wakeup ( ThreadID  tid)
overridevirtual

◆ wakeupOnEvent()

void MinorCPU::wakeupOnEvent ( unsigned int  stage_id)

Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled.

The stage argument should be from the enumeration Pipeline::StageId

Definition at line 287 of file cpu.cc.

References ActivityRecorder::activateStage(), activityRecorder, DPRINTF, and MinorCPU().

Referenced by activateContext(), Minor::Execute::drain(), Minor::Execute::drainResume(), Minor::Execute::evaluate(), Minor::Fetch1::evaluate(), Minor::LSQ::SingleDataRequest::finish(), Minor::LSQ::SplitDataRequest::finish(), Minor::Fetch1::recvTimingResp(), Minor::LSQ::recvTimingResp(), Minor::Fetch1::tryToSendToTransfers(), and Minor::Fetch1::wakeupFetch().

Member Data Documentation

◆ activityRecorder

Minor::MinorActivityRecorder* MinorCPU::activityRecorder

Activity recording for pipeline.

This belongs to Pipeline but stages will access it through the CPU as the MinorCPU object actually mediates idling behaviour

Definition at line 88 of file cpu.hh.

Referenced by Minor::Decode::evaluate(), Minor::Fetch2::evaluate(), Minor::Execute::evaluate(), Minor::Fetch1::evaluate(), Minor::Execute::issue(), MinorCPU(), switchOut(), and wakeupOnEvent().

◆ pipeline

Minor::Pipeline* MinorCPU::pipeline
protected

pipeline is a container for the clockable pipeline stage objects.

Elements of pipeline call TheISA to implement the model.

Definition at line 82 of file cpu.hh.

Referenced by ~MinorCPU().

◆ stats

Minor::MinorStats MinorCPU::stats

Processor-specific statistics.

Definition at line 132 of file cpu.hh.

Referenced by activateContext(), Minor::Execute::commit(), Minor::Execute::commitInst(), Minor::Execute::doInstCommitAccounting(), and regStats().

◆ threadPolicy

Enums::ThreadPolicy MinorCPU::threadPolicy

◆ threads

std::vector<Minor::MinorThread *> MinorCPU::threads

The documentation for this class was generated from the following files:

Generated on Fri Jul 3 2020 15:53:17 for gem5 by doxygen 1.8.13