gem5  v20.1.0.0
pmu.hh
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37 
38 #ifndef __ARCH_ARM_PMU_HH__
39 #define __ARCH_ARM_PMU_HH__
40 
41 #include <map>
42 #include <memory>
43 #include <vector>
44 
45 #include "arch/arm/isa_device.hh"
46 #include "arch/arm/registers.hh"
47 #include "arch/arm/system.hh"
48 #include "base/cprintf.hh"
49 #include "cpu/base.hh"
50 #include "debug/PMUVerbose.hh"
51 #include "sim/eventq.hh"
52 #include "sim/sim_object.hh"
53 #include "sim/system.hh"
54 
55 class ArmPMUParams;
56 class Platform;
57 class ThreadContext;
58 class ArmInterruptPin;
59 
60 namespace ArmISA {
61 
62 
94 class PMU : public SimObject, public ArmISA::BaseISADevice {
95  public:
96  PMU(const ArmPMUParams *p);
97  ~PMU();
98 
99  void addEventProbe(unsigned int id, SimObject *obj, const char *name);
100  void addSoftwareIncrementEvent(unsigned int id);
101 
102  void registerEvent(uint32_t id);
103 
104  public: // SimObject and related interfaces
105  void serialize(CheckpointOut &cp) const override;
106  void unserialize(CheckpointIn &cp) override;
107 
108  void drainResume() override;
109 
110  void regProbeListeners() override;
111 
112  public: // ISA Device interface
113  void setThreadContext(ThreadContext *tc) override;
114 
121  void setMiscReg(int misc_reg, RegVal val) override;
128  RegVal readMiscReg(int misc_reg) override;
129 
130  protected: // PMU register types and constants
131  BitUnion32(PMCR_t)
132  // PMU Enable
133  Bitfield<0> e;
134  // Event counter reset
135  Bitfield<1> p;
136  // Cycle counter reset
137  Bitfield<2> c;
138  // Cycle counter divider enable
139  Bitfield<3> d;
140  // Export enable
141  Bitfield<4> x;
142  // Disable PMCCNTR when event counting is prohibited
143  Bitfield<5> dp;
144  // Long Cycle counter enable
145  Bitfield<6> lc;
146  // Number of event counters implemented
147  Bitfield<15, 11> n;
148  // Implementation ID
149  Bitfield<23, 16> idcode;
150  // Implementer code
151  Bitfield<31, 24> imp;
152  EndBitUnion(PMCR_t)
153 
154  BitUnion32(PMSELR_t)
155  // Performance counter selector
156  Bitfield<4, 0> sel;
157  EndBitUnion(PMSELR_t)
158 
159  BitUnion32(PMEVTYPER_t)
160  Bitfield<15, 0> evtCount;
161 
162  // Secure EL3 filtering
163  Bitfield<26> m;
164  // Non-secure EL2 mode filtering
165  Bitfield<27> nsh;
166  // Non-secure EL0 mode filtering
167  Bitfield<28> nsu;
168  // Non-secure EL1 mode filtering
169  Bitfield<29> nsk;
170  // EL0 filtering
171  Bitfield<30> u;
172  // EL1 filtering
173  Bitfield<31> p;
174  EndBitUnion(PMEVTYPER_t)
175 
183  typedef unsigned int CounterId;
184 
186  static const CounterId PMCCNTR = 31;
187 
193  typedef unsigned int EventTypeId;
194 
195  protected: /* High-level register and interrupt handling */
196  RegVal readMiscRegInt(int misc_reg);
197 
206  void setControlReg(PMCR_t val);
207 
211  void resetEventCounts();
212 
216  void raiseInterrupt();
217 
221  void clearInterrupt();
222 
233  uint64_t getCounterValue(CounterId id) const {
234  return isValidCounter(id) ? getCounter(id).getValue() : 0;
235  }
236 
244  void setCounterValue(CounterId id, uint64_t val);
245 
257  PMEVTYPER_t getCounterTypeRegister(CounterId id) const;
258 
272  void setCounterTypeRegister(CounterId id, PMEVTYPER_t type);
273 
284  void setOverflowStatus(RegVal new_val);
285 
286  protected: /* Probe handling and counter state */
287  struct CounterState;
288 
292  struct PMUEvent {
293 
294  PMUEvent() {}
295 
296  virtual ~PMUEvent() {}
297 
303  void attachEvent(PMU::CounterState *user);
304 
310  void detachEvent(PMU::CounterState *user);
311 
319  virtual void increment(const uint64_t val);
320 
324  virtual void enable() = 0;
325 
329  virtual void disable() = 0;
330 
335  virtual void updateAttachedCounters() {}
336 
337  protected:
338 
340  std::set<PMU::CounterState*> userCounters;
341  };
342 
343  struct RegularEvent : public PMUEvent {
345 
347  std::string name) {
348 
349  panic_if(!object,"malformed probe-point"
350  " definition with name %s\n", name);
351 
352  microArchitectureEventSet.emplace(object, name);
353  }
354 
355  protected:
356  struct RegularProbe: public ProbeListenerArgBase<uint64_t>
357  {
359  std::string name)
361  parentEvent(parent) {}
362 
363  RegularProbe() = delete;
364 
365  void notify(const uint64_t &val);
366 
367  protected:
369  };
370 
372  std::set<EventTypeEntry> microArchitectureEventSet;
373 
378 
379  void enable() override;
380 
381  void disable() override;
382  };
383 
384  class SWIncrementEvent : public PMUEvent
385  {
386  void enable() override {}
387  void disable() override {}
388 
389  public:
390 
397  void write(uint64_t val);
398  };
399 
406  PMUEvent* getEvent(uint64_t eventId);
407 
409  struct CounterState : public Serializable {
410  CounterState(PMU &pmuReference, uint64_t counter_id)
411  : eventId(0), filter(0), enabled(false),
412  overflow64(false), sourceEvent(nullptr),
413  counterId(counter_id), value(0), resetValue(false),
414  pmu(pmuReference) {}
415 
416  void serialize(CheckpointOut &cp) const override;
417  void unserialize(CheckpointIn &cp) override;
418 
425  uint64_t add(uint64_t delta);
426 
427  bool isFiltered() const;
428 
432  void detach();
433 
439  void attach(PMUEvent* event);
440 
446  uint64_t getCounterId() const{
447  return counterId;
448  }
449 
455  uint64_t getValue() const;
456 
462  void setValue(uint64_t val);
463 
464  public: /* Serializable state */
467 
469  PMEVTYPER_t filter;
470 
472  bool enabled;
473 
476 
477  protected: /* Configuration */
480 
482  uint64_t counterId;
483 
485  uint64_t value;
486 
489 
491 
492  template <typename ...Args>
493  void debugCounter(const char* mainString, Args &...args) const {
494 
495  std::string userString = csprintf(mainString, args...);
496 
497  warn("[counterId = %d, eventId = %d, sourceEvent = 0x%x] %s",
498  counterId, eventId, sourceEvent, userString.c_str());
499 
500  }
501  };
502 
511  bool isValidCounter(CounterId id) const {
512  return id < counters.size() || id == PMCCNTR;
513  }
514 
522  CounterState &getCounter(CounterId id) {
523  assert(isValidCounter(id));
524  return id == PMCCNTR ? cycleCounter : counters[id];
525  }
526 
534  const CounterState &getCounter(CounterId id) const {
535  assert(isValidCounter(id));
536  return id == PMCCNTR ? cycleCounter : counters[id];
537  }
538 
550  void updateCounter(CounterState &ctr);
551 
558  bool isFiltered(const CounterState &ctr) const;
559 
566  void updateAllCounters();
567 
568  protected: /* State that needs to be serialized */
571 
573  PMCR_t reg_pmcr;
574 
576  PMSELR_t reg_pmselr;
577 
580 
583 
590  uint64_t reg_pmceid0;
591  uint64_t reg_pmceid1;
592 
594  unsigned clock_remainder;
595 
598 
601 
604 
606  const uint64_t cycleCounterEventId;
607 
610 
611  protected: /* Configuration and constants */
614 
616  static const RegVal reg_pmcr_wr_mask;
617 
620 
624  std::map<EventTypeId, PMUEvent*> eventMap;
625 };
626 
627 } // namespace ArmISA
628 #endif
ArmISA::PMU::c
Bitfield< 2 > c
Definition: pmu.hh:137
isa_device.hh
ArmISA::PMU::PMUEvent::disable
virtual void disable()=0
Disable the current event.
ArmISA::PMU::RegularEvent
Definition: pmu.hh:343
ArmISA::PMU::registerEvent
void registerEvent(uint32_t id)
Definition: pmu.cc:150
ArmISA::PMU::CounterState::attach
void attach(PMUEvent *event)
Attach this counter to an event.
Definition: pmu.cc:531
ArmISA::PMU::lc
Bitfield< 6 > lc
Definition: pmu.hh:145
warn
#define warn(...)
Definition: logging.hh:239
ArmISA::PMU::regProbeListeners
void regProbeListeners() override
Register probe listeners for this object.
Definition: pmu.cc:173
ArmISA::PMU::maximumCounterCount
uint64_t maximumCounterCount
The number of regular event counters.
Definition: pmu.hh:597
ArmISA::PMU::SWIncrementEvent::enable
void enable() override
Enable the current event.
Definition: pmu.hh:386
ArmISA::PMU::CounterState::getValue
uint64_t getValue() const
rReturn the counter value
Definition: pmu.cc:542
system.hh
ArmISA::PMU::RegularEvent::RegularProbe::RegularProbe
RegularProbe()=delete
ArmISA::PMU::EndBitUnion
EndBitUnion(PMCR_t) BitUnion32(PMSELR_t) Bitfield< 4
ArmISA::BaseISADevice
Base class for devices that use the MiscReg interfaces.
Definition: isa_device.hh:58
ArmISA::PMU::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pmu.cc:707
ArmISA::PMU::PMU
PMU(const ArmPMUParams *p)
Definition: pmu.cc:54
ArmISA::PMU::RegularEvent::RegularProbe::parentEvent
RegularEvent * parentEvent
Definition: pmu.hh:368
ArmISA::PMU::addEventProbe
void addEventProbe(unsigned int id, SimObject *obj, const char *name)
Definition: pmu.cc:124
ArmISA::PMU::getCounterValue
uint64_t getCounterValue(CounterId id) const
Get the value of a performance counter.
Definition: pmu.hh:233
ArmISA::PMU::getCounter
CounterState & getCounter(CounterId id)
Return the state of a counter.
Definition: pmu.hh:522
ArmISA::PMU::dp
Bitfield< 5 > dp
Definition: pmu.hh:143
Serializable
Basic support for object serialization.
Definition: serialize.hh:172
ArmISA::PMU::getCounter
const CounterState & getCounter(CounterId id) const
Return the state of a counter.
Definition: pmu.hh:534
ArmISA::PMU::sel
sel
Definition: pmu.hh:156
type
uint8_t type
Definition: inet.hh:421
ArmISA::PMU::addSoftwareIncrementEvent
void addSoftwareIncrementEvent(unsigned int id)
Definition: pmu.cc:102
ArmISA::PMU::drainResume
void drainResume() override
Resume execution after a successful drain.
Definition: pmu.cc:166
ArmISA::PMU::SWIncrementEvent::write
void write(uint64_t val)
write on the sw increment register inducing an increment of the counters with this event selected acc...
Definition: pmu.cc:800
ArmISA::PMU::d
Bitfield< 3 > d
Definition: pmu.hh:139
ArmISA::PMU::CounterState::CounterState
CounterState(PMU &pmuReference, uint64_t counter_id)
Definition: pmu.hh:410
ArmISA::PMU::updateCounter
void updateCounter(CounterState &ctr)
Depending on counter configuration, add or remove the probes driving the counter.
Definition: pmu.cc:568
ArmISA::PMU::getCounterTypeRegister
PMEVTYPER_t getCounterTypeRegister(CounterId id) const
Get the type and filter settings of a counter (PMEVTYPER)
Definition: pmu.cc:611
ArmISA::PMU::CounterState
State of a counter within the PMU.
Definition: pmu.hh:409
ArmISA::PMU::PMUEvent::updateAttachedCounters
virtual void updateAttachedCounters()
Method called immediately before a counter access in order for the associated event to update its sta...
Definition: pmu.hh:335
std::vector
STL vector class.
Definition: stl.hh:37
ArmISA::PMU::reg_pmcnten
RegVal reg_pmcnten
Performance Monitor Count Enable Register.
Definition: pmu.hh:570
system.hh
ArmISA::PMU::RegularEvent::attachedProbePointList
std::vector< std::unique_ptr< RegularProbe > > attachedProbePointList
Set of probe listeners tapping onto each of the input micro-arch events which compose this pmu event.
Definition: pmu.hh:377
ArmISA::PMU::eventMap
std::map< EventTypeId, PMUEvent * > eventMap
List of event types supported by this PMU.
Definition: pmu.hh:624
ArmISA::PMU::RegularEvent::RegularProbe
Definition: pmu.hh:356
ArmISA::PMU::RegularEvent::microArchitectureEventSet
std::set< EventTypeEntry > microArchitectureEventSet
The set of events driving the event value.
Definition: pmu.hh:372
ArmISA::PMU::resetEventCounts
void resetEventCounts()
Reset all event counters excluding the cycle counter to zero.
Definition: pmu.cc:591
ArmISA
Definition: ccregs.hh:41
ArmISA::PMU::clock_remainder
unsigned clock_remainder
Remainder part when the clock counter is divided by 64.
Definition: pmu.hh:594
ArmISA::PMU::RegularEvent::RegularProbe::RegularProbe
RegularProbe(RegularEvent *parent, SimObject *obj, std::string name)
Definition: pmu.hh:358
ArmISA::PMU::RegularEvent::RegularProbe::notify
void notify(const uint64_t &val)
Definition: pmu.cc:469
ArmISA::PMU::PMUEvent::increment
virtual void increment(const uint64_t val)
notify an event increment of val units, all the attached counters' value is incremented by val units.
Definition: pmu.cc:451
ArmISA::PMU::isFiltered
bool isFiltered(const CounterState &ctr) const
Check if a counter's settings allow it to be counted.
ArmISA::PMU::PMUEvent::userCounters
std::set< PMU::CounterState * > userCounters
set of counters using this event
Definition: pmu.hh:340
ArmISA::PMU::CounterState::eventId
EventTypeId eventId
Counter event ID.
Definition: pmu.hh:466
ArmISA::PMU::reg_pmceid0
uint64_t reg_pmceid0
Performance counter ID register.
Definition: pmu.hh:590
ArmISA::PMU::setMiscReg
void setMiscReg(int misc_reg, RegVal val) override
Set a register within the PMU.
Definition: pmu.cc:189
cp
Definition: cprintf.cc:40
ArmISA::PMU::clearInterrupt
void clearInterrupt()
Clear a PMU interrupt.
Definition: pmu.cc:675
ArmISA::PMU::PMUEvent::PMUEvent
PMUEvent()
Definition: pmu.hh:294
ArmISA::PMU::~PMU
~PMU()
Definition: pmu.cc:87
ArmISA::PMU
Model of an ARM PMU version 3.
Definition: pmu.hh:94
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
ArmISA::PMU::isValidCounter
bool isValidCounter(CounterId id) const
Is this a valid counter ID?
Definition: pmu.hh:511
sim_object.hh
ArmISA::PMU::BitUnion32
BitUnion32(PMCR_t) Bitfield< 0 > e
ArmISA::PMU::idcode
Bitfield< 23, 16 > idcode
Definition: pmu.hh:149
ArmISA::PMU::cycleCounterEventId
const uint64_t cycleCounterEventId
The id of the counter hardwired to the cpu cycle counter.
Definition: pmu.hh:606
ArmISA::PMU::nsh
Bitfield< 27 > nsh
Definition: pmu.hh:165
MipsISA::event
Bitfield< 10, 5 > event
Definition: pra_constants.hh:297
ProbeListener::name
const std::string name
Definition: probe.hh:125
ArmISA::PMU::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pmu.cc:687
ArmISA::PMU::cycleCounter
CounterState cycleCounter
State of the cycle counter.
Definition: pmu.hh:603
ArmISA::PMU::CounterState::add
uint64_t add(uint64_t delta)
Add an event count to the counter and check for overflow.
Definition: pmu.cc:764
ArmISA::PMU::m
Bitfield< 26 > m
Definition: pmu.hh:163
ArmISA::PMU::PMUEvent
Event definition base class.
Definition: pmu.hh:292
ArmISA::PMU::RegularEvent::disable
void disable() override
Disable the current event.
Definition: pmu.cc:484
ArmISA::PMU::CounterState::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pmu.cc:756
ArmISA::PMU::updateAllCounters
void updateAllCounters()
Call updateCounter() for each counter in the PMU if the counter's state has changed.
Definition: pmu.cc:420
cprintf.hh
ArmISA::PMU::setControlReg
void setControlReg(PMCR_t val)
PMCR write handling.
Definition: pmu.cc:397
ArmISA::PMU::RegularEvent::EventTypeEntry
std::pair< SimObject *, std::string > EventTypeEntry
Definition: pmu.hh:344
Platform
Definition: platform.hh:49
ArmISA::PMU::EventTypeId
unsigned int EventTypeId
Event type ID.
Definition: pmu.hh:193
std::pair
STL pair class.
Definition: stl.hh:58
ArmISA::PMU::CounterState::getCounterId
uint64_t getCounterId() const
Obtain the counter id.
Definition: pmu.hh:446
X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
ArmISA::PMU::CounterState::counterId
uint64_t counterId
id of the counter instance
Definition: pmu.hh:482
ArmISA::PMU::CounterState::detach
void detach()
Detach the counter from its event.
Definition: pmu.cc:519
ArmISA::PMU::RegularEvent::enable
void enable() override
Enable the current event.
Definition: pmu.cc:475
ArmISA::PMU::CounterState::overflow64
bool overflow64
Is this a 64-bit counter?
Definition: pmu.hh:475
ArmISA::PMU::x
Bitfield< 4 > x
Definition: pmu.hh:141
ArmISA::PMU::readMiscRegInt
RegVal readMiscRegInt(int misc_reg)
Definition: pmu.cc:307
ArmISA::PMU::nsu
Bitfield< 28 > nsu
Definition: pmu.hh:167
ArmISA::PMU::CounterState::resetValue
bool resetValue
Flag keeping track if the counter has been reset.
Definition: pmu.hh:488
SimObject::getProbeManager
ProbeManager * getProbeManager()
Get the probe manager for this object.
Definition: sim_object.cc:117
ArmISA::PMU::counters
std::vector< CounterState > counters
State of all general-purpose counters supported by PMU.
Definition: pmu.hh:600
ArmISA::PMU::setCounterValue
void setCounterValue(CounterId id, uint64_t val)
Set the value of a performance counter.
Definition: pmu.cc:598
ArmISA::PMU::setOverflowStatus
void setOverflowStatus(RegVal new_val)
Used for writing the Overflow Flag Status Register (SET/CLR)
Definition: pmu.cc:649
ArmISA::e
Bitfield< 9 > e
Definition: miscregs_types.hh:61
ArmISA::PMU::PMUEvent::attachEvent
void attachEvent(PMU::CounterState *user)
attach this event to a given counter
Definition: pmu.cc:441
SimObject::name
virtual const std::string name() const
Definition: sim_object.hh:133
ArmISA::PMU::p
Bitfield< 1 > p
Definition: pmu.hh:135
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:197
ArmISA::PMU::getEvent
PMUEvent * getEvent(uint64_t eventId)
Obtain the event of a given id.
Definition: pmu.cc:735
ArmISA::PMU::PMUEvent::detachEvent
void detachEvent(PMU::CounterState *user)
detach this event from a given counter
Definition: pmu.cc:459
ArmISA::PMU::CounterState::enabled
bool enabled
Is the counter enabled?
Definition: pmu.hh:472
ArmISA::PMU::swIncrementEvent
SWIncrementEvent * swIncrementEvent
The event that implements the software increment.
Definition: pmu.hh:609
base.hh
ArmISA::PMU::evtCount
evtCount
Definition: pmu.hh:160
ArmISA::PMU::CounterState::debugCounter
void debugCounter(const char *mainString, Args &...args) const
Definition: pmu.hh:493
ArmISA::PMU::reg_pmselr
PMSELR_t reg_pmselr
Performance Monitor Selection Register.
Definition: pmu.hh:576
ArmISA::PMU::CounterState::setValue
void setValue(uint64_t val)
overwrite the value of the counter
Definition: pmu.cc:554
registers.hh
ArmISA::PMU::reg_pmcr
PMCR_t reg_pmcr
Performance Monitor Control Register.
Definition: pmu.hh:573
ArmISA::PMU::reg_pminten
RegVal reg_pminten
Performance Monitor Interrupt Enable Register.
Definition: pmu.hh:579
ArmISA::PMU::imp
Bitfield< 31, 24 > imp
Definition: pmu.hh:151
ArmISA::PMU::reg_pmcr_conf
PMCR_t reg_pmcr_conf
Constant (configuration-dependent) part of the PMCR.
Definition: pmu.hh:613
ArmInterruptPin
Generic representation of an Arm interrupt pin.
Definition: base_gic.hh:176
ArmISA::PMU::SWIncrementEvent::disable
void disable() override
Disable the current event.
Definition: pmu.hh:387
ArmISA::PMU::PMCCNTR
static const CounterId PMCCNTR
Cycle Count Register Number.
Definition: pmu.hh:186
ArmISA::PMU::CounterState::value
uint64_t value
Current value of the counter.
Definition: pmu.hh:485
ArmISA::PMU::nsk
Bitfield< 29 > nsk
Definition: pmu.hh:169
ArmISA::PMU::PMUEvent::enable
virtual void enable()=0
Enable the current event.
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:63
ArmISA::PMU::CounterState::pmu
PMU & pmu
Definition: pmu.hh:490
ArmISA::PMU::CounterState::isFiltered
bool isFiltered() const
Definition: pmu.cc:490
ArmISA::PMU::setThreadContext
void setThreadContext(ThreadContext *tc) override
Definition: pmu.cc:92
ArmISA::PMU::n
Bitfield< 15, 11 > n
Definition: pmu.hh:147
ArmISA::PMU::interrupt
ArmInterruptPin * interrupt
Performance monitor interrupt number.
Definition: pmu.hh:619
ArmISA::PMU::reg_pmceid1
uint64_t reg_pmceid1
Definition: pmu.hh:591
ArmISA::PMU::SWIncrementEvent
Definition: pmu.hh:384
ArmISA::PMU::readMiscReg
RegVal readMiscReg(int misc_reg) override
Read a register within the PMU.
Definition: pmu.cc:298
ArmISA::PMU::PMUEvent::~PMUEvent
virtual ~PMUEvent()
Definition: pmu.hh:296
ArmISA::PMU::raiseInterrupt
void raiseInterrupt()
Deliver a PMU interrupt to the GIC.
Definition: pmu.cc:663
CheckpointIn
Definition: serialize.hh:67
ArmISA::PMU::CounterState::filter
PMEVTYPER_t filter
Filtering settings (evtCount is unused)
Definition: pmu.hh:469
ArmISA::PMU::u
Bitfield< 30 > u
Definition: pmu.hh:171
ArmISA::PMU::reg_pmovsr
RegVal reg_pmovsr
Performance Monitor Overflow Status Register.
Definition: pmu.hh:582
ArmISA::PMU::RegularEvent::addMicroarchitectureProbe
void addMicroarchitectureProbe(SimObject *object, std::string name)
Definition: pmu.hh:346
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:158
ArmISA::PMU::reg_pmcr_wr_mask
static const RegVal reg_pmcr_wr_mask
PMCR write mask when accessed from the guest.
Definition: pmu.hh:616
ArmISA::PMU::CounterState::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pmu.cc:748
RegVal
uint64_t RegVal
Definition: types.hh:168
ArmISA::PMU::CounterState::sourceEvent
PMUEvent * sourceEvent
PmuEvent currently in use (if any)
Definition: pmu.hh:479
ArmISA::id
Bitfield< 33 > id
Definition: miscregs_types.hh:247
ArmISA::PMU::setCounterTypeRegister
void setCounterTypeRegister(CounterId id, PMEVTYPER_t type)
Set the type and filter settings of a performance counter (PMEVTYPER)
Definition: pmu.cc:625
eventq.hh
SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:92
ProbeListenerArgBase
ProbeListenerArgBase is used to define the base interface to a ProbeListenerArg (i....
Definition: probe.hh:198

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