gem5  v20.1.0.0
remote_gdb.cc
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39 
40 #include "arch/x86/remote_gdb.hh"
41 
42 #include <sys/signal.h>
43 #include <unistd.h>
44 
45 #include <string>
46 
48 #include "arch/x86/process.hh"
49 #include "arch/x86/regs/int.hh"
50 #include "arch/x86/regs/misc.hh"
51 #include "base/remote_gdb.hh"
52 #include "base/socket.hh"
53 #include "base/trace.hh"
54 #include "cpu/base.hh"
55 #include "cpu/thread_context.hh"
56 #include "debug/GDBAcc.hh"
57 #include "mem/page_table.hh"
58 #include "sim/full_system.hh"
59 
60 using namespace std;
61 using namespace X86ISA;
62 
63 RemoteGDB::RemoteGDB(System *_system, ThreadContext *c, int _port) :
64  BaseRemoteGDB(_system, c, _port), regCache32(this), regCache64(this)
65 {}
66 
67 bool
69 {
70  if (FullSystem) {
71  Walker *walker = dynamic_cast<TLB *>(
72  context()->getDTBPtr())->getWalker();
73  unsigned logBytes;
74  Fault fault = walker->startFunctional(context(), va, logBytes,
76  if (fault != NoFault)
77  return false;
78 
79  Addr endVa = va + len - 1;
80  if ((va & ~mask(logBytes)) == (endVa & ~mask(logBytes)))
81  return true;
82 
83  fault = walker->startFunctional(context(), endVa, logBytes,
85  return fault == NoFault;
86  } else {
87  return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
88  }
89 }
90 
93 {
94  HandyM5Reg m5reg = context()->readMiscRegNoEffect(MISCREG_M5_REG);
95  if (m5reg.submode == SixtyFourBitMode)
96  return &regCache64;
97  else
98  return &regCache32;
99 }
100 
101 
102 
103 void
105 {
106  DPRINTF(GDBAcc, "getRegs in remotegdb \n");
107  r.rax = context->readIntReg(INTREG_RAX);
108  r.rbx = context->readIntReg(INTREG_RBX);
109  r.rcx = context->readIntReg(INTREG_RCX);
110  r.rdx = context->readIntReg(INTREG_RDX);
111  r.rsi = context->readIntReg(INTREG_RSI);
112  r.rdi = context->readIntReg(INTREG_RDI);
113  r.rbp = context->readIntReg(INTREG_RBP);
114  r.rsp = context->readIntReg(INTREG_RSP);
123  r.rip = context->pcState().pc();
131 }
132 
133 void
135 {
136  DPRINTF(GDBAcc, "getRegs in remotegdb \n");
137  r.eax = context->readIntReg(INTREG_RAX);
138  r.ecx = context->readIntReg(INTREG_RCX);
139  r.edx = context->readIntReg(INTREG_RDX);
140  r.ebx = context->readIntReg(INTREG_RBX);
141  r.esp = context->readIntReg(INTREG_RSP);
142  r.ebp = context->readIntReg(INTREG_RBP);
143  r.esi = context->readIntReg(INTREG_RSI);
144  r.edi = context->readIntReg(INTREG_RDI);
145  r.eip = context->pcState().pc();
153 }
154 
155 void
157 {
158  DPRINTF(GDBAcc, "setRegs in remotegdb \n");
159  context->setIntReg(INTREG_RAX, r.rax);
160  context->setIntReg(INTREG_RBX, r.rbx);
161  context->setIntReg(INTREG_RCX, r.rcx);
162  context->setIntReg(INTREG_RDX, r.rdx);
163  context->setIntReg(INTREG_RSI, r.rsi);
164  context->setIntReg(INTREG_RDI, r.rdi);
165  context->setIntReg(INTREG_RBP, r.rbp);
166  context->setIntReg(INTREG_RSP, r.rsp);
169  context->setIntReg(INTREG_R10, r.r10);
170  context->setIntReg(INTREG_R11, r.r11);
171  context->setIntReg(INTREG_R12, r.r12);
172  context->setIntReg(INTREG_R13, r.r13);
173  context->setIntReg(INTREG_R14, r.r14);
174  context->setIntReg(INTREG_R15, r.r15);
175  context->pcState(r.rip);
178  warn("Remote gdb: Ignoring update to CS.\n");
180  warn("Remote gdb: Ignoring update to SS.\n");
182  warn("Remote gdb: Ignoring update to DS.\n");
184  warn("Remote gdb: Ignoring update to ES.\n");
186  warn("Remote gdb: Ignoring update to FS.\n");
188  warn("Remote gdb: Ignoring update to GS.\n");
189 }
190 
191 void
193 {
194  DPRINTF(GDBAcc, "setRegs in remotegdb \n");
195  context->setIntReg(INTREG_RAX, r.eax);
196  context->setIntReg(INTREG_RCX, r.ecx);
197  context->setIntReg(INTREG_RDX, r.edx);
198  context->setIntReg(INTREG_RBX, r.ebx);
199  context->setIntReg(INTREG_RSP, r.esp);
200  context->setIntReg(INTREG_RBP, r.ebp);
201  context->setIntReg(INTREG_RSI, r.esi);
202  context->setIntReg(INTREG_RDI, r.edi);
203  context->pcState(r.eip);
206  warn("Remote gdb: Ignoring update to CS.\n");
208  warn("Remote gdb: Ignoring update to SS.\n");
210  warn("Remote gdb: Ignoring update to DS.\n");
212  warn("Remote gdb: Ignoring update to ES.\n");
214  warn("Remote gdb: Ignoring update to FS.\n");
216  warn("Remote gdb: Ignoring update to GS.\n");
217 }
X86ISA::RemoteGDB::gdbRegs
BaseGdbRegCache * gdbRegs()
Definition: remote_gdb.cc:92
X86ISA::MISCREG_M5_REG
@ MISCREG_M5_REG
Definition: misc.hh:137
ThreadContext::readMiscRegNoEffect
virtual RegVal readMiscRegNoEffect(RegIndex misc_reg) const =0
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r14
uint64_t r14
Definition: remote_gdb.hh:111
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rsp
uint64_t rsp
Definition: remote_gdb.hh:104
socket.hh
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::es
uint32_t es
Definition: remote_gdb.hh:118
X86ISA::r
Bitfield< 41 > r
Definition: misc.hh:934
warn
#define warn(...)
Definition: logging.hh:239
BaseTLB::Read
@ Read
Definition: tlb.hh:57
X86ISA::RemoteGDB::AMD64GdbRegCache::r
struct X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED r
X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
Definition: remote_gdb.cc:104
ArmISA::INTREG_R8
@ INTREG_R8
Definition: intregs.hh:62
ArmISA::INTREG_R9
@ INTREG_R9
Definition: intregs.hh:63
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r12
uint64_t r12
Definition: remote_gdb.hh:109
remote_gdb.hh
X86ISA::MISCREG_ES
@ MISCREG_ES
Definition: misc.hh:296
X86ISA::MISCREG_CS
@ MISCREG_CS
Definition: misc.hh:297
ThreadContext::setIntReg
virtual void setIntReg(RegIndex reg_idx, RegVal val)=0
Process::pTable
EmulationPageTable * pTable
Definition: process.hh:174
pagetable_walker.hh
X86ISA::TLB
Definition: tlb.hh:57
FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:132
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r9
uint64_t r9
Definition: remote_gdb.hh:106
ThreadContext::getProcessPtr
virtual Process * getProcessPtr()=0
X86ISA::RemoteGDB::X86GdbRegCache::getRegs
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
Definition: remote_gdb.cc:134
ArmISA::INTREG_R13
@ INTREG_R13
Definition: intregs.hh:67
EmulationPageTable::lookup
const Entry * lookup(Addr vaddr)
Lookup function.
Definition: page_table.cc:130
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rsi
uint64_t rsi
Definition: remote_gdb.hh:101
ArmISA::INTREG_R10
@ INTREG_R10
Definition: intregs.hh:64
BaseRemoteGDB::context
ThreadContext * context()
Definition: remote_gdb.hh:304
X86ISA::RemoteGDB::regCache64
AMD64GdbRegCache regCache64
Definition: remote_gdb.hh:140
X86ISA::MISCREG_DS
@ MISCREG_DS
Definition: misc.hh:299
X86ISA::Walker::startFunctional
Fault startFunctional(ThreadContext *_tc, Addr &addr, unsigned &logBytes, BaseTLB::Mode mode)
Definition: pagetable_walker.cc:93
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rip
uint64_t rip
Definition: remote_gdb.hh:113
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rcx
uint64_t rcx
Definition: remote_gdb.hh:99
X86ISA::RemoteGDB::acc
bool acc(Addr addr, size_t len)
Definition: remote_gdb.cc:68
System
Definition: system.hh:73
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r15
uint64_t r15
Definition: remote_gdb.hh:112
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
X86ISA::MISCREG_RFLAGS
@ MISCREG_RFLAGS
Definition: misc.hh:134
Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
ArmISA::INTREG_R12
@ INTREG_R12
Definition: intregs.hh:66
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::fs
uint32_t fs
Definition: remote_gdb.hh:119
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rbp
uint64_t rbp
Definition: remote_gdb.hh:103
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::gs
uint32_t gs
Definition: remote_gdb.hh:120
remote_gdb.hh
ArmISA::INTREG_R14
@ INTREG_R14
Definition: intregs.hh:69
X86ISA::Walker
Definition: pagetable_walker.hh:56
int.hh
ArmISA::INTREG_R15
@ INTREG_R15
Definition: intregs.hh:71
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rbx
uint64_t rbx
Definition: remote_gdb.hh:98
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rdi
uint64_t rdi
Definition: remote_gdb.hh:102
NoFault
constexpr decltype(nullptr) NoFault
Definition: types.hh:245
X86ISA
This is exposed globally, independent of the ISA.
Definition: acpi.hh:55
BaseRemoteGDB
Definition: remote_gdb.hh:43
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::cs
uint32_t cs
Definition: remote_gdb.hh:115
X86ISA::MISCREG_FS
@ MISCREG_FS
Definition: misc.hh:300
BaseGdbRegCache
Concrete subclasses of this abstract class represent how the register values are transmitted on the w...
Definition: remote_gdb.hh:70
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rax
uint64_t rax
Definition: remote_gdb.hh:97
full_system.hh
ThreadContext::pcState
virtual TheISA::PCState pcState() const =0
X86ISA::MISCREG_SS
@ MISCREG_SS
Definition: misc.hh:298
process.hh
X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
Definition: remote_gdb.cc:156
base.hh
std
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:587
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::ds
uint32_t ds
Definition: remote_gdb.hh:117
X86ISA::RemoteGDB::regCache32
X86GdbRegCache regCache32
Definition: remote_gdb.hh:139
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r8
uint64_t r8
Definition: remote_gdb.hh:105
ArmISA::len
Bitfield< 18, 16 > len
Definition: miscregs_types.hh:439
ThreadContext::setMiscReg
virtual void setMiscReg(RegIndex misc_reg, RegVal val)=0
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::ss
uint32_t ss
Definition: remote_gdb.hh:116
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r11
uint64_t r11
Definition: remote_gdb.hh:108
X86ISA::mask
mask
Definition: misc.hh:796
ArmISA::c
Bitfield< 29 > c
Definition: miscregs_types.hh:50
trace.hh
X86ISA::SixtyFourBitMode
@ SixtyFourBitMode
Definition: types.hh:190
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r10
uint64_t r10
Definition: remote_gdb.hh:107
ArmISA::INTREG_R11
@ INTREG_R11
Definition: intregs.hh:65
X86ISA::MISCREG_GS
@ MISCREG_GS
Definition: misc.hh:301
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::rdx
uint64_t rdx
Definition: remote_gdb.hh:100
ThreadContext::readIntReg
virtual RegVal readIntReg(RegIndex reg_idx) const =0
page_table.hh
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::r13
uint64_t r13
Definition: remote_gdb.hh:110
X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED::eflags
uint32_t eflags
Definition: remote_gdb.hh:114
misc.hh
thread_context.hh
ThreadContext::getDTBPtr
virtual BaseTLB * getDTBPtr()=0
ArmISA::va
Bitfield< 8 > va
Definition: miscregs_types.hh:272
X86ISA::RemoteGDB::X86GdbRegCache::setRegs
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
Definition: remote_gdb.cc:192

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