gem5  v20.1.0.0
pl111.cc
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37 
38 #include "dev/arm/pl111.hh"
39 
40 #include "base/output.hh"
41 #include "base/trace.hh"
42 #include "base/vnc/vncinput.hh"
43 #include "debug/PL111.hh"
44 #include "debug/Uart.hh"
45 #include "dev/arm/amba_device.hh"
46 #include "dev/arm/base_gic.hh"
47 #include "mem/packet.hh"
48 #include "mem/packet_access.hh"
49 #include "sim/system.hh"
50 
51 // clang complains about std::set being overloaded with Packet::set if
52 // we open up the entire namespace std
53 using std::vector;
54 
55 // initialize clcd registers
57  : AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
58  lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
59  lcdRis(0), lcdMis(0),
60  clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
61  clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
62  clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
63  pixelClock(p->pixel_clock),
64  converter(PixelConverter::rgba8888_le), fb(LcdMaxWidth, LcdMaxHeight),
65  vnc(p->vnc), bmp(&fb), pic(NULL),
66  width(LcdMaxWidth), height(LcdMaxHeight),
67  bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
68  waterMark(0), dmaPendingNum(0),
69  readEvent([this]{ readFramebuffer(); }, name()),
70  fillFifoEvent([this]{ fillFifo(); }, name()),
71  dmaDoneEventAll(maxOutstandingDma, this),
72  dmaDoneEventFree(maxOutstandingDma),
73  intEvent([this]{ generateInterrupt(); }, name()),
74  enableCapture(p->enable_capture)
75 {
76  pioSize = 0xFFFF;
77 
78  dmaBuffer = new uint8_t[buffer_size];
79 
80  memset(lcdPalette, 0, sizeof(lcdPalette));
81  memset(cursorImage, 0, sizeof(cursorImage));
82  memset(dmaBuffer, 0, buffer_size);
83 
84  for (int i = 0; i < maxOutstandingDma; ++i)
85  dmaDoneEventFree[i] = &dmaDoneEventAll[i];
86 
87  if (vnc)
88  vnc->setFrameBuffer(&fb);
89 }
90 
92 {
93  delete[] dmaBuffer;
94 }
95 
96 // read registers and frame buffer
97 Tick
99 {
100  // use a temporary data since the LCD registers are read/written with
101  // different size operations
102 
103  uint32_t data = 0;
104 
105  assert(pkt->getAddr() >= pioAddr &&
106  pkt->getAddr() < pioAddr + pioSize);
107 
108  Addr daddr = pkt->getAddr() - pioAddr;
109 
110  DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
111 
112  switch (daddr) {
113  case LcdTiming0:
114  data = lcdTiming0;
115  break;
116  case LcdTiming1:
117  data = lcdTiming1;
118  break;
119  case LcdTiming2:
120  data = lcdTiming2;
121  break;
122  case LcdTiming3:
123  data = lcdTiming3;
124  break;
125  case LcdUpBase:
126  data = lcdUpbase;
127  break;
128  case LcdLpBase:
129  data = lcdLpbase;
130  break;
131  case LcdControl:
132  data = lcdControl;
133  break;
134  case LcdImsc:
135  data = lcdImsc;
136  break;
137  case LcdRis:
138  data = lcdRis;
139  break;
140  case LcdMis:
141  data = lcdMis;
142  break;
143  case LcdIcr:
144  panic("LCD register at offset %#x is Write-Only\n", daddr);
145  break;
146  case LcdUpCurr:
147  data = curAddr;
148  break;
149  case LcdLpCurr:
150  data = curAddr;
151  break;
152  case ClcdCrsrCtrl:
153  data = clcdCrsrCtrl;
154  break;
155  case ClcdCrsrConfig:
157  break;
158  case ClcdCrsrPalette0:
160  break;
161  case ClcdCrsrPalette1:
163  break;
164  case ClcdCrsrXY:
165  data = clcdCrsrXY;
166  break;
167  case ClcdCrsrClip:
168  data = clcdCrsrClip;
169  break;
170  case ClcdCrsrImsc:
171  data = clcdCrsrImsc;
172  break;
173  case ClcdCrsrIcr:
174  panic("CLCD register at offset %#x is Write-Only\n", daddr);
175  break;
176  case ClcdCrsrRis:
177  data = clcdCrsrRis;
178  break;
179  case ClcdCrsrMis:
180  data = clcdCrsrMis;
181  break;
182  default:
183  if (readId(pkt, AMBA_ID, pioAddr)) {
184  // Hack for variable size accesses
185  data = pkt->getUintX(ByteOrder::little);
186  break;
187  } else if (daddr >= CrsrImage && daddr <= 0xBFC) {
188  // CURSOR IMAGE
189  int index;
190  index = (daddr - CrsrImage) >> 2;
192  break;
193  } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
194  // LCD Palette
195  int index;
196  index = (daddr - LcdPalette) >> 2;
197  data = lcdPalette[index];
198  break;
199  } else {
200  panic("Tried to read CLCD register at offset %#x that "
201  "doesn't exist\n", daddr);
202  break;
203  }
204  }
205 
206  pkt->setUintX(data, ByteOrder::little);
207  pkt->makeAtomicResponse();
208  return pioDelay;
209 }
210 
211 // write registers and frame buffer
212 Tick
214 {
215  // use a temporary data since the LCD registers are read/written with
216  // different size operations
217  //
218  const uint32_t data = pkt->getUintX(ByteOrder::little);
219 
220  assert(pkt->getAddr() >= pioAddr &&
221  pkt->getAddr() < pioAddr + pioSize);
222 
223  Addr daddr = pkt->getAddr() - pioAddr;
224 
225  DPRINTF(PL111, " write register %#x value %#x size=%d\n", daddr,
226  pkt->getLE<uint8_t>(), pkt->getSize());
227 
228  switch (daddr) {
229  case LcdTiming0:
230  lcdTiming0 = data;
231  // width = 16 * (PPL+1)
232  width = (lcdTiming0.ppl + 1) << 4;
233  break;
234  case LcdTiming1:
235  lcdTiming1 = data;
236  // height = LPP + 1
237  height = (lcdTiming1.lpp) + 1;
238  break;
239  case LcdTiming2:
240  lcdTiming2 = data;
241  break;
242  case LcdTiming3:
243  lcdTiming3 = data;
244  break;
245  case LcdUpBase:
246  lcdUpbase = data;
247  DPRINTF(PL111, "####### Upper panel base set to: %#x #######\n", lcdUpbase);
248  break;
249  case LcdLpBase:
250  warn_once("LCD dual screen mode not supported\n");
251  lcdLpbase = data;
252  DPRINTF(PL111, "###### Lower panel base set to: %#x #######\n", lcdLpbase);
253  break;
254  case LcdControl:
255  int old_lcdpwr;
256  old_lcdpwr = lcdControl.lcdpwr;
257  lcdControl = data;
258 
259  DPRINTF(PL111, "LCD power is:%d\n", lcdControl.lcdpwr);
260 
261  // LCD power enable
262  if (lcdControl.lcdpwr && !old_lcdpwr) {
264  DPRINTF(PL111, " lcd size: height %d width %d\n", height, width);
265  waterMark = lcdControl.watermark ? 8 : 4;
266  startDma();
267  }
268  break;
269  case LcdImsc:
270  lcdImsc = data;
271  if (lcdImsc.vcomp)
272  panic("Interrupting on vcomp not supported\n");
273 
274  lcdMis = lcdImsc & lcdRis;
275 
276  if (!lcdMis)
277  interrupt->clear();
278 
279  break;
280  case LcdRis:
281  panic("LCD register at offset %#x is Read-Only\n", daddr);
282  break;
283  case LcdMis:
284  panic("LCD register at offset %#x is Read-Only\n", daddr);
285  break;
286  case LcdIcr:
287  lcdRis = lcdRis & ~data;
288  lcdMis = lcdImsc & lcdRis;
289 
290  if (!lcdMis)
291  interrupt->clear();
292 
293  break;
294  case LcdUpCurr:
295  panic("LCD register at offset %#x is Read-Only\n", daddr);
296  break;
297  case LcdLpCurr:
298  panic("LCD register at offset %#x is Read-Only\n", daddr);
299  break;
300  case ClcdCrsrCtrl:
301  clcdCrsrCtrl = data;
302  break;
303  case ClcdCrsrConfig:
305  break;
306  case ClcdCrsrPalette0:
308  break;
309  case ClcdCrsrPalette1:
311  break;
312  case ClcdCrsrXY:
313  clcdCrsrXY = data;
314  break;
315  case ClcdCrsrClip:
316  clcdCrsrClip = data;
317  break;
318  case ClcdCrsrImsc:
319  clcdCrsrImsc = data;
320  break;
321  case ClcdCrsrIcr:
322  clcdCrsrIcr = data;
323  break;
324  case ClcdCrsrRis:
325  panic("CLCD register at offset %#x is Read-Only\n", daddr);
326  break;
327  case ClcdCrsrMis:
328  panic("CLCD register at offset %#x is Read-Only\n", daddr);
329  break;
330  default:
331  if (daddr >= CrsrImage && daddr <= 0xBFC) {
332  // CURSOR IMAGE
333  int index;
334  index = (daddr - CrsrImage) >> 2;
336  break;
337  } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
338  // LCD Palette
339  int index;
340  index = (daddr - LcdPalette) >> 2;
341  lcdPalette[index] = data;
342  break;
343  } else {
344  panic("Tried to write PL111 register at offset %#x that "
345  "doesn't exist\n", daddr);
346  break;
347  }
348  }
349 
350  pkt->makeAtomicResponse();
351  return pioDelay;
352 }
353 
356 {
357  unsigned rw, gw, bw;
358  unsigned offsets[3];
359 
360  switch (lcdControl.lcdbpp) {
361  case bpp24:
362  rw = gw = bw = 8;
363  offsets[0] = 0;
364  offsets[1] = 8;
365  offsets[2] = 16;
366  break;
367 
368  case bpp16m565:
369  rw = 5;
370  gw = 6;
371  bw = 5;
372  offsets[0] = 0;
373  offsets[1] = 5;
374  offsets[2] = 11;
375  break;
376 
377  default:
378  panic("Unimplemented video mode\n");
379  }
380 
381  if (lcdControl.bgr) {
382  return PixelConverter(
384  offsets[2], offsets[1], offsets[0],
385  rw, gw, bw,
386  ByteOrder::little);
387  } else {
388  return PixelConverter(
390  offsets[0], offsets[1], offsets[2],
391  rw, gw, bw,
392  ByteOrder::little);
393  }
394 }
395 
396 void
398 {
399  if (lcdControl.lcdbpp == bpp24) {
400  bytesPerPixel = 4;
401  } else if (lcdControl.lcdbpp == bpp16m565) {
402  bytesPerPixel = 2;
403  }
404 
405  fb.resize(width, height);
407 
408  // Workaround configuration bugs where multiple display
409  // controllers are attached to the same VNC server by reattaching
410  // enabled devices. This isn't ideal, but works as long as only
411  // one display controller is active at a time.
412  if (lcdControl.lcdpwr && vnc)
413  vnc->setFrameBuffer(&fb);
414 }
415 
416 void
418 {
419  if (dmaPendingNum != 0 || readEvent.scheduled())
420  return;
421  readFramebuffer();
422 }
423 
424 void
426 {
427  // initialization for dma read from frame buffer to dma buffer
428  uint32_t length = height * width;
429  if (startAddr != lcdUpbase)
431 
432  // Updating base address, interrupt if we're supposed to
433  lcdRis.baseaddr = 1;
434  if (!intEvent.scheduled())
436 
437  curAddr = 0;
438  startTime = curTick();
439 
440  maxAddr = static_cast<Addr>(length * bytesPerPixel);
441 
442  DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
443 
444  fillFifo();
445 }
446 
447 void
449 {
450  while ((dmaPendingNum < maxOutstandingDma) && (maxAddr >= curAddr + dmaSize )) {
451  // concurrent dma reads need different dma done events
452  // due to assertion in scheduling state
453  ++dmaPendingNum;
454 
455  assert(!dmaDoneEventFree.empty());
456  DmaDoneEvent *event(dmaDoneEventFree.back());
457  dmaDoneEventFree.pop_back();
458  assert(!event->scheduled());
459 
460  // We use a uncachable request here because the requests from the CPU
461  // will be uncacheable as well. If we have uncacheable and cacheable
462  // requests in the memory system for the same address it won't be
463  // pleased
467  curAddr += dmaSize;
468  }
469 }
470 
471 void
473 {
474  DPRINTF(PL111, "DMA Done\n");
475 
476  Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
477 
478  --dmaPendingNum;
479 
480  if (maxAddr == curAddr && !dmaPendingNum) {
481  if ((curTick() - startTime) > maxFrameTime) {
482  warn("CLCD controller buffer underrun, took %d ticks when should"
483  " have taken %d\n", curTick() - startTime, maxFrameTime);
484  lcdRis.underflow = 1;
485  if (!intEvent.scheduled())
487  }
488 
489  assert(!readEvent.scheduled());
491  if (vnc)
492  vnc->setDirty();
493 
494  if (enableCapture) {
495  DPRINTF(PL111, "-- write out frame buffer into bmp\n");
496 
497  if (!pic)
498  pic = simout.create(csprintf("%s.framebuffer.bmp", sys->name()),
499  true);
500 
501  assert(pic);
502  pic->stream()->seekp(0);
503  bmp.write(*pic->stream());
504  }
505 
506  // schedule the next read based on when the last frame started
507  // and the desired fps (i.e. maxFrameTime), we turn the
508  // argument into a relative number of cycles in the future
509  if (lcdControl.lcden)
511  curTick() +
512  maxFrameTime)));
513  }
514 
516  return;
517 
518  if (!fillFifoEvent.scheduled())
520 }
521 
522 void
524 {
525  DPRINTF(PL111, "Serializing ARM PL111\n");
526 
527  uint32_t lcdTiming0_serial = lcdTiming0;
528  SERIALIZE_SCALAR(lcdTiming0_serial);
529 
530  uint32_t lcdTiming1_serial = lcdTiming1;
531  SERIALIZE_SCALAR(lcdTiming1_serial);
532 
533  uint32_t lcdTiming2_serial = lcdTiming2;
534  SERIALIZE_SCALAR(lcdTiming2_serial);
535 
536  uint32_t lcdTiming3_serial = lcdTiming3;
537  SERIALIZE_SCALAR(lcdTiming3_serial);
538 
541 
542  uint32_t lcdControl_serial = lcdControl;
543  SERIALIZE_SCALAR(lcdControl_serial);
544 
545  uint8_t lcdImsc_serial = lcdImsc;
546  SERIALIZE_SCALAR(lcdImsc_serial);
547 
548  uint8_t lcdRis_serial = lcdRis;
549  SERIALIZE_SCALAR(lcdRis_serial);
550 
551  uint8_t lcdMis_serial = lcdMis;
552  SERIALIZE_SCALAR(lcdMis_serial);
553 
556 
563 
564  uint8_t clcdCrsrImsc_serial = clcdCrsrImsc;
565  SERIALIZE_SCALAR(clcdCrsrImsc_serial);
566 
567  uint8_t clcdCrsrIcr_serial = clcdCrsrIcr;
568  SERIALIZE_SCALAR(clcdCrsrIcr_serial);
569 
570  uint8_t clcdCrsrRis_serial = clcdCrsrRis;
571  SERIALIZE_SCALAR(clcdCrsrRis_serial);
572 
573  uint8_t clcdCrsrMis_serial = clcdCrsrMis;
574  SERIALIZE_SCALAR(clcdCrsrMis_serial);
575 
579 
587 
588  Tick int_event_time = 0;
589  Tick read_event_time = 0;
590  Tick fill_fifo_event_time = 0;
591 
592  if (readEvent.scheduled())
593  read_event_time = readEvent.when();
594  if (fillFifoEvent.scheduled())
595  fill_fifo_event_time = fillFifoEvent.when();
596  if (intEvent.scheduled())
597  int_event_time = intEvent.when();
598 
599  SERIALIZE_SCALAR(read_event_time);
600  SERIALIZE_SCALAR(fill_fifo_event_time);
601  SERIALIZE_SCALAR(int_event_time);
602 
603  vector<Tick> dma_done_event_tick;
604  dma_done_event_tick.resize(maxOutstandingDma);
605  for (int x = 0; x < maxOutstandingDma; x++) {
606  dma_done_event_tick[x] = dmaDoneEventAll[x].scheduled() ?
607  dmaDoneEventAll[x].when() : 0;
608  }
609  SERIALIZE_CONTAINER(dma_done_event_tick);
610 }
611 
612 void
614 {
615  DPRINTF(PL111, "Unserializing ARM PL111\n");
616 
617  uint32_t lcdTiming0_serial;
618  UNSERIALIZE_SCALAR(lcdTiming0_serial);
619  lcdTiming0 = lcdTiming0_serial;
620 
621  uint32_t lcdTiming1_serial;
622  UNSERIALIZE_SCALAR(lcdTiming1_serial);
623  lcdTiming1 = lcdTiming1_serial;
624 
625  uint32_t lcdTiming2_serial;
626  UNSERIALIZE_SCALAR(lcdTiming2_serial);
627  lcdTiming2 = lcdTiming2_serial;
628 
629  uint32_t lcdTiming3_serial;
630  UNSERIALIZE_SCALAR(lcdTiming3_serial);
631  lcdTiming3 = lcdTiming3_serial;
632 
635 
636  uint32_t lcdControl_serial;
637  UNSERIALIZE_SCALAR(lcdControl_serial);
638  lcdControl = lcdControl_serial;
639 
640  uint8_t lcdImsc_serial;
641  UNSERIALIZE_SCALAR(lcdImsc_serial);
642  lcdImsc = lcdImsc_serial;
643 
644  uint8_t lcdRis_serial;
645  UNSERIALIZE_SCALAR(lcdRis_serial);
646  lcdRis = lcdRis_serial;
647 
648  uint8_t lcdMis_serial;
649  UNSERIALIZE_SCALAR(lcdMis_serial);
650  lcdMis = lcdMis_serial;
651 
654 
661 
662  uint8_t clcdCrsrImsc_serial;
663  UNSERIALIZE_SCALAR(clcdCrsrImsc_serial);
664  clcdCrsrImsc = clcdCrsrImsc_serial;
665 
666  uint8_t clcdCrsrIcr_serial;
667  UNSERIALIZE_SCALAR(clcdCrsrIcr_serial);
668  clcdCrsrIcr = clcdCrsrIcr_serial;
669 
670  uint8_t clcdCrsrRis_serial;
671  UNSERIALIZE_SCALAR(clcdCrsrRis_serial);
672  clcdCrsrRis = clcdCrsrRis_serial;
673 
674  uint8_t clcdCrsrMis_serial;
675  UNSERIALIZE_SCALAR(clcdCrsrMis_serial);
676  clcdCrsrMis = clcdCrsrMis_serial;
677 
681 
689 
690  Tick int_event_time = 0;
691  Tick read_event_time = 0;
692  Tick fill_fifo_event_time = 0;
693 
694  UNSERIALIZE_SCALAR(read_event_time);
695  UNSERIALIZE_SCALAR(fill_fifo_event_time);
696  UNSERIALIZE_SCALAR(int_event_time);
697 
698  if (int_event_time)
699  schedule(intEvent, int_event_time);
700  if (read_event_time)
701  schedule(readEvent, read_event_time);
702  if (fill_fifo_event_time)
703  schedule(fillFifoEvent, fill_fifo_event_time);
704 
705  vector<Tick> dma_done_event_tick;
706  dma_done_event_tick.resize(maxOutstandingDma);
707  UNSERIALIZE_CONTAINER(dma_done_event_tick);
708  dmaDoneEventFree.clear();
709  for (int x = 0; x < maxOutstandingDma; x++) {
710  if (dma_done_event_tick[x])
711  schedule(dmaDoneEventAll[x], dma_done_event_tick[x]);
712  else
713  dmaDoneEventFree.push_back(&dmaDoneEventAll[x]);
714  }
716 
717  if (lcdControl.lcdpwr) {
720  if (vnc)
721  vnc->setDirty();
722  }
723 }
724 
725 void
727 {
728  DPRINTF(PL111, "Generate Interrupt: lcdImsc=0x%x lcdRis=0x%x lcdMis=0x%x\n",
729  (uint32_t)lcdImsc, (uint32_t)lcdRis, (uint32_t)lcdMis);
730  lcdMis = lcdImsc & lcdRis;
731 
732  if (lcdMis.underflow || lcdMis.baseaddr || lcdMis.vcomp || lcdMis.ahbmaster) {
733  interrupt->raise();
734  DPRINTF(PL111, " -- Generated\n");
735  }
736 }
737 
740 {
741  AddrRangeList ranges;
742  ranges.push_back(RangeSize(pioAddr, pioSize));
743  return ranges;
744 }
745 
746 Pl111 *
747 Pl111Params::create()
748 {
749  return new Pl111(this);
750 }
751 
752 
Pl111::enableCapture
bool enableCapture
Definition: pl111.hh:356
Pl111::getAddrRanges
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Definition: pl111.cc:739
Event::scheduled
bool scheduled() const
Determine if the current event is scheduled.
Definition: eventq.hh:460
Pl111::lcdMis
InterruptReg lcdMis
Masked interrupt status register.
Definition: pl111.hh:218
Pl111::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:98
Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1016
Pl111::ClcdCrsrPalette0
static const int ClcdCrsrPalette0
Definition: pl111.hh:80
warn
#define warn(...)
Definition: logging.hh:239
Pl111::LcdTiming1
static const int LcdTiming1
Definition: pl111.hh:64
length
uint8_t length
Definition: inet.hh:422
Pl111::ClcdCrsrImsc
static const int ClcdCrsrImsc
Definition: pl111.hh:84
system.hh
Pl111::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pl111.cc:613
data
const char data[]
Definition: circlebuf.test.cc:42
MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:44
AmbaDmaDevice
Definition: amba_device.hh:97
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:797
Pl111::fb
FrameBuffer fb
Definition: pl111.hh:260
Packet::getAddr
Addr getAddr() const
Definition: packet.hh:754
PixelConverter
Configurable RGB pixel converter.
Definition: pixel.hh:87
Pl111::LcdTiming0
static const int LcdTiming0
ARM PL111 register map.
Definition: pl111.hh:63
FrameBuffer::copyIn
void copyIn(const uint8_t *fb, const PixelConverter &conv)
Fill the frame buffer with pixel data from an external buffer of the same width and height as this fr...
Definition: framebuffer.cc:104
warn_once
#define warn_once(...)
Definition: logging.hh:243
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
UNSERIALIZE_CONTAINER
#define UNSERIALIZE_CONTAINER(member)
Definition: serialize.hh:856
Pl111::LcdIcr
static const int LcdIcr
Definition: pl111.hh:73
ArmInterruptPin::clear
virtual void clear()=0
Clear a signalled interrupt.
Pl111::clcdCrsrCtrl
uint32_t clcdCrsrCtrl
Cursor control register.
Definition: pl111.hh:229
Pl111::LcdTiming3
static const int LcdTiming3
Definition: pl111.hh:66
amba_device.hh
Pl111::ClcdCrsrConfig
static const int ClcdCrsrConfig
Definition: pl111.hh:79
FrameBuffer::resize
void resize(unsigned width, unsigned height)
Resize the frame buffer.
Definition: framebuffer.cc:80
Pl111::CrsrImage
static const int CrsrImage
Definition: pl111.hh:77
BmpWriter::write
void write(std::ostream &bmp) const override
Write the frame buffer data into the provided ostream.
Definition: bmpwriter.cc:86
ArmISA::width
Bitfield< 4 > width
Definition: miscregs_types.hh:68
Pl111::LcdImsc
static const int LcdImsc
Definition: pl111.hh:70
Pl111::LcdTiming2
static const int LcdTiming2
Definition: pl111.hh:65
base_gic.hh
Pl111::lcdUpbase
uint32_t lcdUpbase
Upper panel frame base address register.
Definition: pl111.hh:203
vncinput.hh
ArmInterruptPin::raise
virtual void raise()=0
Signal an interrupt.
MemCmd::ReadReq
@ ReadReq
Definition: packet.hh:82
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
OutputDirectory::create
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition: output.cc:209
Pl111::vnc
VncInput * vnc
VNC server.
Definition: pl111.hh:263
Pl111::lcdTiming1
TimingReg1 lcdTiming1
Vertical axis panel control register.
Definition: pl111.hh:194
Pl111::bpp16m565
@ bpp16m565
Definition: pl111.hh:107
std::vector
STL vector class.
Definition: stl.hh:37
Pl111::clcdCrsrMis
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
Definition: pl111.hh:254
Packet::getSize
unsigned getSize() const
Definition: packet.hh:764
Pl111::Pl111
Pl111(const Params *p)
Definition: pl111.cc:56
Pl111::buffer_size
static const int buffer_size
Definition: pl111.hh:98
Event::when
Tick when() const
Get the time that the event is scheduled.
Definition: eventq.hh:503
Pl111::lcdRis
InterruptReg lcdRis
Raw interrupt status register - const.
Definition: pl111.hh:215
output.hh
Pl111::pixelClock
Tick pixelClock
Pixel clock.
Definition: pl111.hh:257
Pl111::waterMark
uint32_t waterMark
DMA FIFO watermark.
Definition: pl111.hh:296
VncInput::setDirty
virtual void setDirty()
The frame buffer uses this call to notify the vnc server that the frame buffer has been updated and a...
Definition: vncinput.cc:92
Pl111::updateVideoParams
void updateVideoParams()
Send updated parameters to the vnc server.
Definition: pl111.cc:397
Pl111::lcdControl
ControlReg lcdControl
Control register.
Definition: pl111.hh:209
packet.hh
PioDevice::sys
System * sys
Definition: io_device.hh:102
Pl111::height
uint16_t height
Frame buffer height - lines per panel.
Definition: pl111.hh:275
Pl111::lcdPalette
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
Definition: pl111.hh:222
DmaDevice::dmaPort
DmaPort dmaPort
Definition: dma_device.hh:168
Pl111::startDma
void startDma()
start the dmas off after power is enabled
Definition: pl111.cc:417
Pl111::clcdCrsrClip
uint32_t clcdCrsrClip
Cursor clip position register.
Definition: pl111.hh:242
Pl111::dmaDone
void dmaDone()
DMA done event.
Definition: pl111.cc:472
AmbaDmaDevice::interrupt
ArmInterruptPin *const interrupt
Definition: amba_device.hh:104
cp
Definition: cprintf.cc:40
Pl111::LcdPalette
static const int LcdPalette
Definition: pl111.hh:76
Pl111::fillFifoEvent
EventFunctionWrapper fillFifoEvent
Fill fifo.
Definition: pl111.hh:328
EventManager::schedule
void schedule(Event &event, Tick when)
Definition: eventq.hh:1005
Pl111::converter
PixelConverter converter
Definition: pl111.hh:259
Pl111::intEvent
EventFunctionWrapper intEvent
Wrapper to create an event out of the interrupt.
Definition: pl111.hh:354
Pl111::maxAddr
Addr maxAddr
Frame buffer max address.
Definition: pl111.hh:290
Pl111::bytesPerPixel
uint8_t bytesPerPixel
Bytes per pixel.
Definition: pl111.hh:278
Packet::getUintX
uint64_t getUintX(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness and zero-extended to 64 bits.
Definition: packet.cc:350
OutputStream::stream
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:59
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
Pl111::fillFifo
void fillFifo()
fillFIFO event
Definition: pl111.cc:448
Pl111::clcdCrsrImsc
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
Definition: pl111.hh:245
Pl111::LcdLpCurr
static const int LcdLpCurr
Definition: pl111.hh:75
MipsISA::event
Bitfield< 10, 5 > event
Definition: pra_constants.hh:297
Pl111::bpp24
@ bpp24
Definition: pl111.hh:106
Pl111::clcdCrsrXY
uint32_t clcdCrsrXY
Cursor XY position register.
Definition: pl111.hh:239
Pl111::clcdCrsrConfig
uint32_t clcdCrsrConfig
Cursor configuration register.
Definition: pl111.hh:232
Clocked::clockEdge
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Definition: clocked_object.hh:174
RangeSize
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:638
Pl111::startTime
Tick startTime
Start time for frame buffer dma read.
Definition: pl111.hh:284
Pl111::ClcdCrsrMis
static const int ClcdCrsrMis
Definition: pl111.hh:87
Pl111::lcdTiming3
TimingReg3 lcdTiming3
Line end control register.
Definition: pl111.hh:200
Packet::setUintX
void setUintX(uint64_t w, ByteOrder endian)
Set the value in the word w after truncating it to the length of the packet and then byteswapping it ...
Definition: packet.cc:367
AmbaDevice::readId
bool readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
Definition: amba_device.cc:72
VncInput::setFrameBuffer
virtual void setFrameBuffer(const FrameBuffer *rfb)
Set the address of the frame buffer we are going to show.
Definition: vncinput.cc:73
Pl111::ClcdCrsrXY
static const int ClcdCrsrXY
Definition: pl111.hh:82
Request::UNCACHEABLE
@ UNCACHEABLE
The request is to an uncacheable address.
Definition: request.hh:114
SERIALIZE_ARRAY
#define SERIALIZE_ARRAY(member, size)
Definition: serialize.hh:832
Pl111::ClcdCrsrClip
static const int ClcdCrsrClip
Definition: pl111.hh:83
RiscvISA::x
Bitfield< 3 > x
Definition: pagetable.hh:69
AmbaDmaDevice::Params
AmbaDmaDeviceParams Params
Definition: amba_device.hh:107
Pl111::LcdControl
static const int LcdControl
Definition: pl111.hh:69
Pl111::LcdUpCurr
static const int LcdUpCurr
Definition: pl111.hh:74
AmbaDmaDevice::pioAddr
Addr pioAddr
Definition: amba_device.hh:101
Pl111::cursorImage
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism.
Definition: pl111.hh:226
Pl111::lcdLpbase
uint32_t lcdLpbase
Lower panel frame base address register.
Definition: pl111.hh:206
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
Pl111::dmaDoneEventAll
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
Definition: pl111.hh:347
Pl111::dmaPendingNum
uint32_t dmaPendingNum
Number of pending dma reads.
Definition: pl111.hh:299
Pl111::ClcdCrsrIcr
static const int ClcdCrsrIcr
Definition: pl111.hh:85
name
const std::string & name()
Definition: trace.cc:50
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:790
Pl111::lcdImsc
InterruptReg lcdImsc
Interrupt mask set/clear register.
Definition: pl111.hh:212
DmaPort::dmaAction
RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, uint8_t *data, Tick delay, Request::Flags flag=0)
Definition: dma_device.cc:197
Pl111::ClcdCrsrPalette1
static const int ClcdCrsrPalette1
Definition: pl111.hh:81
packet_access.hh
Pl111::curAddr
Addr curAddr
Frame buffer current address.
Definition: pl111.hh:293
Pl111::ClcdCrsrRis
static const int ClcdCrsrRis
Definition: pl111.hh:86
Pl111::ClcdCrsrCtrl
static const int ClcdCrsrCtrl
Definition: pl111.hh:78
SimObject::name
virtual const std::string name() const
Definition: sim_object.hh:133
Pl111::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pl111.cc:523
Pl111::maxOutstandingDma
static const int maxOutstandingDma
Definition: pl111.hh:96
AmbaDmaDevice::pioSize
Addr pioSize
Definition: amba_device.hh:102
pl111.hh
Packet::getLE
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Definition: packet_access.hh:75
Pl111::~Pl111
~Pl111()
Definition: pl111.cc:91
Pl111::dmaDoneEventFree
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
Definition: pl111.hh:350
Pl111::CrsrImageSize
static const int CrsrImageSize
Definition: pl111.hh:90
Pl111::readEvent
EventFunctionWrapper readEvent
DMA framebuffer read event.
Definition: pl111.hh:325
Pl111::lcdTiming0
EndBitUnion(ControlReg) class DmaDoneEvent TimingReg0 lcdTiming0
Event wrapper for dmaDone()
Definition: pl111.hh:163
Pl111::lcdTiming2
TimingReg2 lcdTiming2
Clock and signal polarity control register.
Definition: pl111.hh:197
UNSERIALIZE_ARRAY
#define UNSERIALIZE_ARRAY(member, size)
Definition: serialize.hh:840
X86ISA::vector
Bitfield< 15, 8 > vector
Definition: intmessage.hh:44
Clocked::ticksToCycles
Cycles ticksToCycles(Tick t) const
Definition: clocked_object.hh:219
Pl111::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:213
Pl111::readFramebuffer
void readFramebuffer()
DMA framebuffer read.
Definition: pl111.cc:425
Pl111::AMBA_ID
static const uint64_t AMBA_ID
Definition: pl111.hh:61
SERIALIZE_CONTAINER
#define SERIALIZE_CONTAINER(member)
Definition: serialize.hh:848
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
ArmISA::rw
Bitfield< 31 > rw
Definition: miscregs_types.hh:249
Pl111::LcdUpBase
static const int LcdUpBase
Definition: pl111.hh:67
Pl111::pic
OutputStream * pic
Picture of what the current frame buffer looks like.
Definition: pl111.hh:269
Pl111::generateInterrupt
void generateInterrupt()
Function to generate interrupt.
Definition: pl111.cc:726
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:63
AmbaDmaDevice::pioDelay
Tick pioDelay
Definition: amba_device.hh:103
Pl111::dmaBuffer
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
Definition: pl111.hh:281
trace.hh
Pl111::width
uint16_t width
Frame buffer width - pixels per line.
Definition: pl111.hh:272
Pl111::pixelConverter
PixelConverter pixelConverter() const
Definition: pl111.cc:355
Pl111::clcdCrsrIcr
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
Definition: pl111.hh:248
Pl111::LcdRis
static const int LcdRis
Definition: pl111.hh:71
simout
OutputDirectory simout
Definition: output.cc:61
Pl111::startAddr
Addr startAddr
Frame buffer base address.
Definition: pl111.hh:287
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
ArmISA::fb
Bitfield< 9 > fb
Definition: miscregs_types.hh:271
Pl111::clcdCrsrPalette1
uint32_t clcdCrsrPalette1
Definition: pl111.hh:236
Pl111::LcdMis
static const int LcdMis
Definition: pl111.hh:72
CheckpointIn
Definition: serialize.hh:67
Pl111::LcdPaletteSize
static const int LcdPaletteSize
Definition: pl111.hh:89
Pl111::LcdLpBase
static const int LcdLpBase
Definition: pl111.hh:68
Pl111::clcdCrsrRis
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
Definition: pl111.hh:251
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:158
Pl111::dmaSize
static const int dmaSize
Definition: pl111.hh:95
Pl111
Definition: pl111.hh:58
Pl111::bmp
BmpWriter bmp
Helper to write out bitmaps.
Definition: pl111.hh:266
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171
Pl111::clcdCrsrPalette0
uint32_t clcdCrsrPalette0
Cursor palette registers.
Definition: pl111.hh:235
curTick
Tick curTick()
The current simulated tick.
Definition: core.hh:45

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