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generic_timer.hh
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37 
38 #ifndef __DEV_ARM_GENERIC_TIMER_HH__
39 #define __DEV_ARM_GENERIC_TIMER_HH__
40 
41 #include <cstdint>
42 #include <vector>
43 
44 #include "arch/arm/isa_device.hh"
45 #include "arch/arm/system.hh"
46 #include "base/addr_range.hh"
47 #include "base/bitunion.hh"
48 #include "base/types.hh"
49 #include "dev/arm/base_gic.hh"
51 #include "sim/core.hh"
52 #include "sim/drain.hh"
53 #include "sim/eventq.hh"
54 #include "sim/serialize.hh"
55 #include "sim/sim_object.hh"
56 
65 
66 class Checkpoint;
67 struct SystemCounterParams;
68 struct GenericTimerParams;
69 struct GenericTimerFrameParams;
70 struct GenericTimerMemParams;
71 
75 {
76  public:
79  virtual void notify(void) = 0;
80 };
81 
84 class SystemCounter : public SimObject
85 {
86  protected:
88  bool _enabled;
90  uint32_t _freq;
92  uint64_t _value;
94  uint64_t _increment;
104 
107 
109  static constexpr size_t MAX_FREQ_ENTRIES = 1004;
110 
111  public:
112  SystemCounter(const SystemCounterParams &p);
113 
116  static void validateCounterRef(SystemCounter *sys_cnt);
117 
119  bool enabled() const { return _enabled; }
121  uint32_t freq() const { return _freq; }
123  uint64_t value();
125  uint64_t increment() const { return _increment; }
129  size_t activeFreqEntry() const { return _activeFreqEntry; }
131  Tick period() const { return _period; }
132 
134  void enable();
136  void disable();
137 
141  void freqUpdateSchedule(size_t new_freq_entry);
142 
144  void setValue(uint64_t new_value);
145 
147  void registerListener(SystemCounterListener *listener);
148 
150  Tick whenValue(uint64_t target_val);
151  Tick whenValue(uint64_t cur_val, uint64_t target_val) const;
152 
153  void serialize(CheckpointOut &cp) const override;
154  void unserialize(CheckpointIn &cp) override;
155 
156  private:
157  // Disable copying
158  SystemCounter(const SystemCounter &c);
159 
164  void freqUpdateCallback();
165 
167  void updateValue(void);
168 
170  void updateTick(void);
171 
173  void notifyListeners(void) const;
174 };
175 
178  public Serializable
179 {
180  protected:
182  BitUnion32(ArchTimerCtrl)
183  Bitfield<0> enable;
184  Bitfield<1> imask;
185  Bitfield<2> istatus;
186  EndBitUnion(ArchTimerCtrl)
187 
188 
189  const std::string _name;
190 
193 
195 
197 
199  ArchTimerCtrl _control;
201  uint64_t _counterLimit;
203  uint64_t _offset;
204 
209  void updateCounter();
210 
212  void counterLimitReached();
214 
215  virtual bool scheduleEvents() { return true; }
216 
217  public:
218  ArchTimer(const std::string &name,
219  SimObject &parent,
220  SystemCounter &sysctr,
221  ArmInterruptPin *interrupt);
222 
224  std::string name() const { return _name; }
225 
227  uint64_t compareValue() const { return _counterLimit; }
229  void setCompareValue(uint64_t val);
230 
232  uint32_t timerValue() const { return _counterLimit - value(); }
234  void setTimerValue(uint32_t val);
235 
237  uint32_t control() const { return _control; }
238  void setControl(uint32_t val);
239 
240  uint64_t offset() const { return _offset; }
241  void setOffset(uint64_t val);
242 
244  uint64_t value() const;
245  Tick whenValue(uint64_t target_val) {
246  return _systemCounter.whenValue(value(), target_val);
247  }
248 
249  void notify(void) override;
250 
251  // Serializable
252  void serialize(CheckpointOut &cp) const override;
253  void unserialize(CheckpointIn &cp) override;
254 
255  // Drainable
256  DrainState drain() override;
257  void drainResume() override;
258 
259  private:
260  // Disable copying
261  ArchTimer(const ArchTimer &t);
262 };
263 
264 class ArchTimerKvm : public ArchTimer
265 {
266  private:
268 
269  public:
270  ArchTimerKvm(const std::string &name,
271  ArmSystem &system,
272  SimObject &parent,
273  SystemCounter &sysctr,
274  ArmInterruptPin *interrupt)
275  : ArchTimer(name, parent, sysctr, interrupt), system(system) {}
276 
277  protected:
278  // For ArchTimer's in a GenericTimerISA with Kvm execution about
279  // to begin, skip rescheduling the event.
280  // Otherwise, we should reschedule the event (if necessary).
281  bool scheduleEvents() override {
282  return !system.validKvmEnvironment();
283  }
284 };
285 
286 class GenericTimer : public SimObject
287 {
288  public:
290 
291  GenericTimer(const Params &p);
292 
293  void serialize(CheckpointOut &cp) const override;
294  void unserialize(CheckpointIn &cp) override;
295 
296  public:
297  void setMiscReg(int misc_reg, unsigned cpu, RegVal val);
298  RegVal readMiscReg(int misc_reg, unsigned cpu);
299 
300  protected:
302  {
303  public:
304  CoreTimers(GenericTimer &_parent, ArmSystem &system, unsigned cpu,
305  ArmInterruptPin *_irqPhysS, ArmInterruptPin *_irqPhysNS,
306  ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp);
307 
310 
312  uint32_t cntfrq;
313 
315  ArmISA::CNTKCTL cntkctl;
316 
318  ArmISA::CNTHCTL cnthctl;
319 
322 
327 
332 
333  // Event Stream. Events are generated based on a configurable
334  // transitionBit over the counter value. transitionTo indicates
335  // the transition direction (0->1 or 1->0)
336  struct EventStream
337  {
339  uint8_t transitionTo;
340  uint8_t transitionBit;
341 
342  uint64_t
343  eventTargetValue(uint64_t val) const
344  {
345  uint64_t bit_val = bits(val, transitionBit);
346  uint64_t ret_val = mbits(val, 63, transitionBit);
347  uint64_t incr_val = 1 << transitionBit;
348  if (bit_val == transitionTo)
349  incr_val *= 2;
350  return ret_val + incr_val;
351  }
352  };
353 
358  void eventStreamCallback() const;
359  void schedNextEvent(EventStream &ev_stream, ArchTimer &timer);
360 
361  void notify(void) override;
362 
363  void serialize(CheckpointOut &cp) const override;
364  void unserialize(CheckpointIn &cp) override;
365 
366  private:
367  // Disable copying
368  CoreTimers(const CoreTimers &c);
369  };
370 
371  CoreTimers &getTimers(int cpu_id);
372  void createTimers(unsigned cpus);
373 
376 
379 
380  protected: // Configuration
383 
384  void handleStream(CoreTimers::EventStream *ev_stream,
385  ArchTimer *timer, RegVal old_cnt_ctl, RegVal cnt_ctl);
386 };
387 
389 {
390  public:
391  GenericTimerISA(GenericTimer &_parent, unsigned _cpu)
392  : parent(_parent), cpu(_cpu) {}
393 
394  void setMiscReg(int misc_reg, RegVal val) override;
395  RegVal readMiscReg(int misc_reg) override;
396 
397  protected:
399  unsigned cpu;
400 };
401 
403 {
404  public:
405  GenericTimerFrame(const GenericTimerFrameParams &p);
406 
407  void serialize(CheckpointOut &cp) const override;
408  void unserialize(CheckpointIn &cp) override;
409 
411  bool hasVirtualTimer() const;
412 
415  uint64_t getVirtOffset() const;
416 
419  void setVirtOffset(uint64_t new_offset);
420 
422  bool hasEl0View() const;
423 
425  uint8_t getAccessBits() const;
426 
428  void setAccessBits(uint8_t data);
429 
431  bool hasNonSecureAccess() const;
432 
435  void setNonSecureAccess();
436 
438  bool hasReadableVoff() const;
439 
440  protected:
441  AddrRangeList getAddrRanges() const override;
442  Tick read(PacketPtr pkt) override;
443  Tick write(PacketPtr pkt) override;
444 
445  private:
447  uint64_t timerRead(Addr addr, size_t size, bool is_sec, bool to_el0) const;
448  void timerWrite(Addr addr, size_t size, uint64_t data, bool is_sec,
449  bool to_el0);
452 
453  static const Addr TIMER_CNTPCT_LO = 0x00;
454  static const Addr TIMER_CNTPCT_HI = 0x04;
455  static const Addr TIMER_CNTVCT_LO = 0x08;
456  static const Addr TIMER_CNTVCT_HI = 0x0c;
457  static const Addr TIMER_CNTFRQ = 0x10;
458  static const Addr TIMER_CNTEL0ACR = 0x14;
459  static const Addr TIMER_CNTVOFF_LO = 0x18;
460  static const Addr TIMER_CNTVOFF_HI = 0x1c;
461  static const Addr TIMER_CNTP_CVAL_LO = 0x20;
462  static const Addr TIMER_CNTP_CVAL_HI = 0x24;
463  static const Addr TIMER_CNTP_TVAL = 0x28;
464  static const Addr TIMER_CNTP_CTL = 0x2c;
465  static const Addr TIMER_CNTV_CVAL_LO = 0x30;
466  static const Addr TIMER_CNTV_CVAL_HI = 0x34;
467  static const Addr TIMER_CNTV_TVAL = 0x38;
468  static const Addr TIMER_CNTV_CTL = 0x3c;
469 
472 
475 
479 
481  BitUnion8(AccessBits)
482  Bitfield<5> rwpt;
483  Bitfield<4> rwvt;
484  Bitfield<3> rvoff;
485  Bitfield<2> rfrq;
486  Bitfield<1> rvct;
487  Bitfield<0> rpct;
488  EndBitUnion(AccessBits)
489  AccessBits accessBits;
490 
491  // Reports access properties of the CNTEL0Base register frame elements
492  BitUnion16(AccessBitsEl0)
493  Bitfield<9> pten;
494  Bitfield<8> vten;
495  Bitfield<1> vcten;
496  Bitfield<0> pcten;
497  EndBitUnion(AccessBitsEl0)
498  AccessBitsEl0 accessBitsEl0;
499 
502 
504 };
505 
507 {
508  public:
509  GenericTimerMem(const GenericTimerMemParams &p);
510 
513  static void validateFrameRange(const AddrRange &range);
514 
518  static bool validateAccessPerm(ArmSystem &sys, bool is_sec);
519 
520  protected:
521  AddrRangeList getAddrRanges() const override;
522  Tick read(PacketPtr pkt) override;
523  Tick write(PacketPtr pkt) override;
524 
525  private:
527  uint64_t counterCtrlRead(Addr addr, size_t size, bool is_sec) const;
528  void counterCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec);
530 
531  BitUnion32(CNTCR)
532  Bitfield<17,8> fcreq;
533  Bitfield<2> scen;
534  Bitfield<1> hdbg;
535  Bitfield<0> en;
536  EndBitUnion(CNTCR)
537 
538  BitUnion32(CNTSR)
539  Bitfield<31,8> fcack;
540  EndBitUnion(CNTSR)
541 
542  static const Addr COUNTER_CTRL_CNTCR = 0x00;
543  static const Addr COUNTER_CTRL_CNTSR = 0x04;
544  static const Addr COUNTER_CTRL_CNTCV_LO = 0x08;
545  static const Addr COUNTER_CTRL_CNTCV_HI = 0x0c;
546  static const Addr COUNTER_CTRL_CNTSCR = 0x10;
547  static const Addr COUNTER_CTRL_CNTID = 0x1c;
548  static const Addr COUNTER_CTRL_CNTFID = 0x20;
549 
551  uint64_t counterStatusRead(Addr addr, size_t size) const;
552  void counterStatusWrite(Addr addr, size_t size, uint64_t data);
554 
555  static const Addr COUNTER_STATUS_CNTCV_LO = 0x00;
556  static const Addr COUNTER_STATUS_CNTCV_HI = 0x04;
557 
559  uint64_t timerCtrlRead(Addr addr, size_t size, bool is_sec) const;
560  void timerCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec);
562 
564  uint32_t cnttidr;
565 
566  static const Addr TIMER_CTRL_CNTFRQ = 0x00;
567  static const Addr TIMER_CTRL_CNTNSAR = 0x04;
568  static const Addr TIMER_CTRL_CNTTIDR = 0x08;
569  static const Addr TIMER_CTRL_CNTACR = 0x40;
570  static const Addr TIMER_CTRL_CNTVOFF_LO = 0x80;
571  static const Addr TIMER_CTRL_CNTVOFF_HI = 0x84;
572 
575 
578 
580  static constexpr size_t MAX_TIMER_FRAMES = 8;
581 
584 
586 };
587 
588 #endif // __DEV_ARM_GENERIC_TIMER_HH__
GenericTimerMem::TIMER_CTRL_CNTVOFF_LO
static const Addr TIMER_CTRL_CNTVOFF_LO
Definition: generic_timer.hh:570
GenericTimerMem::getAddrRanges
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition: generic_timer.cc:1287
isa_device.hh
GenericTimer::CoreTimers::irqVirt
const ArmInterruptPin * irqVirt
Definition: generic_timer.hh:325
generic_timer_miscregs_types.hh
SystemCounter
Global system counter.
Definition: generic_timer.hh:84
ArchTimer::setTimerValue
void setTimerValue(uint32_t val)
Sets the TimerValue view of the timer.
Definition: generic_timer.cc:311
ArchTimer::name
std::string name() const
Returns the timer name.
Definition: generic_timer.hh:224
GenericTimerMem::hdbg
Bitfield< 1 > hdbg
Definition: generic_timer.hh:534
GenericTimer::CoreTimers::EventStream::eventTargetValue
uint64_t eventTargetValue(uint64_t val) const
Definition: generic_timer.hh:343
SystemCounter::_increment
uint64_t _increment
Value increment in each counter cycle.
Definition: generic_timer.hh:94
GenericTimer::CoreTimers::EventStream::transitionBit
uint8_t transitionBit
Definition: generic_timer.hh:340
GenericTimerISA
Definition: generic_timer.hh:388
GenericTimer::handleStream
void handleStream(CoreTimers::EventStream *ev_stream, ArchTimer *timer, RegVal old_cnt_ctl, RegVal cnt_ctl)
Definition: generic_timer.cc:484
GenericTimerMem::timerCtrlWrite
void timerCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec)
Definition: generic_timer.cc:1529
GenericTimer::CoreTimers::cntkctl
ArmISA::CNTKCTL cntkctl
Kernel control register.
Definition: generic_timer.hh:315
ArchTimerKvm::ArchTimerKvm
ArchTimerKvm(const std::string &name, ArmSystem &system, SimObject &parent, SystemCounter &sysctr, ArmInterruptPin *interrupt)
Definition: generic_timer.hh:270
SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:162
GenericTimerFrame::rfrq
Bitfield< 2 > rfrq
Definition: generic_timer.hh:485
GenericTimer::system
ArmSystem & system
ARM system containing this timer.
Definition: generic_timer.hh:382
SystemCounter::whenValue
Tick whenValue(uint64_t target_val)
Returns the tick at which a certain counter value is reached.
Definition: generic_timer.cc:151
SystemCounter::_listeners
std::vector< SystemCounterListener * > _listeners
Listeners to changes in counting speed.
Definition: generic_timer.hh:106
ArchTimer::BitUnion32
BitUnion32(ArchTimerCtrl) Bitfield< 0 > enable
Control register.
GenericTimerFrame::timerRange
const AddrRange timerRange
Definition: generic_timer.hh:450
data
const char data[]
Definition: circlebuf.test.cc:47
GenericTimerMem::cnttidr
uint32_t cnttidr
ID register for reporting features of implemented timer frames.
Definition: generic_timer.hh:564
GenericTimerMem::counterStatusRange
const AddrRange counterStatusRange
Definition: generic_timer.hh:553
serialize.hh
GenericTimerMem::en
Bitfield< 0 > en
Definition: generic_timer.hh:535
GenericTimerFrame::physTimer
ArchTimer physTimer
Physical and virtual timers.
Definition: generic_timer.hh:477
ArchTimer::_parent
EndBitUnion(ArchTimerCtrl) const std SimObject & _parent
Name of this timer.
Definition: generic_timer.hh:186
GenericTimerISA::readMiscReg
RegVal readMiscReg(int misc_reg) override
Read a system register belonging to this device.
Definition: generic_timer.cc:865
ArmISA::BaseISADevice
Base class for devices that use the MiscReg interfaces.
Definition: isa_device.hh:58
GenericTimerMem::COUNTER_CTRL_CNTID
static const Addr COUNTER_CTRL_CNTID
Definition: generic_timer.hh:547
SystemCounter::disable
void disable()
Disables the counter after a CNTCR.EN == 0.
Definition: generic_timer.cc:96
ArchTimer::ArchTimer
ArchTimer(const std::string &name, SimObject &parent, SystemCounter &sysctr, ArmInterruptPin *interrupt)
Definition: generic_timer.cc:250
GenericTimer::CoreTimers::physEvStream
EventStream physEvStream
Definition: generic_timer.hh:354
GenericTimer::CoreTimers::hyp
ArchTimerKvm hyp
Definition: generic_timer.hh:331
GenericTimerFrame::virtTimer
ArchTimer virtTimer
Definition: generic_timer.hh:478
GenericTimerFrame::TIMER_CNTP_TVAL
static const Addr TIMER_CNTP_TVAL
Definition: generic_timer.hh:463
GenericTimerFrame::BitUnion16
BitUnion16(AccessBitsEl0) Bitfield< 9 > pten
GenericTimerMem::COUNTER_CTRL_CNTCV_LO
static const Addr COUNTER_CTRL_CNTCV_LO
Definition: generic_timer.hh:544
Serializable
Basic support for object serialization.
Definition: serialize.hh:175
GenericTimerFrame::hasReadableVoff
bool hasReadableVoff() const
Indicates if CNTVOFF is readable for this frame.
Definition: generic_timer.cc:963
GenericTimerFrame::setVirtOffset
void setVirtOffset(uint64_t new_offset)
Sets the virtual offset for this frame's virtual timer after a write to CNTVOFF.
Definition: generic_timer.cc:927
ArchTimer::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: generic_timer.cc:364
GenericTimerFrame::systemCounter
SystemCounter & systemCounter
System counter reference.
Definition: generic_timer.hh:474
SystemCounter::_freq
uint32_t _freq
Counter frequency (as specified by CNTFRQ).
Definition: generic_timer.hh:90
ArchTimer::imask
Bitfield< 1 > imask
Definition: generic_timer.hh:184
base_gic.hh
SystemCounter::_nextFreqEntry
size_t _nextFreqEntry
Definition: generic_timer.hh:162
GenericTimer::CoreTimers::eventStreamCallback
void eventStreamCallback() const
Definition: generic_timer.cc:772
ArchTimer
Per-CPU architected timer.
Definition: generic_timer.hh:177
GenericTimerMem::counterStatusWrite
void counterStatusWrite(Addr addr, size_t size, uint64_t data)
Definition: generic_timer.cc:1471
GenericTimerFrame::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: generic_timer.cc:909
SystemCounter::freq
uint32_t freq() const
Returns the counter frequency.
Definition: generic_timer.hh:121
GenericTimer::CoreTimers::physS
ArchTimerKvm physS
Definition: generic_timer.hh:328
GenericTimerFrame::hasEl0View
bool hasEl0View() const
Indicates if this frame implements a second EL0 view.
Definition: generic_timer.cc:933
GenericTimerMem::scen
Bitfield< 2 > scen
Definition: generic_timer.hh:533
GenericTimer::GenericTimer
GenericTimer(const Params &p)
Definition: generic_timer.cc:400
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:59
SystemCounter::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: generic_timer.cc:228
SystemCounter::validateCounterRef
static void validateCounterRef(SystemCounter *sys_cnt)
Validates a System Counter reference.
Definition: generic_timer.cc:81
ArchTimer::_control
ArchTimerCtrl _control
Value of the control register ({CNTP/CNTHP/CNTV}_CTL).
Definition: generic_timer.hh:199
GenericTimerFrame::timerRead
uint64_t timerRead(Addr addr, size_t size, bool is_sec, bool to_el0) const
CNTBase/CNTEL0Base (Memory-mapped timer frame)
Definition: generic_timer.cc:1036
ArchTimer::updateCounter
void updateCounter()
Timer settings or the offset has changed, re-evaluate trigger condition and raise interrupt if necess...
Definition: generic_timer.cc:281
GenericTimerFrame::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: generic_timer.cc:1006
GenericTimerFrame::TIMER_CNTEL0ACR
static const Addr TIMER_CNTEL0ACR
Definition: generic_timer.hh:458
ArchTimer::timerValue
uint32_t timerValue() const
Returns the TimerValue view of the timer.
Definition: generic_timer.hh:232
std::vector< uint32_t >
GenericTimer
Definition: generic_timer.hh:286
SystemCounter::activeFreqEntry
size_t activeFreqEntry() const
Returns the currently active frequency table entry.
Definition: generic_timer.hh:129
GenericTimerFrame::vten
Bitfield< 8 > vten
Definition: generic_timer.hh:494
GenericTimer::CoreTimers::irqPhysS
const ArmInterruptPin * irqPhysS
Definition: generic_timer.hh:323
System::validKvmEnvironment
bool validKvmEnvironment() const
Verify gem5 configuration will support KVM emulation.
Definition: system.cc:358
ArchTimerKvm::scheduleEvents
bool scheduleEvents() override
Definition: generic_timer.hh:281
GenericTimerMem::COUNTER_STATUS_CNTCV_HI
static const Addr COUNTER_STATUS_CNTCV_HI
Definition: generic_timer.hh:556
GenericTimerMem::COUNTER_STATUS_CNTCV_LO
static const Addr COUNTER_STATUS_CNTCV_LO
Definition: generic_timer.hh:555
ArchTimer::setOffset
void setOffset(uint64_t val)
Definition: generic_timer.cc:345
system.hh
GenericTimer::CoreTimers::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: generic_timer.cc:825
SystemCounter::_updateTick
Tick _updateTick
Counter cycle start Tick when the counter status affecting its value has been updated.
Definition: generic_timer.hh:103
GenericTimerMem::timerCtrlRange
const AddrRange timerCtrlRange
Definition: generic_timer.hh:561
SystemCounter::updateTick
void updateTick(void)
Updates the update tick, normalizes to the lower cycle start tick.
Definition: generic_timer.cc:157
GenericTimerFrame::EndBitUnion
EndBitUnion(AccessBits) AccessBits accessBits
ArchTimer::notify
void notify(void) override
Called from the SystemCounter when a change in counting speed occurred Events should be rescheduled p...
Definition: generic_timer.cc:358
GenericTimerMem::counterCtrlRange
const AddrRange counterCtrlRange
Definition: generic_timer.hh:529
GenericTimerFrame::addrRanges
AddrRangeList addrRanges
All MMIO ranges GenericTimerFrame responds to.
Definition: generic_timer.hh:471
GenericTimer::CoreTimers::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: generic_timer.cc:794
GenericTimerMem::validateAccessPerm
static bool validateAccessPerm(ArmSystem &sys, bool is_sec)
Validates an MMIO access permissions.
Definition: generic_timer.cc:1281
GenericTimerFrame::TIMER_CNTPCT_LO
static const Addr TIMER_CNTPCT_LO
Definition: generic_timer.hh:453
GenericTimer::CoreTimers::schedNextEvent
void schedNextEvent(EventStream &ev_stream, ArchTimer &timer)
Definition: generic_timer.cc:779
SystemCounter::_period
Tick _period
Cached copy of the counter period (inverse of the frequency).
Definition: generic_timer.hh:100
EventFunctionWrapper
Definition: eventq.hh:1112
PioDevice::sys
System * sys
Definition: io_device.hh:102
GenericTimer::CoreTimers::cnthctl
ArmISA::CNTHCTL cnthctl
Hypervisor control register.
Definition: generic_timer.hh:318
SystemCounter::_freqTable
std::vector< uint32_t > _freqTable
Frequency modes table with all possible frequencies for the counter.
Definition: generic_timer.hh:96
GenericTimer::CoreTimers::physEventStreamCallback
void physEventStreamCallback()
Definition: generic_timer.cc:758
GenericTimerFrame::timerWrite
void timerWrite(Addr addr, size_t size, uint64_t data, bool is_sec, bool to_el0)
Definition: generic_timer.cc:1148
DrainState
DrainState
Object drain/handover states.
Definition: drain.hh:71
ArchTimer::setCompareValue
void setCompareValue(uint64_t val)
Sets the CompareValue view of the timer.
Definition: generic_timer.cc:304
GenericTimerMem::TIMER_CTRL_CNTNSAR
static const Addr TIMER_CTRL_CNTNSAR
Definition: generic_timer.hh:567
SystemCounter::freqUpdateCallback
void freqUpdateCallback()
Callback for the frequency update.
Definition: generic_timer.cc:181
GenericTimer::PARAMS
PARAMS(GenericTimer)
SystemCounter::enable
void enable()
Enables the counter after a CNTCR.EN == 1.
Definition: generic_timer.cc:88
cp
Definition: cprintf.cc:37
SystemCounter::SystemCounter
SystemCounter(const SystemCounterParams &p)
Definition: generic_timer.cc:57
PioDevice
This device is the base class which all devices senstive to an address range inherit from.
Definition: io_device.hh:99
GenericTimerFrame::TIMER_CNTVOFF_HI
static const Addr TIMER_CNTVOFF_HI
Definition: generic_timer.hh:460
GenericTimerMem::MAX_TIMER_FRAMES
static constexpr size_t MAX_TIMER_FRAMES
Maximum architectural number of memory-mapped timer frames.
Definition: generic_timer.hh:580
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
GenericTimerFrame::hasVirtualTimer
bool hasVirtualTimer() const
Indicates if this frame implements a virtual timer.
Drainable
Interface for objects that might require draining before checkpointing.
Definition: drain.hh:230
ArchTimer::drain
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
Definition: generic_timer.cc:386
GenericTimerFrame::TIMER_CNTP_CVAL_HI
static const Addr TIMER_CNTP_CVAL_HI
Definition: generic_timer.hh:462
AddrRange
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:68
GenericTimerMem::counterStatusRead
uint64_t counterStatusRead(Addr addr, size_t size) const
CNTReadBase (System counter status frame)
Definition: generic_timer.cc:1458
SystemCounter::increment
uint64_t increment() const
Returns the value increment.
Definition: generic_timer.hh:125
sim_object.hh
GenericTimer::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: generic_timer.cc:423
GenericTimer::CoreTimers::parent
GenericTimer & parent
Generic Timer parent reference.
Definition: generic_timer.hh:309
GenericTimerMem::frames
std::vector< GenericTimerFrame * > frames
Timer frame references.
Definition: generic_timer.hh:583
GenericTimerMem::COUNTER_CTRL_CNTCV_HI
static const Addr COUNTER_CTRL_CNTCV_HI
Definition: generic_timer.hh:545
EndBitUnion
EndBitUnion(PciCommandRegister) union PCIConfig
Definition: pcireg.h:65
GenericTimerFrame::TIMER_CNTP_CVAL_LO
static const Addr TIMER_CNTP_CVAL_LO
Definition: generic_timer.hh:461
ArchTimer::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: generic_timer.cc:372
GenericTimerFrame::TIMER_CNTP_CTL
static const Addr TIMER_CNTP_CTL
Definition: generic_timer.hh:464
GenericTimerFrame::TIMER_CNTV_TVAL
static const Addr TIMER_CNTV_TVAL
Definition: generic_timer.hh:467
ArchTimer::compareValue
uint64_t compareValue() const
Returns the CompareValue view of the timer.
Definition: generic_timer.hh:227
SystemCounter::_freqUpdateEvent
EventFunctionWrapper _freqUpdateEvent
Frequency update event handling.
Definition: generic_timer.hh:161
SystemCounter::registerListener
void registerListener(SystemCounterListener *listener)
Called from System Counter Listeners to register.
Definition: generic_timer.cc:195
ArchTimerKvm::system
ArmSystem & system
Definition: generic_timer.hh:267
GenericTimerMem::counterCtrlWrite
void counterCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec)
Definition: generic_timer.cc:1384
GenericTimer::CoreTimers::notify
void notify(void) override
Called from the SystemCounter when a change in counting speed occurred Events should be rescheduled p...
Definition: generic_timer.cc:787
bitunion.hh
GenericTimerFrame::getAddrRanges
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition: generic_timer.cc:969
GenericTimerFrame::TIMER_CNTFRQ
static const Addr TIMER_CNTFRQ
Definition: generic_timer.hh:457
GenericTimer::readMiscReg
RegVal readMiscReg(int misc_reg, unsigned cpu)
Definition: generic_timer.cc:636
GenericTimer::CoreTimers::irqPhysNS
const ArmInterruptPin * irqPhysNS
Definition: generic_timer.hh:324
GenericTimerMem::validateFrameRange
static void validateFrameRange(const AddrRange &range)
Validates a Generic Timer register frame address range.
Definition: generic_timer.cc:1272
GenericTimerISA::cpu
unsigned cpu
Definition: generic_timer.hh:399
GenericTimerFrame::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: generic_timer.cc:897
GenericTimer::CoreTimers::EventStream::event
EventFunctionWrapper event
Definition: generic_timer.hh:338
GenericTimer::getTimers
CoreTimers & getTimers(int cpu_id)
Definition: generic_timer.cc:454
ArchTimer::value
uint64_t value() const
Returns the value of the counter which this timer relies on.
Definition: generic_timer.cc:352
GenericTimerMem::counterCtrlRead
uint64_t counterCtrlRead(Addr addr, size_t size, bool is_sec) const
CNTControlBase (System counter control frame)
Definition: generic_timer.cc:1346
GenericTimerFrame::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: generic_timer.cc:975
GenericTimerISA::parent
GenericTimer & parent
Definition: generic_timer.hh:398
GenericTimerMem::system
ArmSystem & system
Definition: generic_timer.hh:585
GenericTimerFrame::BitUnion8
BitUnion8(AccessBits) Bitfield< 5 > rwpt
Reports access properties of the CNTBase register frame elements.
GenericTimerFrame
Definition: generic_timer.hh:402
SystemCounter::MAX_FREQ_ENTRIES
static constexpr size_t MAX_FREQ_ENTRIES
Maximum architectural number of frequency table entries.
Definition: generic_timer.hh:109
mbits
constexpr T mbits(T val, unsigned first, unsigned last)
Mask off the given bits in place like bits() but without shifting.
Definition: bitfield.hh:100
SystemCounter::value
uint64_t value()
Updates and returns the counter value.
Definition: generic_timer.cc:104
SystemCounter::notifyListeners
void notifyListeners(void) const
Notifies counting speed changes to listeners.
Definition: generic_timer.cc:201
SystemCounter::enabled
bool enabled() const
Indicates if the counter is enabled.
Definition: generic_timer.hh:119
ArchTimer::_systemCounter
SystemCounter & _systemCounter
Definition: generic_timer.hh:194
GenericTimerFrame::rvoff
Bitfield< 3 > rvoff
Definition: generic_timer.hh:484
GenericTimerFrame::TIMER_CNTVCT_HI
static const Addr TIMER_CNTVCT_HI
Definition: generic_timer.hh:456
ArchTimerKvm
Definition: generic_timer.hh:264
ArchTimer::control
uint32_t control() const
Sets the control register.
Definition: generic_timer.hh:237
X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
GenericTimerFrame::TIMER_CNTV_CVAL_HI
static const Addr TIMER_CNTV_CVAL_HI
Definition: generic_timer.hh:466
GenericTimerFrame::GenericTimerFrame
GenericTimerFrame(const GenericTimerFrameParams &p)
Definition: generic_timer.cc:872
SystemCounterListener
Abstract class for elements whose events depend on the counting speed of the System Counter.
Definition: generic_timer.hh:74
core.hh
GenericTimerMem::COUNTER_CTRL_CNTSR
static const Addr COUNTER_CTRL_CNTSR
Definition: generic_timer.hh:543
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:148
GenericTimerFrame::system
ArmSystem & system
Definition: generic_timer.hh:503
SystemCounter::_enabled
bool _enabled
Indicates if the counter is enabled.
Definition: generic_timer.hh:88
SystemCounter::setValue
void setValue(uint64_t new_value)
Sets the value explicitly from writes to CNTCR.CNTCV.
Definition: generic_timer.cc:123
GenericTimerFrame::timerEl0Range
AddrRange timerEl0Range
Definition: generic_timer.hh:451
GenericTimer::CoreTimers::irqHyp
const ArmInterruptPin * irqHyp
Definition: generic_timer.hh:326
ArchTimer::istatus
Bitfield< 2 > istatus
Definition: generic_timer.hh:185
addr_range.hh
GenericTimerFrame::getAccessBits
uint8_t getAccessBits() const
Returns the access bits for this frame.
Definition: generic_timer.cc:939
ArchTimer::counterLimitReached
void counterLimitReached()
Called when the upcounter reaches the programmed value.
Definition: generic_timer.cc:263
X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:80
SystemCounter::_activeFreqEntry
size_t _activeFreqEntry
Currently selected entry in the table, its contents should match _freq.
Definition: generic_timer.hh:98
SystemCounter::updateValue
void updateValue(void)
Updates the counter value.
Definition: generic_timer.cc:112
ArmSystem
Definition: system.hh:59
GenericTimerMem::COUNTER_CTRL_CNTSCR
static const Addr COUNTER_CTRL_CNTSCR
Definition: generic_timer.hh:546
GenericTimer::CoreTimers::EventStream
Definition: generic_timer.hh:336
GenericTimerFrame::TIMER_CNTVCT_LO
static const Addr TIMER_CNTVCT_LO
Definition: generic_timer.hh:455
ArchTimer::drainResume
void drainResume() override
Resume execution after a successful drain.
Definition: generic_timer.cc:395
GenericTimer::CoreTimers::physNS
ArchTimerKvm physNS
Definition: generic_timer.hh:329
ArchTimer::_interrupt
ArmInterruptPin *const _interrupt
Definition: generic_timer.hh:196
ArchTimer::scheduleEvents
virtual bool scheduleEvents()
Definition: generic_timer.hh:215
GenericTimer::CoreTimers::virtEvStream
EventStream virtEvStream
Definition: generic_timer.hh:355
GenericTimerMem::EndBitUnion
EndBitUnion(CNTCR) BitUnion32(CNTSR) Bitfield< 31
ArchTimer::setControl
void setControl(uint32_t val)
Definition: generic_timer.cc:317
GenericTimerMem::GenericTimerMem
GenericTimerMem(const GenericTimerMemParams &p)
Definition: generic_timer.cc:1243
std
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:587
X86ISA::vector
Bitfield< 15, 8 > vector
Definition: intmessage.hh:44
types.hh
GenericTimerFrame::nonSecureAccess
bool nonSecureAccess
Reports whether non-secure accesses are allowed to this frame.
Definition: generic_timer.hh:501
ArmISA::t
Bitfield< 5 > t
Definition: miscregs_types.hh:67
GenericTimerFrame::rwvt
Bitfield< 4 > rwvt
Definition: generic_timer.hh:483
GenericTimer::CoreTimers::cntfrq
uint32_t cntfrq
System counter frequency as visible from this core.
Definition: generic_timer.hh:312
X86ISA::enable
Bitfield< 11 > enable
Definition: misc.hh:1051
GenericTimerFrame::TIMER_CNTVOFF_LO
static const Addr TIMER_CNTVOFF_LO
Definition: generic_timer.hh:459
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:258
GenericTimerMem::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: generic_timer.cc:1293
GenericTimer::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: generic_timer.cc:412
ArmInterruptPin
Generic representation of an Arm interrupt pin.
Definition: base_gic.hh:179
GenericTimerISA::GenericTimerISA
GenericTimerISA(GenericTimer &_parent, unsigned _cpu)
Definition: generic_timer.hh:391
GenericTimerFrame::hasNonSecureAccess
bool hasNonSecureAccess() const
Indicates if non-secure accesses are allowed to this frame.
Definition: generic_timer.cc:951
GenericTimerISA::setMiscReg
void setMiscReg(int misc_reg, RegVal val) override
Write to a system register belonging to this device.
Definition: generic_timer.cc:858
SystemCounter::_value
uint64_t _value
Counter value (as specified in CNTCV).
Definition: generic_timer.hh:92
GenericTimerFrame::vcten
Bitfield< 1 > vcten
Definition: generic_timer.hh:495
SystemCounter::period
Tick period() const
Returns the counter period.
Definition: generic_timer.hh:131
GenericTimer::CoreTimers::threadContext
ThreadContext * threadContext
Thread (HW) context associated to this PE implementation.
Definition: generic_timer.hh:321
SystemCounterListener::notify
virtual void notify(void)=0
Called from the SystemCounter when a change in counting speed occurred Events should be rescheduled p...
GenericTimer::CoreTimers::EventStream::transitionTo
uint8_t transitionTo
Definition: generic_timer.hh:339
bits
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:73
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:64
GenericTimerMem::TIMER_CTRL_CNTTIDR
static const Addr TIMER_CTRL_CNTTIDR
Definition: generic_timer.hh:568
GenericTimer::CoreTimers
Definition: generic_timer.hh:301
GenericTimer::CoreTimers::CoreTimers
CoreTimers(GenericTimer &_parent, ArmSystem &system, unsigned cpu, ArmInterruptPin *_irqPhysS, ArmInterruptPin *_irqPhysNS, ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp)
Definition: generic_timer.cc:721
ArmISA::c
Bitfield< 29 > c
Definition: miscregs_types.hh:50
drain.hh
ArchTimer::_offset
uint64_t _offset
Offset relative to the physical timer (CNTVOFF)
Definition: generic_timer.hh:203
GenericTimerMem::fcreq
fcreq
Definition: generic_timer.hh:532
GenericTimerMem::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: generic_timer.cc:1320
SystemCounter::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: generic_timer.cc:208
GenericTimerMem
Definition: generic_timer.hh:506
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
GenericTimerMem::BitUnion32
BitUnion32(CNTCR) Bitfield< 17
GenericTimerMem::fcack
fcack
Definition: generic_timer.hh:539
GenericTimer::CoreTimers::virt
ArchTimerKvm virt
Definition: generic_timer.hh:330
ArchTimer::_counterLimitReachedEvent
EventFunctionWrapper _counterLimitReachedEvent
Definition: generic_timer.hh:213
GenericTimer::systemCounter
SystemCounter & systemCounter
System counter reference.
Definition: generic_timer.hh:375
GenericTimerFrame::getVirtOffset
uint64_t getVirtOffset() const
Returns the virtual offset for this frame if a virtual timer is implemented.
Definition: generic_timer.cc:921
CheckpointIn
Definition: serialize.hh:68
GenericTimerMem::TIMER_CTRL_CNTACR
static const Addr TIMER_CTRL_CNTACR
Definition: generic_timer.hh:569
ArchTimer::offset
uint64_t offset() const
Definition: generic_timer.hh:240
GenericTimerFrame::pcten
Bitfield< 0 > pcten
Definition: generic_timer.hh:496
GenericTimerFrame::setNonSecureAccess
void setNonSecureAccess()
Allows non-secure accesses after an enabling write to CNTCTLBase.CNTNSAR.
Definition: generic_timer.cc:957
ArchTimer::_counterLimit
uint64_t _counterLimit
Programmed limit value for the upcounter ({CNTP/CNTHP/CNTV}_CVAL).
Definition: generic_timer.hh:201
GenericTimer::CoreTimers::virtEventStreamCallback
void virtEventStreamCallback()
Definition: generic_timer.cc:765
GenericTimer::createTimers
void createTimers(unsigned cpus)
Definition: generic_timer.cc:463
ArchTimer::whenValue
Tick whenValue(uint64_t target_val)
Definition: generic_timer.hh:245
GenericTimerMem::TIMER_CTRL_CNTVOFF_HI
static const Addr TIMER_CTRL_CNTVOFF_HI
Definition: generic_timer.hh:571
GenericTimer::setMiscReg
void setMiscReg(int misc_reg, unsigned cpu, RegVal val)
Definition: generic_timer.cc:510
GenericTimerFrame::setAccessBits
void setAccessBits(uint8_t data)
Updates the access bits after a write to CNTCTLBase.CNTACR.
Definition: generic_timer.cc:945
RegVal
uint64_t RegVal
Definition: types.hh:174
GenericTimerMem::timerCtrlRead
uint64_t timerCtrlRead(Addr addr, size_t size, bool is_sec) const
CNTCTLBase (Memory-mapped timer global control frame)
Definition: generic_timer.cc:1485
GenericTimerFrame::TIMER_CNTV_CTL
static const Addr TIMER_CNTV_CTL
Definition: generic_timer.hh:468
GenericTimerMem::TIMER_CTRL_CNTFRQ
static const Addr TIMER_CTRL_CNTFRQ
Definition: generic_timer.hh:566
SystemCounter::freqUpdateSchedule
void freqUpdateSchedule(size_t new_freq_entry)
Schedules a counter frequency update after a CNTCR.FCREQ == 1 This complies with frequency transition...
Definition: generic_timer.cc:163
GenericTimerFrame::rpct
Bitfield< 0 > rpct
Definition: generic_timer.hh:487
SystemCounter::freqTable
std::vector< uint32_t > & freqTable()
Returns a reference to the frequency modes table.
Definition: generic_timer.hh:127
GenericTimerFrame::TIMER_CNTV_CVAL_LO
static const Addr TIMER_CNTV_CVAL_LO
Definition: generic_timer.hh:465
GenericTimerFrame::rvct
Bitfield< 1 > rvct
Definition: generic_timer.hh:486
GenericTimerMem::addrRanges
const AddrRangeList addrRanges
All MMIO ranges GenericTimerMem responds to.
Definition: generic_timer.hh:574
GenericTimer::timers
std::vector< std::unique_ptr< CoreTimers > > timers
Per-CPU physical architected timers.
Definition: generic_timer.hh:378
GenericTimerMem::systemCounter
SystemCounter & systemCounter
System counter reference.
Definition: generic_timer.hh:577
eventq.hh
SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:141
GenericTimerFrame::TIMER_CNTPCT_HI
static const Addr TIMER_CNTPCT_HI
Definition: generic_timer.hh:454
GenericTimerMem::COUNTER_CTRL_CNTFID
static const Addr COUNTER_CTRL_CNTFID
Definition: generic_timer.hh:548

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