Checker< Impl > Class Template Reference

Templated Checker class. More...

#include <cpu.hh>

Inheritance diagram for Checker< Impl >:

Public Member Functions
	Checker (const Params &p)
void	switchOut ()
	Prepare for another CPU to take over execution. More...
void	takeOverFrom (BaseCPU *oldCPU)
	Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More...
void	advancePC (const Fault &fault)
void	verify (const DynInstPtr &inst)
void	validateInst (const DynInstPtr &inst)
void	validateExecution (const DynInstPtr &inst)
void	validateState ()
void	copyResult (const DynInstPtr &inst, const InstResult &mismatch_val, int start_idx)
void	handlePendingInt ()
Public Member Functions inherited from CheckerCPU
void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected. More...
	PARAMS (CheckerCPU)
	CheckerCPU (const Params &p)
virtual	~CheckerCPU ()
void	setSystem (System *system)
void	setIcachePort (RequestPort *icache_port)
void	setDcachePort (RequestPort *dcache_port)
Port &	getDataPort () override
	Purely virtual method that returns a reference to the data port. More...
Port &	getInstPort () override
	Purely virtual method that returns a reference to the instruction port. More...
BaseMMU *	getMMUPtr ()
virtual Counter	totalInsts () const override
virtual Counter	totalOps () const override
void	serialize (CheckpointOut &cp) const override
	Serialize this object to the given output stream. More...
void	unserialize (CheckpointIn &cp) override
	Reconstruct the state of this object from a checkpoint. More...
RegVal	readIntRegOperand (const StaticInst *si, int idx) override
	Reads an integer register. More...
RegVal	readFloatRegOperandBits (const StaticInst *si, int idx) override
	Reads a floating point register in its binary format, instead of by value. More...
const TheISA::VecRegContainer &	readVecRegOperand (const StaticInst *si, int idx) const override
	Read source vector register operand. More...
TheISA::VecRegContainer &	getWritableVecRegOperand (const StaticInst *si, int idx) override
	Read destination vector register operand for modification. More...
TheISA::VecElem	readVecElemOperand (const StaticInst *si, int idx) const override
	Vector Elem Interfaces. More...
const TheISA::VecPredRegContainer &	readVecPredRegOperand (const StaticInst *si, int idx) const override
	Predicate registers interface. More...
TheISA::VecPredRegContainer &	getWritableVecPredRegOperand (const StaticInst *si, int idx) override
	Gets destination predicate register operand for modification. More...
RegVal	readCCRegOperand (const StaticInst *si, int idx) override
template<typename T >
void	setScalarResult (T &&t)
template<typename T >
void	setVecResult (T &&t)
template<typename T >
void	setVecElemResult (T &&t)
template<typename T >
void	setVecPredResult (T &&t)
void	setIntRegOperand (const StaticInst *si, int idx, RegVal val) override
	Sets an integer register to a value. More...
void	setFloatRegOperandBits (const StaticInst *si, int idx, RegVal val) override
	Sets the bits of a floating point register of single width to a binary value. More...
void	setCCRegOperand (const StaticInst *si, int idx, RegVal val) override
void	setVecRegOperand (const StaticInst *si, int idx, const TheISA::VecRegContainer &val) override
	Sets a destination vector register operand to a value. More...
void	setVecElemOperand (const StaticInst *si, int idx, const TheISA::VecElem val) override
	Sets a vector register to a value. More...
void	setVecPredRegOperand (const StaticInst *si, int idx, const TheISA::VecPredRegContainer &val) override
	Sets a destination predicate register operand to a value. More...
bool	readPredicate () const override
void	setPredicate (bool val) override
bool	readMemAccPredicate () const override
void	setMemAccPredicate (bool val) override
uint64_t	getHtmTransactionUid () const override
uint64_t	newHtmTransactionUid () const override
Fault	initiateHtmCmd (Request::Flags flags) override
	Initiate an HTM command, e.g. More...
bool	inHtmTransactionalState () const override
uint64_t	getHtmTransactionalDepth () const override
TheISA::PCState	pcState () const override
void	pcState (const TheISA::PCState &val) override
Addr	instAddr ()
Addr	nextInstAddr ()
MicroPC	microPC ()
RegVal	readMiscRegNoEffect (int misc_reg) const
RegVal	readMiscReg (int misc_reg) override
	Reads a miscellaneous register, handling any architectural side effects due to reading that register. More...
void	setMiscRegNoEffect (int misc_reg, RegVal val)
void	setMiscReg (int misc_reg, RegVal val) override
	Sets a miscellaneous register, handling any architectural side effects due to writing that register. More...
RegVal	readMiscRegOperand (const StaticInst *si, int idx) override
void	setMiscRegOperand (const StaticInst *si, int idx, RegVal val) override
void	recordPCChange (const TheISA::PCState &val)
void	demapPage (Addr vaddr, uint64_t asn) override
	Invalidate a page in the DTLB and ITLB. More...
void	armMonitor (Addr address) override
bool	mwait (PacketPtr pkt) override
void	mwaitAtomic (ThreadContext *tc) override
AddressMonitor *	getAddrMonitor () override
RequestPtr	genMemFragmentRequest (Addr frag_addr, int size, Request::Flags flags, const std::vector< bool > &byte_enable, int &frag_size, int &size_left) const
	Helper function used to generate the request for a single fragment of a memory access. More...
Fault	readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable) override
Fault	writeMem (uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable) override
Fault	amoMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op) override
unsigned int	readStCondFailures () const override
	Returns the number of consecutive store conditional failures. More...
void	setStCondFailures (unsigned int sc_failures) override
	Sets the number of consecutive store conditional failures. More...
void	wakeup (ThreadID tid) override
void	handleError ()
bool	checkFlags (const RequestPtr &unverified_req, Addr vAddr, Addr pAddr, int flags)
	Checks if the flags set by the Checker and Checkee match. More...
void	dumpAndExit ()
ThreadContext *	tcBase () const override
	Returns a pointer to the ThreadContext. More...
SimpleThread *	threadBase ()
virtual ConstVecLane8	readVec8BitLaneOperand (const StaticInst *si, int idx) const override
	Vector Register Lane Interfaces. More...
virtual ConstVecLane16	readVec16BitLaneOperand (const StaticInst *si, int idx) const override
	Reads source vector 16bit operand. More...
virtual ConstVecLane32	readVec32BitLaneOperand (const StaticInst *si, int idx) const override
	Reads source vector 32bit operand. More...
virtual ConstVecLane64	readVec64BitLaneOperand (const StaticInst *si, int idx) const override
	Reads source vector 64bit operand. More...
template<typename LD >
void	setVecLaneOperandT (const StaticInst *si, int idx, const LD &val)
	Write a lane of the destination vector operand. More...
virtual void	setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::Byte > &val) override
	Write a lane of the destination vector operand. More...
virtual void	setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::TwoByte > &val) override
virtual void	setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::FourByte > &val) override
virtual void	setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::EightByte > &val) override
Public Member Functions inherited from BaseCPU
virtual PortProxy::SendFunctionalFunc	getSendFunctional ()
	Returns a sendFunctional delegate for use with port proxies. More...
int	cpuId () const
	Reads this CPU's ID. More...
uint32_t	socketId () const
	Reads this CPU's Socket ID. More...
RequestorID	dataRequestorId () const
	Reads this CPU's unique data requestor ID. More...
RequestorID	instRequestorId () const
	Reads this CPU's unique instruction requestor ID. More...
Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port on this CPU. More...
uint32_t	taskId () const
	Get cpu task id. More...
void	taskId (uint32_t id)
	Set cpu task id. More...
uint32_t	getPid () const
void	setPid (uint32_t pid)
void	workItemBegin ()
void	workItemEnd ()
Tick	instCount ()
BaseInterrupts *	getInterruptController (ThreadID tid)
void	postInterrupt (ThreadID tid, int int_num, int index)
void	clearInterrupt (ThreadID tid, int int_num, int index)
void	clearInterrupts (ThreadID tid)
bool	checkInterrupts (ThreadID tid) const
Trace::InstTracer *	getTracer ()
	Provide access to the tracer pointer. More...
virtual void	activateContext (ThreadID thread_num)
	Notify the CPU that the indicated context is now active. More...
virtual void	suspendContext (ThreadID thread_num)
	Notify the CPU that the indicated context is now suspended. More...
virtual void	haltContext (ThreadID thread_num)
	Notify the CPU that the indicated context is now halted. More...
int	findContext (ThreadContext *tc)
	Given a Thread Context pointer return the thread num. More...
virtual ThreadContext *	getContext (int tn)
	Given a thread num get tho thread context for it. More...
unsigned	numContexts ()
	Get the number of thread contexts available. More...
ThreadID	contextToThread (ContextID cid)
	Convert ContextID to threadID. More...
	PARAMS (BaseCPU)
	BaseCPU (const Params &params, bool is_checker=false)
virtual	~BaseCPU ()
void	startup () override
	startup() is the final initialization call before simulation. More...
void	regStats () override
	Callback to set stat parameters. More...
void	regProbePoints () override
	Register probe points for this object. More...
void	registerThreadContexts ()
void	deschedulePowerGatingEvent ()
void	schedulePowerGatingEvent ()
void	flushTLBs ()
	Flush all TLBs in the CPU. More...
bool	switchedOut () const
	Determine if the CPU is switched out. More...
virtual void	verifyMemoryMode () const
	Verify that the system is in a memory mode supported by the CPU. More...
unsigned int	cacheLineSize () const
	Get the cache line size of the system. More...
virtual void	serializeThread (CheckpointOut &cp, ThreadID tid) const
	Serialize a single thread. More...
virtual void	unserializeThread (CheckpointIn &cp, ThreadID tid)
	Unserialize one thread. More...
void	scheduleInstStop (ThreadID tid, Counter insts, const char *cause)
	Schedule an event that exits the simulation loops after a predefined number of instructions. More...
uint64_t	getCurrentInstCount (ThreadID tid)
	Get the number of instructions executed by the specified thread on this CPU. More...
void	traceFunctions (Addr pc)
void	armMonitor (ThreadID tid, Addr address)
bool	mwait (ThreadID tid, PacketPtr pkt)
void	mwaitAtomic (ThreadID tid, ThreadContext *tc, BaseMMU *mmu)
AddressMonitor *	getCpuAddrMonitor (ThreadID tid)
bool	waitForRemoteGDB () const
virtual void	probeInstCommit (const StaticInstPtr &inst, Addr pc)
	Helper method to trigger PMU probes for a committed instruction. More...
Public Member Functions inherited from ClockedObject
	ClockedObject (const ClockedObjectParams &p)
void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...
void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...
Public Member Functions inherited from SimObject
const Params &	params () const
	SimObject (const Params &p)
virtual	~SimObject ()
virtual const std::string	name () const
virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...
virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...
virtual void	regProbeListeners ()
	Register probe listeners for this object. More...
ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...
DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...
virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...
virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...
void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...
void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...
Public Member Functions inherited from EventManager
EventQueue *	eventQueue () const
void	schedule (Event &event, Tick when)
void	deschedule (Event &event)
void	reschedule (Event &event, Tick when, bool always=false)
void	schedule (Event *event, Tick when)
void	deschedule (Event *event)
void	reschedule (Event *event, Tick when, bool always=false)
void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
void	setCurTick (Tick newVal)
	EventManager (EventManager &em)
	Event manger manages events in the event queue. More...
	EventManager (EventManager *em)
	EventManager (EventQueue *eq)
Public Member Functions inherited from Serializable
	Serializable ()
virtual	~Serializable ()
void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...
void	serializeSection (CheckpointOut &cp, const std::string &name) const
void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...
void	unserializeSection (CheckpointIn &cp, const std::string &name)
Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...
virtual void	notifyFork ()
	Notify a child process of a fork. More...
Public Member Functions inherited from Stats::Group
	Group (Group *parent, const char *name=nullptr)
	Construct a new statistics group. More...
virtual	~Group ()
virtual void	resetStats ()
	Callback to reset stats. More...
virtual void	preDumpStats ()
	Callback before stats are dumped. More...
void	addStat (Stats::Info *info)
	Register a stat with this group. More...
const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...
const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...
void	addStatGroup (const char *name, Group *block)
	Add a stat block as a child of this block. More...
const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...
void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block. More...
	Group ()=delete
	Group (const Group &)=delete
Group &	operator= (const Group &)=delete
Public Member Functions inherited from Clocked
void	updateClockPeriod ()
	Update the tick to the current tick. More...
Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
uint64_t	frequency () const
Tick	clockPeriod () const
double	voltage () const
Cycles	ticksToCycles (Tick t) const
Tick	cyclesToTicks (Cycles c) const
Public Member Functions inherited from ExecContext
virtual Fault	readMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable)
	Perform an atomic memory read operation. More...
virtual Fault	initiateMemRead (Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable)
	Initiate a timing memory read operation. More...
virtual Fault	writeMem (uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable)=0
	For atomic-mode contexts, perform an atomic memory write operation. More...
virtual Fault	amoMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op)
	For atomic-mode contexts, perform an atomic AMO (a.k.a., Atomic Read-Modify-Write Memory Operation) More...
virtual Fault	initiateMemAMO (Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op)
	For timing-mode contexts, initiate an atomic AMO (atomic read-modify-write memory operation) More...

Private Types
typedef Impl::DynInstPtr	DynInstPtr
typedef std::list< DynInstPtr >::iterator	InstListIt

Private Member Functions
void	handleError (const DynInstPtr &inst)
void	dumpAndExit (const DynInstPtr &inst)
void	dumpInsts ()

Private Attributes
bool	updateThisCycle
DynInstPtr	unverifiedInst
std::list< DynInstPtr >	instList

Additional Inherited Members
Public Types inherited from ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject. More...
Public Types inherited from SimObject
typedef SimObjectParams	Params
Static Public Member Functions inherited from BaseCPU
static int	numSimulatedCPUs ()
static Counter	numSimulatedInsts ()
static Counter	numSimulatedOps ()
Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...
static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...
Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...
static void	serializeAll (const std::string &cpt_dir)
	Serializes all the SimObjects. More...
static void	unserializeGlobals (CheckpointIn &cp)
Public Attributes inherited from CheckerCPU
SimpleThread *	thread
Counter	numLoad
Counter	startNumLoad
InstResult	unverifiedResult
RequestPtr	unverifiedReq
uint8_t *	unverifiedMemData
bool	changedPC
bool	willChangePC
TheISA::PCState	newPCState
bool	exitOnError
bool	updateOnError
bool	warnOnlyOnLoadError
InstSeqNum	youngestSN
Public Attributes inherited from BaseCPU
ThreadID	numThreads
	Number of threads we're actually simulating (<= SMT_MAX_THREADS). More...
System *	system
BaseCPU::BaseCPUStats	baseStats
Cycles	syscallRetryLatency
Public Attributes inherited from ClockedObject
PowerState *	powerState
Static Public Attributes inherited from BaseCPU
static const uint32_t	invldPid = std::numeric_limits<uint32_t>::max()
	Invalid or unknown Pid. More...
static const Addr	PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1)
Protected Types inherited from BaseCPU
enum	CPUState { CPU_STATE_ON, CPU_STATE_SLEEP, CPU_STATE_WAKEUP }
Protected Member Functions inherited from BaseCPU
void	updateCycleCounters (CPUState state)
	base method keeping track of cycle progression More...
void	enterPwrGating ()
ProbePoints::PMUUPtr	pmuProbePoint (const char *name)
	Helper method to instantiate probe points belonging to this object. More...
Protected Member Functions inherited from Drainable
	Drainable ()
virtual	~Drainable ()
virtual void	drainResume ()
	Resume execution after a successful drain. More...
void	signalDrainDone () const
	Signal that an object is drained. More...
Protected Member Functions inherited from Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters. More...
	Clocked (Clocked &)=delete
Clocked &	operator= (Clocked &)=delete
virtual	~Clocked ()
	Virtual destructor due to inheritance. More...
void	resetClock () const
	Reset the object's clock using the current global tick value. More...
virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
Protected Attributes inherited from CheckerCPU
RequestorID	requestorId
	id attached to all issued requests More...
std::vector< Process * >	workload
System *	systemPtr
RequestPort *	icachePort
RequestPort *	dcachePort
ThreadContext *	tc
BaseMMU *	mmu
std::queue< InstResult >	result
StaticInstPtr	curStaticInst
StaticInstPtr	curMacroStaticInst
Counter	numInst
Counter	startNumInst
std::queue< int >	miscRegIdxs
Protected Attributes inherited from BaseCPU
Tick	instCnt
	Instruction count used for SPARC misc register. More...
int	_cpuId
const uint32_t	_socketId
	Each cpu will have a socket ID that corresponds to its physical location in the system. More...
RequestorID	_instRequestorId
	instruction side request id that must be placed in all requests More...
RequestorID	_dataRequestorId
	data side request id that must be placed in all requests More...
uint32_t	_taskId
	An intrenal representation of a task identifier within gem5. More...
uint32_t	_pid
	The current OS process ID that is executing on this processor. More...
bool	_switchedOut
	Is the CPU switched out or active? More...
const unsigned int	_cacheLineSize
	Cache the cache line size that we get from the system. More...
std::vector< BaseInterrupts * >	interrupts
std::vector< ThreadContext * >	threadContexts
Trace::InstTracer *	tracer
Cycles	previousCycle
CPUState	previousState
const Cycles	pwrGatingLatency
const bool	powerGatingOnIdle
EventFunctionWrapper	enterPwrGatingEvent
ProbePoints::PMUUPtr	ppRetiredInsts
	Instruction commit probe point. More...
ProbePoints::PMUUPtr	ppRetiredInstsPC
ProbePoints::PMUUPtr	ppRetiredLoads
	Retired load instructions. More...
ProbePoints::PMUUPtr	ppRetiredStores
	Retired store instructions. More...
ProbePoints::PMUUPtr	ppRetiredBranches
	Retired branches (any type) More...
ProbePoints::PMUUPtr	ppAllCycles
	CPU cycle counter even if any thread Context is suspended. More...
ProbePoints::PMUUPtr	ppActiveCycles
	CPU cycle counter, only counts if any thread contexts is active. More...
ProbePointArg< bool > *	ppSleeping
	ProbePoint that signals transitions of threadContexts sets. More...
Protected Attributes inherited from SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters. More...
Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...
Static Protected Attributes inherited from BaseCPU
static std::unique_ptr< GlobalStats >	globalStats
	Pointer to the global stat structure. More...

Detailed Description

template<class Impl>
class Checker< Impl >

Templated Checker class.

This Checker class is templated on the DynInstPtr of the instruction type that will be verified. Proper template instantiations of the Checker must be placed at the bottom of checker/cpu.cc.

Definition at line 638 of file cpu.hh.

Member Typedef Documentation

DynInstPtr

template<class Impl >

typedef Impl::DynInstPtr Checker< Impl >::DynInstPtr

private

Definition at line 641 of file cpu.hh.

InstListIt

template<class Impl >

typedef std::list<DynInstPtr>::iterator Checker< Impl >::InstListIt

private

Definition at line 680 of file cpu.hh.

Constructor & Destructor Documentation

Checker()

template<class Impl >

Checker< Impl >::Checker ( const Params &  p )

inline

Definition at line 644 of file cpu.hh.

Member Function Documentation

advancePC()

template<class Impl >

void Checker< Impl >::advancePC

(

const Fault &

fault

)

Definition at line 64 of file cpu_impl.hh.

copyResult()

template<class Impl >

void Checker< Impl >::copyResult	(	const DynInstPtr &	inst,
		const InstResult &	mismatch_val,
		int	start_idx
	)

Definition at line 585 of file cpu_impl.hh.

dumpAndExit()

template<class Impl >

void Checker< Impl >::dumpAndExit ( const DynInstPtr &  inst )

private

Definition at line 662 of file cpu_impl.hh.

dumpInsts()

template<class Impl >

void Checker< Impl >::dumpInsts

private

Definition at line 678 of file cpu_impl.hh.

handleError()

template<class Impl >

void Checker< Impl >::handleError ( const DynInstPtr &  inst )

inlineprivate

Definition at line 664 of file cpu.hh.

handlePendingInt()

template<class Impl >

void Checker< Impl >::handlePendingInt

Definition at line 85 of file cpu_impl.hh.

switchOut()

template<class Impl >

void Checker< Impl >::switchOut

virtual

Prepare for another CPU to take over execution.

When this method exits, all internal state should have been flushed. After the method returns, the simulator calls takeOverFrom() on the new CPU with this CPU as its parameter.

Reimplemented from BaseCPU.

Definition at line 433 of file cpu_impl.hh.

takeOverFrom()

template<class Impl >

void Checker< Impl >::takeOverFrom ( BaseCPU *  cpu )

virtual

Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in.

A CPU model implementing this method is expected to initialize its state from the old CPU and connect its memory (unless they are already connected) to the memories connected to the old CPU.

Parameters

cpu	CPU to initialize read state from.

Reimplemented from BaseCPU.

Definition at line 440 of file cpu_impl.hh.

validateExecution()

template<class Impl >

void Checker< Impl >::validateExecution

(

const DynInstPtr &

inst

)

Definition at line 467 of file cpu_impl.hh.

validateInst()

template<class Impl >

void Checker< Impl >::validateInst

(

const DynInstPtr &

inst

)

Definition at line 446 of file cpu_impl.hh.

validateState()

template<class Impl >

void Checker< Impl >::validateState

Definition at line 560 of file cpu_impl.hh.

verify()

template<class Impl >

void Checker< Impl >::verify

(

const DynInstPtr &

inst

)

Definition at line 119 of file cpu_impl.hh.

Member Data Documentation

instList

template<class Impl >

std::list<DynInstPtr> Checker< Impl >::instList

private

Definition at line 679 of file cpu.hh.

unverifiedInst

template<class Impl >

DynInstPtr Checker< Impl >::unverifiedInst

private

Definition at line 677 of file cpu.hh.

updateThisCycle

template<class Impl >

bool Checker< Impl >::updateThisCycle

private

Definition at line 675 of file cpu.hh.

Referenced by Checker< O3CPUImpl >::handleError().

---

The documentation for this class was generated from the following files:

• cpu/checker/cpu.hh
• cpu/checker/cpu_impl.hh