dispatcher.hh

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/*
 * Copyright (c) 2011-2015,2018 Advanced Micro Devices, Inc.
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 *
 * For use for simulation and test purposes only
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 * modification, are permitted provided that the following conditions are met:
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 * this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
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#ifndef __GPU_COMPUTE_DISPATCHER_HH__
#define __GPU_COMPUTE_DISPATCHER_HH__
 
#include <queue>
#include <unordered_map>
#include <vector>
 
#include "base/statistics.hh"
#include "base/stats/group.hh"
#include "dev/hsa/hsa_packet.hh"
#include "params/GPUDispatcher.hh"
#include "sim/sim_object.hh"
 
class GPUCommandProcessor;
class HSAQueueEntry;
class Shader;
class Wavefront;
 
class GPUDispatcher : public SimObject
{
  public:
    typedef GPUDispatcherParams Params;
 
    GPUDispatcher(const Params &p);
    ~GPUDispatcher();
 
    void serialize(CheckpointOut &cp) const override;
    void unserialize(CheckpointIn &cp) override;
    void setCommandProcessor(GPUCommandProcessor *gpu_cmd_proc);
    void setShader(Shader *new_shader);
    void exec();
    bool isReachingKernelEnd(Wavefront *wf);
    void updateInvCounter(int kern_id, int val=-1);
    bool updateWbCounter(int kern_id, int val=-1);
    int getOutstandingWbs(int kern_id);
    void notifyWgCompl(Wavefront *wf);
    void scheduleDispatch();
    void dispatch(HSAQueueEntry *task);
    HSAQueueEntry* hsaTask(int disp_id);
 
  private:
    Shader *shader;
    GPUCommandProcessor *gpuCmdProc;
    EventFunctionWrapper tickEvent;
    std::unordered_map<int, HSAQueueEntry*> hsaQueueEntries;
    // list of kernel_ids to launch
    std::queue<int> execIds;
    // list of kernel_ids that have finished
    std::queue<int> doneIds;
    // is there a kernel in execution?
    bool dispatchActive;
 
  protected:
    struct GPUDispatcherStats : public Stats::Group
    {
        GPUDispatcherStats(Stats::Group *parent);
 
        Stats::Scalar numKernelLaunched;
        Stats::Scalar cyclesWaitingForDispatch;
    } stats;
};
 
#endif // __GPU_COMPUTE_DISPATCHER_HH__