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gic_v2m.cc
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1 /*
2  * Copyright (c) 2013 ARM Limited
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4  *
5  * The license below extends only to copyright in the software and shall
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23  * this software without specific prior written permission.
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37 
57 #include "dev/arm/gic_v2m.hh"
58 
59 #include "base/bitunion.hh"
60 #include "base/intmath.hh"
61 #include "debug/Checkpoint.hh"
62 #include "debug/GICV2M.hh"
63 #include "dev/io_device.hh"
64 #include "mem/packet.hh"
65 #include "mem/packet_access.hh"
66 
68  : PioDevice(p), pioDelay(p.pio_delay), frames(p.frames), gic(p.gic)
69 {
70  // Assert SPI ranges start at 32
71  for (int i = 0; i < frames.size(); i++) {
72  if (frames[i]->spi_base < 32)
73  fatal("Gicv2m: Frame %d's SPI base (%d) is not in SPI space\n",
74  i, frames[i]->spi_base);
75  }
76  unsigned int x = frames.size();
77  fatal_if(!isPowerOf2(x), "Gicv2m: The v2m shim must be configured with "
78  "a power-of-two number of frames\n");
80 }
81 
84 {
85  AddrRangeList ranges;
86  for (int i = 0; i < frames.size(); i++) {
87  ranges.push_back(RangeSize(frames[i]->addr, FRAME_SIZE));
88  }
89  return ranges;
90 }
91 
92 Tick
94 {
95  int frame = frameFromAddr(pkt->getAddr());
96 
97  assert(frame >= 0);
98 
99  Addr offset = pkt->getAddr() - frames[frame]->addr;
100 
101  switch (offset) {
102  case MSI_TYPER:
103  pkt->setLE<uint32_t>((frames[frame]->spi_base << 16) |
104  frames[frame]->spi_len);
105  break;
106 
107  case PER_ID4:
108  pkt->setLE<uint32_t>(0x4 | ((4+log2framenum) << 4));
109  // Nr of 4KB blocks used by component. This is messy as frames are 64K
110  // (16, ie 2^4) and we should assert we're given a Po2 number of frames.
111  break;
112  default:
113  DPRINTF(GICV2M, "GICv2m: Read of unk reg %#x\n", offset);
114  pkt->setLE<uint32_t>(0);
115  };
116 
117  pkt->makeAtomicResponse();
118 
119  return pioDelay;
120 }
121 
122 Tick
124 {
125  int frame = frameFromAddr(pkt->getAddr());
126 
127  assert(frame >= 0);
128 
129  Addr offset = pkt->getAddr() - frames[frame]->addr;
130 
131  if (offset == MSI_SETSPI_NSR) {
132  /* Is payload SPI number within range? */
133  uint32_t m = pkt->getLE<uint32_t>();
134  if (m >= frames[frame]->spi_base &&
135  m < (frames[frame]->spi_base + frames[frame]->spi_len)) {
136  DPRINTF(GICV2M, "GICv2m: Frame %d raising MSI %d\n", frame, m);
137  gic->sendInt(m);
138  }
139  } else {
140  DPRINTF(GICV2M, "GICv2m: Write of unk reg %#x\n", offset);
141  }
142 
143  pkt->makeAtomicResponse();
144 
145  return pioDelay;
146 }
147 
148 int
150 {
151  for (int i = 0; i < frames.size(); i++) {
152  if (a >= frames[i]->addr && a < (frames[i]->addr + FRAME_SIZE))
153  return i;
154  }
155  return -1;
156 }
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:183
Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1017
io_device.hh
Gicv2m::pioDelay
const Tick pioDelay
Latency for an MMIO operation.
Definition: gic_v2m.hh:83
Gicv2m::MSI_TYPER
static const int MSI_TYPER
Definition: gic_v2m.hh:78
Packet::getAddr
Addr getAddr() const
Definition: packet.hh:755
Gicv2m::FRAME_SIZE
static const int FRAME_SIZE
Definition: gic_v2m.hh:76
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
Gicv2m::log2framenum
unsigned int log2framenum
Count of number of configured frames, as log2(frames)
Definition: gic_v2m.hh:92
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:59
Gicv2m::read
virtual Tick read(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:93
Gicv2m::gic
BaseGic * gic
Gic to which we fire interrupts.
Definition: gic_v2m.hh:89
packet.hh
PioDevice
This device is the base class which all devices senstive to an address range inherit from.
Definition: io_device.hh:99
Gicv2m::MSI_SETSPI_NSR
static const int MSI_SETSPI_NSR
Definition: gic_v2m.hh:79
ArmISA::a
Bitfield< 8 > a
Definition: miscregs_types.hh:62
Gicv2m::getAddrRanges
virtual AddrRangeList getAddrRanges() const
Return the address ranges used by the Gicv2m This is the set of frame addresses.
Definition: gic_v2m.cc:83
Gicv2m::write
virtual Tick write(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:123
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:237
bitunion.hh
RangeSize
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:651
Gicv2m::Gicv2m
Gicv2m(const Params &p)
Definition: gic_v2m.cc:67
RiscvISA::x
Bitfield< 3 > x
Definition: pagetable.hh:70
Gicv2m::Params
Gicv2mParams Params
Definition: gic_v2m.hh:95
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:148
packet_access.hh
BaseGic::sendInt
virtual void sendInt(uint32_t num)=0
Post an interrupt from a device that is connected to the GIC.
Gicv2m::frames
std::vector< Gicv2mFrame * > frames
A set of configured hardware frames.
Definition: gic_v2m.hh:86
X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:80
floorLog2
std::enable_if_t< std::is_integral< T >::value, int > floorLog2(T x)
Definition: intmath.hh:63
Packet::getLE
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Definition: packet_access.hh:75
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:258
ArmISA::gic
Bitfield< 27, 24 > gic
Definition: miscregs_types.hh:171
Packet::setLE
void setLE(T v)
Set the value in the data pointer to v as little endian.
Definition: packet_access.hh:105
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
intmath.hh
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:219
isPowerOf2
bool isPowerOf2(const T &n)
Definition: intmath.hh:102
gic_v2m.hh
Gicv2m::frameFromAddr
int frameFromAddr(Addr a) const
Determine which frame a PIO access lands in.
Definition: gic_v2m.cc:149
ArmISA::m
Bitfield< 0 > m
Definition: miscregs_types.hh:389
Gicv2m::PER_ID4
static const int PER_ID4
Definition: gic_v2m.hh:80
ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:153

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