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arch
power
interrupts.hh
Go to the documentation of this file.
1
/*
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* Copyright (c) 2011 Google
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
6
* modification, are permitted provided that the following conditions are
7
* met: redistributions of source code must retain the above copyright
8
* notice, this list of conditions and the following disclaimer;
9
* redistributions in binary form must reproduce the above copyright
10
* notice, this list of conditions and the following disclaimer in the
11
* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
13
* contributors may be used to endorse or promote products derived from
14
* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
*/
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#ifndef __ARCH_POWER_INTERRUPT_HH__
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#define __ARCH_POWER_INTERRUPT_HH__
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#include "
arch/generic/interrupts.hh
"
33
#include "
base/logging.hh
"
34
#include "params/PowerInterrupts.hh"
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36
class
BaseCPU
;
37
class
ThreadContext
;
38
39
namespace
PowerISA
{
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41
class
Interrupts
:
public
BaseInterrupts
42
{
43
public
:
44
using
Params
= PowerInterruptsParams;
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46
Interrupts
(
const
Params
&
p
) :
BaseInterrupts
(
p
) {}
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void
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post
(
int
int_num,
int
index
)
50
{
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panic
(
"Interrupts::post not implemented.\n"
);
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}
53
54
void
55
clear
(
int
int_num,
int
index
)
56
{
57
panic
(
"Interrupts::clear not implemented.\n"
);
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}
59
60
void
61
clearAll
()
62
{
63
panic
(
"Interrupts::clearAll not implemented.\n"
);
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}
65
66
bool
67
checkInterrupts
()
const
68
{
69
panic
(
"Interrupts::checkInterrupts not implemented.\n"
);
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}
71
72
Fault
73
getInterrupt
()
74
{
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assert(
checkInterrupts
());
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panic
(
"Interrupts::getInterrupt not implemented.\n"
);
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}
78
79
void
80
updateIntrInfo
()
81
{
82
panic
(
"Interrupts::updateIntrInfo not implemented.\n"
);
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}
84
};
85
86
}
// namespace PowerISA
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#endif // __ARCH_POWER_INTERRUPT_HH__
89
MipsISA::index
Bitfield< 30, 0 > index
Definition:
pra_constants.hh:44
PowerISA::Interrupts::post
void post(int int_num, int index)
Definition:
interrupts.hh:49
PowerISA::Interrupts::getInterrupt
Fault getInterrupt()
Definition:
interrupts.hh:73
PowerISA::Interrupts::Interrupts
Interrupts(const Params &p)
Definition:
interrupts.hh:46
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
PowerISA
Definition:
decoder.cc:31
Fault
std::shared_ptr< FaultBase > Fault
Definition:
types.hh:246
PowerISA::Interrupts
Definition:
interrupts.hh:41
BaseInterrupts::Params
BaseInterruptsParams Params
Definition:
interrupts.hh:44
PowerISA::Interrupts::clear
void clear(int int_num, int index)
Definition:
interrupts.hh:55
BaseCPU
Definition:
base.hh:104
PowerISA::Interrupts::checkInterrupts
bool checkInterrupts() const
Definition:
interrupts.hh:67
interrupts.hh
logging.hh
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:323
PowerISA::Interrupts::updateIntrInfo
void updateIntrInfo()
Definition:
interrupts.hh:80
PowerISA::Interrupts::clearAll
void clearAll()
Definition:
interrupts.hh:61
BaseInterrupts
Definition:
interrupts.hh:38
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition:
logging.hh:171
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