ALUFreeListArray.hh

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#ifndef __MEM_RUBY_STRUCTURES_ALUFREELISTARRAY_HH__
#define __MEM_RUBY_STRUCTURES_ALUFREELISTARRAY_HH__
 
#include <deque>
 
#include "mem/ruby/common/TypeDefines.hh"
#include "sim/cur_tick.hh"
 
namespace gem5
{
 
namespace ruby
{
 
class ALUFreeListArray
{
  private:
    unsigned int numALUs;
    Tick accessLatency;
 
    class AccessRecord
    {
      public:
        AccessRecord(Addr line_addr, Tick start_tick) {
          this->lineAddr = line_addr;
          this->startTick = start_tick;
        }
 
        Addr lineAddr;
        Tick startTick;
    };
 
    // Queue of accesses from past accessLatency cycles
    std::deque<AccessRecord> accessQueue;
 
  public:
    ALUFreeListArray(unsigned int num_ALUs, Tick access_latency);
 
    bool tryAccess(Addr addr);
 
    void reserve(Addr addr);
 
    Tick getLatency() const { return accessLatency; }
};
 
} // namespace ruby
} // namespace gem5
 
#endif