gem5  v21.1.0.2
InvalidateGenerator.cc
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29 
31 
32 #include "base/trace.hh"
35 #include "debug/DirectedTest.hh"
36 
37 namespace gem5
38 {
39 
42 {
43  //
44  // First, issue loads to bring the block into S state
45  //
46  m_status = ruby::InvalidateGeneratorStatus_Load_Waiting;
49  m_address = 0x0;
50  m_addr_increment_size = p.addr_increment_size;
51 }
52 
54 {
55 }
56 
57 bool
59 {
60  RequestPort* port;
61  Request::Flags flags;
62  PacketPtr pkt;
63  Packet::Command cmd;
64 
65  // For simplicity, requests are assumed to be 1 byte-sized
66  RequestPtr req = std::make_shared<Request>(m_address, 1, flags,
67  requestorId);
68 
69  //
70  // Based on the current state, issue a load or a store
71  //
72  if (m_status == ruby::InvalidateGeneratorStatus_Load_Waiting) {
73  DPRINTF(DirectedTest, "initiating read\n");
74  cmd = MemCmd::ReadReq;
76  pkt = new Packet(req, cmd);
77  } else if (m_status == ruby::InvalidateGeneratorStatus_Inv_Waiting) {
78  DPRINTF(DirectedTest, "initiating invalidating write\n");
79  cmd = MemCmd::WriteReq;
81  pkt = new Packet(req, cmd);
82  } else {
83  panic("initiate was unexpectedly called\n");
84  }
85  pkt->allocate();
86 
87  if (port->sendTimingReq(pkt)) {
88  DPRINTF(DirectedTest, "initiating request - successful\n");
89  if (m_status == ruby::InvalidateGeneratorStatus_Load_Waiting) {
90  m_status = ruby::InvalidateGeneratorStatus_Load_Pending;
91  } else {
92  m_status = ruby::InvalidateGeneratorStatus_Inv_Pending;
93  }
94  return true;
95  } else {
96  // If the packet did not issue, must delete
97  // Note: No need to delete the data, the packet destructor
98  // will delete it
99  delete pkt;
100 
101  DPRINTF(DirectedTest, "failed to issue request - sequencer not ready\n");
102  return false;
103  }
104 }
105 
106 void
108 {
109  assert(m_address == address);
110 
111  if (m_status == ruby::InvalidateGeneratorStatus_Load_Pending) {
112  assert(m_active_read_node == proc);
114  //
115  // Once all cpus have the block in S state, issue the invalidate
116  //
118  m_status = ruby::InvalidateGeneratorStatus_Inv_Waiting;
119  m_active_read_node = 0;
120  } else {
121  m_status = ruby::InvalidateGeneratorStatus_Load_Waiting;
122  }
123  } else if (m_status == ruby::InvalidateGeneratorStatus_Inv_Pending) {
124  assert(m_active_inv_node == proc);
126  if (m_active_inv_node == m_num_cpus) {
128  m_active_inv_node = 0;
129  }
130  //
131  // Invalidate completed, send that info to the tester and restart
132  // the cycle
133  //
135  m_status = ruby::InvalidateGeneratorStatus_Load_Waiting;
136  }
137 
138 }
139 
140 } // namespace gem5
gem5::RequestPort::sendTimingReq
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the responder port by calling its corresponding receive function.
Definition: port.hh:495
gem5::RubyDirectedTester::incrementCycleCompletions
void incrementCycleCompletions()
Definition: RubyDirectedTester.hh:83
gem5::InvalidateGenerator::~InvalidateGenerator
~InvalidateGenerator()
Definition: InvalidateGenerator.cc:53
gem5::DirectedGenerator
Definition: DirectedGenerator.hh:40
gem5::MemCmd::Command
Command
List of all commands associated with a packet.
Definition: packet.hh:83
gem5::RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:77
gem5::Flags< FlagsType >
gem5::DirectedGenerator::m_directed_tester
RubyDirectedTester * m_directed_tester
Definition: DirectedGenerator.hh:56
RubyDirectedTester.hh
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::probing::Packet
ProbePointArg< PacketInfo > Packet
Packet probe point.
Definition: mem.hh:109
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
gem5::MemCmd::ReadReq
@ ReadReq
Definition: packet.hh:86
gem5::InvalidateGenerator::performCallback
void performCallback(uint32_t proc, Addr address)
Definition: InvalidateGenerator.cc:107
gem5::InvalidateGenerator::InvalidateGenerator
InvalidateGenerator(const Params &p)
Definition: InvalidateGenerator.cc:40
gem5::DirectedGenerator::m_num_cpus
int m_num_cpus
Definition: DirectedGenerator.hh:54
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::RubyDirectedTester::getCpuPort
RequestPort * getCpuPort(int idx)
Definition: RubyDirectedTester.cc:112
gem5::InvalidateGenerator::m_addr_increment_size
uint32_t m_addr_increment_size
Definition: InvalidateGenerator.hh:62
gem5::DirectedGenerator::Params
DirectedGeneratorParams Params
Definition: DirectedGenerator.hh:43
gem5::Packet::allocate
void allocate()
Allocate memory for the packet.
Definition: packet.hh:1326
gem5::DirectedGenerator::requestorId
RequestorID requestorId
Definition: DirectedGenerator.hh:55
gem5::InvalidateGenerator::m_active_inv_node
uint32_t m_active_inv_node
Definition: InvalidateGenerator.hh:61
DirectedGenerator.hh
gem5::MemCmd::WriteReq
@ WriteReq
Definition: packet.hh:89
gem5::InvalidateGenerator::initiate
bool initiate()
Definition: InvalidateGenerator.cc:58
trace.hh
gem5::InvalidateGenerator::m_status
ruby::InvalidateGeneratorStatus m_status
Definition: InvalidateGenerator.hh:58
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::InvalidateGenerator::m_address
Addr m_address
Definition: InvalidateGenerator.hh:59
gem5::InvalidateGenerator::m_active_read_node
uint32_t m_active_read_node
Definition: InvalidateGenerator.hh:60
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
InvalidateGenerator.hh

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