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gem5 v24.0.0.0
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#include <vector>#include "arch/amdgpu/vega/pagetable_walker.hh"#include "base/intmath.hh"#include "dev/amdgpu/amdgpu_defines.hh"#include "mem/packet.hh"#include "mem/translation_gen.hh"#include "sim/serialize.hh"Go to the source code of this file.
Classes | |
| class | gem5::AMDGPUVM |
| struct | gem5::AMDGPUVM::GEM5_PACKED |
| struct | gem5::AMDGPUVM::AMDGPUSysVMContext |
| class | gem5::AMDGPUVM::AGPTranslationGen |
| Translation range generators. More... | |
| class | gem5::AMDGPUVM::GARTTranslationGen |
| class | gem5::AMDGPUVM::MMHUBTranslationGen |
| class | gem5::AMDGPUVM::UserTranslationGen |
Namespaces | |
| namespace | gem5 |
| Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
Enumerations | |
| enum | gem5::mmio_range_t : int { gem5::NBIO_MMIO_RANGE , gem5::MMHUB_MMIO_RANGE , gem5::GFX_MMIO_RANGE , gem5::GRBM_MMIO_RANGE , gem5::IH_MMIO_RANGE , gem5::NUM_MMIO_RANGES } |
Variables | |
| static constexpr int | AMDGPU_VM_COUNT = 16 |
| static constexpr int | AMDGPU_AGP_PAGE_SIZE = 4096 |
| static constexpr int | AMDGPU_GART_PAGE_SIZE = 4096 |
| static constexpr int | AMDGPU_MMHUB_PAGE_SIZE = 4096 |
| static constexpr int | AMDGPU_USER_PAGE_SIZE = 4096 |
| #define MI100_FB_LOCATION_BASE 0x6ac00 |
Definition at line 81 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
| #define MI100_FB_LOCATION_TOP 0x6ac04 |
Definition at line 82 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
| #define MI100_MEM_SIZE_REG 0x0378c |
Definition at line 80 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
| #define MI200_FB_LOCATION_BASE 0x6b300 |
Definition at line 85 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
| #define MI200_FB_LOCATION_TOP 0x6b304 |
Definition at line 86 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
| #define MI200_MEM_SIZE_REG 0x0378c |
Definition at line 84 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
| #define mmMC_VM_AGP_BASE 0x0984 |
Definition at line 67 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMC_VM_AGP_BOT 0x0983 |
Definition at line 66 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMC_VM_AGP_TOP 0x0982 |
Definition at line 65 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMC_VM_FB_LOCATION_BASE 0x0980 |
Definition at line 63 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMC_VM_FB_LOCATION_TOP 0x0981 |
Definition at line 64 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMC_VM_FB_OFFSET 0x096b |
Definition at line 62 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x0986 |
Definition at line 69 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMC_VM_SYSTEM_APERTURE_LOW_ADDR 0x0985 |
Definition at line 68 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmMMHUB_VM_FB_LOCATION_BASE 0x082c |
Definition at line 74 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::readMMIO().
| #define mmMMHUB_VM_FB_LOCATION_TOP 0x082d |
Definition at line 75 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::readMMIO().
| #define mmMMHUB_VM_INVALIDATE_ENG17_ACK 0x0706 |
Definition at line 73 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::readMMIO().
| #define mmMMHUB_VM_INVALIDATE_ENG17_REQ 0x06f4 |
Definition at line 72 of file amdgpu_vm.hh.
| #define mmMMHUB_VM_INVALIDATE_ENG17_SEM 0x06e2 |
Definition at line 71 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::readMMIO().
| #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32 0x08ec |
Definition at line 56 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 0x08eb |
Definition at line 55 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32 0x092c |
Definition at line 60 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32 0x092b |
Definition at line 59 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32 0x090c |
Definition at line 58 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32 0x090b |
Definition at line 57 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::writeMMIO().
| #define mmVM_INVALIDATE_ENG17_ACK 0x08c6 |
MMIO offsets for graphics register bus manager (GRBM).
These values were taken from linux header files. The header files can be found here:
https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/roc-4.3.x/ drivers/gpu/drm/amd/include/ asic_reg/gc/gc_9_0_offset.h https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/roc-4.3.x/ drivers/gpu/drm/amd/include/ asic_reg/mmhub/mmhub_1_0_offset.h
Definition at line 54 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::readMMIO().
| #define VEGA10_FB_LOCATION_BASE 0x6a0b0 |
Definition at line 77 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
| #define VEGA10_FB_LOCATION_TOP 0x6a0b4 |
Definition at line 78 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
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staticconstexpr |
Definition at line 92 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::AGPTranslationGen::translate().
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staticconstexpr |
Definition at line 93 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::GARTTranslationGen::translate().
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staticconstexpr |
Definition at line 94 of file amdgpu_vm.hh.
Referenced by gem5::SDMAEngine::constFill(), gem5::SDMAEngine::copy(), gem5::SDMAEngine::copyReadData(), and gem5::AMDGPUVM::MMHUBTranslationGen::translate().
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staticconstexpr |
Definition at line 97 of file amdgpu_vm.hh.
Referenced by gem5::AMDGPUVM::UserTranslationGen::translate().
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staticconstexpr |
Definition at line 89 of file amdgpu_vm.hh.