amdgpu_vm.hh File Reference

#include <vector>
#include "arch/amdgpu/vega/pagetable_walker.hh"
#include "base/intmath.hh"
#include "dev/amdgpu/amdgpu_defines.hh"
#include "mem/packet.hh"
#include "mem/translation_gen.hh"
#include "sim/serialize.hh"

Go to the source code of this file.

Classes
class	gem5::AMDGPUVM
struct	gem5::AMDGPUVM::GEM5_PACKED
struct	gem5::AMDGPUVM::AMDGPUSysVMContext
class	gem5::AMDGPUVM::AGPTranslationGen
	Translation range generators. More...
class	gem5::AMDGPUVM::GARTTranslationGen
class	gem5::AMDGPUVM::MMHUBTranslationGen
class	gem5::AMDGPUVM::UserTranslationGen

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.

Macros
#define	mmVM_INVALIDATE_ENG17_ACK   0x08c6
	MMIO offsets for graphics register bus manager (GRBM). More...
#define	mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32   0x08eb
#define	mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32   0x08ec
#define	mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32   0x090b
#define	mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32   0x090c
#define	mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32   0x092b
#define	mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32   0x092c
#define	mmMC_VM_FB_OFFSET   0x096b
#define	mmMC_VM_FB_LOCATION_BASE   0x0980
#define	mmMC_VM_FB_LOCATION_TOP   0x0981
#define	mmMC_VM_AGP_TOP   0x0982
#define	mmMC_VM_AGP_BOT   0x0983
#define	mmMC_VM_AGP_BASE   0x0984
#define	mmMC_VM_SYSTEM_APERTURE_LOW_ADDR   0x0985
#define	mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR   0x0986
#define	mmMMHUB_VM_INVALIDATE_ENG17_SEM   0x06e2
#define	mmMMHUB_VM_INVALIDATE_ENG17_REQ   0x06f4
#define	mmMMHUB_VM_INVALIDATE_ENG17_ACK   0x0706
#define	mmMMHUB_VM_FB_LOCATION_BASE   0x082c
#define	mmMMHUB_VM_FB_LOCATION_TOP   0x082d

Variables
static constexpr int	AMDGPU_VM_COUNT = 16
static constexpr int	AMDGPU_AGP_PAGE_SIZE = 4096
static constexpr int	AMDGPU_GART_PAGE_SIZE = 4096
static constexpr int	AMDGPU_MMHUB_PAGE_SIZE = 4096
static constexpr int	AMDGPU_USER_PAGE_SIZE = 4096

Macro Definition Documentation

mmMC_VM_AGP_BASE

#define mmMC_VM_AGP_BASE   0x0984

Definition at line 67 of file amdgpu_vm.hh.

mmMC_VM_AGP_BOT

#define mmMC_VM_AGP_BOT   0x0983

Definition at line 66 of file amdgpu_vm.hh.

mmMC_VM_AGP_TOP

#define mmMC_VM_AGP_TOP   0x0982

Definition at line 65 of file amdgpu_vm.hh.

mmMC_VM_FB_LOCATION_BASE

#define mmMC_VM_FB_LOCATION_BASE   0x0980

Definition at line 63 of file amdgpu_vm.hh.

mmMC_VM_FB_LOCATION_TOP

#define mmMC_VM_FB_LOCATION_TOP   0x0981

Definition at line 64 of file amdgpu_vm.hh.

mmMC_VM_FB_OFFSET

#define mmMC_VM_FB_OFFSET   0x096b

Definition at line 62 of file amdgpu_vm.hh.

mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR

#define mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR   0x0986

Definition at line 69 of file amdgpu_vm.hh.

mmMC_VM_SYSTEM_APERTURE_LOW_ADDR

#define mmMC_VM_SYSTEM_APERTURE_LOW_ADDR   0x0985

Definition at line 68 of file amdgpu_vm.hh.

mmMMHUB_VM_FB_LOCATION_BASE

#define mmMMHUB_VM_FB_LOCATION_BASE   0x082c

Definition at line 74 of file amdgpu_vm.hh.

mmMMHUB_VM_FB_LOCATION_TOP

#define mmMMHUB_VM_FB_LOCATION_TOP   0x082d

Definition at line 75 of file amdgpu_vm.hh.

mmMMHUB_VM_INVALIDATE_ENG17_ACK

#define mmMMHUB_VM_INVALIDATE_ENG17_ACK   0x0706

Definition at line 73 of file amdgpu_vm.hh.

mmMMHUB_VM_INVALIDATE_ENG17_REQ

#define mmMMHUB_VM_INVALIDATE_ENG17_REQ   0x06f4

Definition at line 72 of file amdgpu_vm.hh.

mmMMHUB_VM_INVALIDATE_ENG17_SEM

#define mmMMHUB_VM_INVALIDATE_ENG17_SEM   0x06e2

Definition at line 71 of file amdgpu_vm.hh.

mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32

#define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32   0x08ec

Definition at line 56 of file amdgpu_vm.hh.

mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32

#define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32   0x08eb

Definition at line 55 of file amdgpu_vm.hh.

mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32

#define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32   0x092c

Definition at line 60 of file amdgpu_vm.hh.

mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32

#define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32   0x092b

Definition at line 59 of file amdgpu_vm.hh.

mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32

#define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32   0x090c

Definition at line 58 of file amdgpu_vm.hh.

mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32

#define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32   0x090b

Definition at line 57 of file amdgpu_vm.hh.

mmVM_INVALIDATE_ENG17_ACK

#define mmVM_INVALIDATE_ENG17_ACK   0x08c6

MMIO offsets for graphics register bus manager (GRBM).

These values were taken from linux header files. The header files can be found here:

https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/roc-4.3.x/ drivers/gpu/drm/amd/include/ asic_reg/gc/gc_9_0_offset.h https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/roc-4.3.x/ drivers/gpu/drm/amd/include/ asic_reg/mmhub/mmhub_1_0_offset.h

Definition at line 54 of file amdgpu_vm.hh.

Variable Documentation

AMDGPU_AGP_PAGE_SIZE

constexpr int AMDGPU_AGP_PAGE_SIZE = 4096

staticconstexpr

Definition at line 81 of file amdgpu_vm.hh.

Referenced by gem5::AMDGPUVM::AGPTranslationGen::translate().

AMDGPU_GART_PAGE_SIZE

constexpr int AMDGPU_GART_PAGE_SIZE = 4096

staticconstexpr

Definition at line 82 of file amdgpu_vm.hh.

Referenced by gem5::AMDGPUVM::GARTTranslationGen::translate().

AMDGPU_MMHUB_PAGE_SIZE

constexpr int AMDGPU_MMHUB_PAGE_SIZE = 4096

staticconstexpr

Definition at line 83 of file amdgpu_vm.hh.

Referenced by gem5::SDMAEngine::copy(), gem5::SDMAEngine::copyReadData(), and gem5::AMDGPUVM::MMHUBTranslationGen::translate().

AMDGPU_USER_PAGE_SIZE

constexpr int AMDGPU_USER_PAGE_SIZE = 4096

staticconstexpr

Definition at line 86 of file amdgpu_vm.hh.

Referenced by gem5::AMDGPUVM::UserTranslationGen::translate().

AMDGPU_VM_COUNT

constexpr int AMDGPU_VM_COUNT = 16

staticconstexpr

Definition at line 78 of file amdgpu_vm.hh.