gem5  v21.1.0.2
mem.hh
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29 
30 #ifndef __ARCH_POWER_MEM_HH__
31 #define __ARCH_POWER_MEM_HH__
32 
34 
35 namespace gem5
36 {
37 
38 namespace PowerISA
39 {
40 
44 class MemOp : public PowerStaticInst
45 {
46  protected:
47 
49  unsigned memAccessFlags;
50 
52  MemOp(const char *mnem, MachInst _machInst, OpClass __opClass)
53  : PowerStaticInst(mnem, _machInst, __opClass),
55  {
56  }
57 
58  std::string generateDisassembly(
59  Addr pc, const loader::SymbolTable *symtab) const override;
60 };
61 
62 
66 class MemDispOp : public MemOp
67 {
68  protected:
69 
70  int64_t d;
71 
73  MemDispOp(const char *mnem, MachInst _machInst, OpClass __opClass)
74  : MemOp(mnem, _machInst, __opClass),
75  d(sext<16>(machInst.d))
76  {
77  }
78 
79  std::string generateDisassembly(
80  Addr pc, const loader::SymbolTable *symtab) const override;
81 };
82 
86 class MemDispShiftOp : public MemOp
87 {
88  protected:
89 
90  int64_t ds;
91 
93  MemDispShiftOp(const char *mnem, MachInst _machInst, OpClass __opClass)
94  : MemOp(mnem, _machInst, __opClass),
95  ds(sext<14>(machInst.ds))
96  {
97  }
98 
99  std::string generateDisassembly(
100  Addr pc, const Loader::SymbolTable *symtab) const override;
101 };
102 
103 
107 class MemIndexOp : public MemOp
108 {
109  protected:
110 
112  MemIndexOp(const char *mnem, MachInst _machInst, OpClass __opClass)
113  : MemOp(mnem, _machInst, __opClass)
114  {
115  }
116 
117  std::string generateDisassembly(
118  Addr pc, const Loader::SymbolTable *symtab) const override;
119 };
120 
121 } // namespace PowerISA
122 } // namespace gem5
123 
124 #endif //__ARCH_POWER_INSTS_MEM_HH__
gem5::PowerISA::PowerStaticInst::machInst
ExtMachInst machInst
Definition: static_inst.hh:45
gem5::PowerISA::MemDispShiftOp
Class for memory operations with shifted displacement.
Definition: mem.hh:86
gem5::PowerISA::MemDispOp::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: mem.cc:47
gem5::PowerISA::MemDispShiftOp::MemDispShiftOp
MemDispShiftOp(const char *mnem, MachInst _machInst, OpClass __opClass)
Constructor.
Definition: mem.hh:93
gem5::PowerISA::MemDispShiftOp::ds
int64_t ds
Definition: mem.hh:90
gem5::sext
constexpr uint64_t sext(uint64_t val)
Sign-extend an N-bit value to 64 bits.
Definition: bitfield.hh:126
gem5::PowerISA::MemDispOp
Class for memory operations with displacement.
Definition: mem.hh:66
gem5::loader::SymbolTable
Definition: symtab.hh:65
gem5::PowerISA::MemOp
Base class for memory operations.
Definition: mem.hh:44
gem5::PowerISA::MemDispOp::MemDispOp
MemDispOp(const char *mnem, MachInst _machInst, OpClass __opClass)
Constructor.
Definition: mem.hh:73
gem5::PowerISA::MemOp::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: mem.cc:40
gem5::PowerISA::MemDispShiftOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Definition: mem.cc:107
gem5::PowerISA::MemIndexOp
Class for memory operations with register indexed addressing.
Definition: mem.hh:107
gem5::PowerISA::MemIndexOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Definition: mem.cc:166
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::PowerISA::MemOp::MemOp
MemOp(const char *mnem, MachInst _machInst, OpClass __opClass)
Constructor.
Definition: mem.hh:52
gem5::PowerISA::MachInst
uint32_t MachInst
Definition: types.hh:44
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5::PowerISA::MemIndexOp::MemIndexOp
MemIndexOp(const char *mnem, MachInst _machInst, OpClass __opClass)
Constructor.
Definition: mem.hh:112
gem5::PowerISA::MemDispOp::d
int64_t d
Definition: mem.hh:70
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
static_inst.hh
gem5::PowerISA::PowerStaticInst
Definition: static_inst.hh:42
gem5::PowerISA::MemOp::memAccessFlags
unsigned memAccessFlags
Memory request flags. See mem_req_base.hh.
Definition: mem.hh:49

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