29#ifndef __ARCH_POWER_INSTS_STATICINST_HH__
30#define __ARCH_POWER_INSTS_STATICINST_HH__
59 uint32_t
bits = value << ((7 -
bf) * 4);
60 uint32_t
mask = ~(0xf << ((7 -
bf) * 4));
86 std::unique_ptr<PCStateBase>
92 return std::unique_ptr<PCStateBase>{ret_pc};
96 asBytes(
void *buf,
size_t max_size)
override
virtual PCStateBase * clone() const =0
void printReg(std::ostream &os, RegId reg) const
Print a register name for disassembly given the unique dependence tag number (FP or int).
void advancePC(ThreadContext *tc) const override
std::unique_ptr< PCStateBase > buildRetPC(const PCStateBase &cur_pc, const PCStateBase &call_pc) const override
uint32_t insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
PowerStaticInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
void advancePC(PCStateBase &pc_state) const override
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
size_t asBytes(void *buf, size_t max_size) override
Instruction classes can override this function to return a a representation of themselves as a blob o...
Register ID: describe an architectural register with its class and index.
Base, ISA-independent static instruction class.
size_t simpleAsBytes(void *buf, size_t max_size, const T &t)
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual const PCStateBase & pcState() const =0
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.