gem5
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arch
arm
freebsd
fs_workload.hh
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/*
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* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by the University of Cambridge Computer
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* Laboratory as part of the CTSRD Project, with support from the UK Higher
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* Education Innovation Fund (HEIF).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
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#define __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
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#include <map>
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#include "
arch/arm/fs_workload.hh
"
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#include "
kern/freebsd/events.hh
"
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#include "params/ArmFsFreebsd.hh"
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namespace
gem5
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{
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namespace
ArmISA
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{
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class
FsFreebsd
:
public
ArmISA::FsWorkload
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{
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public
:
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PARAMS
(ArmFsFreebsd);
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bool
enableContextSwitchStatsDump
;
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std::map<uint32_t, uint32_t>
taskMap
;
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std::ostream*
taskFile
;
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FsFreebsd
(
const
Params
&
p
);
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~FsFreebsd
();
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void
initState
()
override
;
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void
mapPid
(
ThreadContext
* tc, uint32_t pid);
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private
:
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PCEvent
*
kernelPanic
=
nullptr
;
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PCEvent
*
kernelOops
=
nullptr
;
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PCEvent
*
skipUDelay
=
nullptr
;
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Addr
secDataPtrAddr
;
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Addr
secDataAddr
;
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Addr
penReleaseAddr
;
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Addr
pen64ReleaseAddr
;
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Addr
bootReleaseAddr
;
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};
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}
// namespace ArmISA
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}
// namespace gem5
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#endif
// __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
fs_workload.hh
gem5::ArmISA::FsFreebsd
Definition
fs_workload.hh:49
gem5::ArmISA::FsFreebsd::penReleaseAddr
Addr penReleaseAddr
Definition
fs_workload.hh:98
gem5::ArmISA::FsFreebsd::secDataAddr
Addr secDataAddr
Definition
fs_workload.hh:97
gem5::ArmISA::FsFreebsd::taskMap
std::map< uint32_t, uint32_t > taskMap
This map stores a mapping of OS process IDs to internal Task IDs.
Definition
fs_workload.hh:62
gem5::ArmISA::FsFreebsd::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition
fs_workload.cc:77
gem5::ArmISA::FsFreebsd::taskFile
std::ostream * taskFile
This is a file that is placed in the run directory that prints out mappings between taskIds and OS pr...
Definition
fs_workload.hh:66
gem5::ArmISA::FsFreebsd::PARAMS
PARAMS(ArmFsFreebsd)
Boilerplate params code.
gem5::ArmISA::FsFreebsd::FsFreebsd
FsFreebsd(const Params &p)
Definition
fs_workload.cc:56
gem5::ArmISA::FsFreebsd::kernelOops
PCEvent * kernelOops
Event to halt the simulator if the kernel calls oopses
Definition
fs_workload.hh:82
gem5::ArmISA::FsFreebsd::secDataPtrAddr
Addr secDataPtrAddr
These variables store addresses of important data structures that are normaly kept coherent at boot w...
Definition
fs_workload.hh:96
gem5::ArmISA::FsFreebsd::skipUDelay
PCEvent * skipUDelay
PC based event to skip udelay(<time>) calls and quiesce the processor for the appropriate amount of t...
Definition
fs_workload.hh:89
gem5::ArmISA::FsFreebsd::pen64ReleaseAddr
Addr pen64ReleaseAddr
Definition
fs_workload.hh:99
gem5::ArmISA::FsFreebsd::kernelPanic
PCEvent * kernelPanic
Event to halt the simulator if the kernel calls panic()
Definition
fs_workload.hh:79
gem5::ArmISA::FsFreebsd::enableContextSwitchStatsDump
bool enableContextSwitchStatsDump
When enabled, dump stats/task info on context switches for Streamline and per-thread cache occupancy ...
Definition
fs_workload.hh:56
gem5::ArmISA::FsFreebsd::mapPid
void mapPid(ThreadContext *tc, uint32_t pid)
This function creates a new task Id for the given pid.
gem5::ArmISA::FsFreebsd::~FsFreebsd
~FsFreebsd()
Definition
fs_workload.cc:124
gem5::ArmISA::FsFreebsd::bootReleaseAddr
Addr bootReleaseAddr
Definition
fs_workload.hh:100
gem5::ArmISA::FsWorkload
Definition
fs_workload.hh:69
gem5::PCEvent
Definition
pc_event.hh:46
gem5::SimObject::Params
SimObjectParams Params
Definition
sim_object.hh:170
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
events.hh
gem5::MipsISA::p
Bitfield< 0 > p
Definition
pra_constants.hh:326
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition
types.hh:147
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