47 #include "debug/Decoder.hh"
60 dvmEnabled(params.dvm_enabled),
62 decoderFlavor(
safe_cast<
ISA *>(params.isa)->decoderFlavor())
68 getCurSveVecLenInBitsAtReset() >> 7) - 1;
72 "DVM Ops instructions are micro-architecturally "
73 "modelled as loads. This will tamper the effective "
74 "number of loads stat\n");
113 uint16_t highBits =
word & 0xF800;
114 if (highBits == 0xE800 || highBits == 0xF000 ||
115 highBits == 0xF800) {
127 "First half of 32 bit Thumb.\n");
128 emi.instBits = (uint32_t)
word << 16;
147 "IT detected, cond = %#x, mask = %#x\n",
169 offset = (fetchPC >=
pc.instAddr()) ? 0 :
pc.instAddr() - fetchPC;
170 emi.thumb =
pc.thumb();
171 emi.aarch64 =
pc.aarch64();
176 const Addr alignment(
pc.thumb() ? 0x1 : 0x3);
177 emi.decoderFault =
static_cast<uint8_t
>(
192 const int inst_size((!
emi.thumb ||
emi.bigThumb) ? 4 : 2);
195 pc.npc(
pc.pc() + inst_size);
198 this_emi.itstate =
pc.itstate();
199 this_emi.illegalExecution =
pc.illegalExec() ? 1 : 0;
200 this_emi.debugStep =
pc.debugStep() ? 1 : 0;
207 return decode(this_emi,
pc.instAddr());
static GenericISA::BasicDecodeCache< Decoder, ExtMachInst > defaultCache
A cache of decoded instruction objects.
void consumeBytes(int numBytes)
Consume bytes by moving the offset into the data word and sanity check the results.
void reset() override
Reset the decoders internal state.
Decoder(const ArmDecoderParams ¶ms)
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a pre-decoded machine instruction.
int sveLen
SVE vector length, encoded in the same format as the ZCR_EL<x>.LEN bitfields.
void process()
Pre-decode an instruction from the current state of the decoder.
void moreBytes(const PCStateBase &pc, Addr fetchPC) override
Feed data to the decoder.
const bool dvmEnabled
True if the decoder should emit DVM Ops (treated as Loads)
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
const Params & params() const
@ UNALIGNED
Unaligned instruction fault.
Bitfield< 41, 40 > fpscrStride
Bitfield< 39, 37 > fpscrLen
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.