gem5  v21.1.0.2
fs_workload.hh
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40 
41 #ifndef __ARCH_ARM_FS_WORKLOAD_HH__
42 #define __ARCH_ARM_FS_WORKLOAD_HH__
43 
44 #include <memory>
45 #include <vector>
46 
47 #include "arch/arm/aapcs32.hh"
48 #include "arch/arm/aapcs64.hh"
49 #include "arch/arm/remote_gdb.hh"
50 #include "kern/linux/events.hh"
51 #include "params/ArmFsWorkload.hh"
52 #include "sim/kernel_workload.hh"
53 #include "sim/sim_object.hh"
54 
55 namespace gem5
56 {
57 
58 namespace ArmISA
59 {
60 
61 class SkipFunc : public SkipFuncBase
62 {
63  public:
65  void returnFromFuncIn(ThreadContext *tc) override;
66 };
67 
68 class FsWorkload : public KernelWorkload
69 {
70  protected:
73 
78 
85 
94 
95  template <template <class ABI, class Base> class FuncEvent,
96  typename... Args>
97  PCEvent *
98  addSkipFunc(Args... args)
99  {
100  if (getArch() == loader::Arm64) {
101  return addKernelFuncEvent<FuncEvent<Aapcs64, SkipFunc>>(
102  std::forward<Args>(args)...);
103  } else {
104  return addKernelFuncEvent<FuncEvent<Aapcs32, SkipFunc>>(
105  std::forward<Args>(args)...);
106  }
107  }
108 
109  template <template <class ABI, class Base> class FuncEvent,
110  typename... Args>
111  PCEvent *
112  addSkipFuncOrPanic(Args... args)
113  {
114  if (getArch() == loader::Arm64) {
115  return addKernelFuncEventOrPanic<FuncEvent<Aapcs64, SkipFunc>>(
116  std::forward<Args>(args)...);
117  } else {
118  return addKernelFuncEventOrPanic<FuncEvent<Aapcs32, SkipFunc>>(
119  std::forward<Args>(args)...);
120  }
121  }
122 
123  public:
124  PARAMS(ArmFsWorkload);
125 
126  Addr
127  getEntry() const override
128  {
129  if (bootldr)
130  return bootldr->entryPoint();
131  else
132  return kernelEntry;
133  }
134 
136  getArch() const override
137  {
138  if (bootldr)
139  return bootldr->getArch();
140  else if (kernelObj)
141  return kernelObj->getArch();
142  else
143  return loader::Arm64;
144  }
145 
146  FsWorkload(const Params &p);
147 
148  void initState() override;
149 
150  void
151  setSystem(System *sys) override
152  {
154  gdb = BaseRemoteGDB::build<RemoteGDB>(system);
155  }
156 
157  Addr
158  fixFuncEventAddr(Addr addr) const override
159  {
160  // Remove the low bit that thumb symbols have set
161  // but that aren't actually odd aligned
162  return addr & ~1;
163  }
164 };
165 
166 } // namespace ArmISA
167 } // namespace gem5
168 
169 #endif // __ARCH_ARM_FS_WORKLOAD_HH__
gem5::ArmISA::FsWorkload::bootldr
loader::ObjectFile * bootldr
Pointer to the bootloader object.
Definition: fs_workload.hh:77
events.hh
gem5::ArmISA::FsWorkload::kernelEntry
Addr kernelEntry
This differs from entry since it takes into account where the kernel is loaded in memory (with loadAd...
Definition: fs_workload.hh:84
gem5::loader::ObjectFile
Definition: object_file.hh:85
gem5::ArmISA::FsWorkload::bootLoaders
std::vector< std::unique_ptr< loader::ObjectFile > > bootLoaders
Bootloaders.
Definition: fs_workload.hh:72
gem5::ArmISA::FsWorkload
Definition: fs_workload.hh:68
remote_gdb.hh
gem5::loader::ObjectFile::entryPoint
Addr entryPoint() const
Definition: object_file.hh:125
aapcs32.hh
gem5::Workload::gdb
BaseRemoteGDB * gdb
Definition: workload.hh:74
gem5::ArmISA::FsWorkload::PARAMS
PARAMS(ArmFsWorkload)
std::vector
STL vector class.
Definition: stl.hh:37
aapcs64.hh
gem5::KernelWorkload::kernelObj
loader::ObjectFile * kernelObj
Definition: kernel_workload.hh:69
gem5::ArmISA::SkipFunc
Definition: fs_workload.hh:61
gem5::loader::Arm64
@ Arm64
Definition: object_file.hh:58
gem5::ArmISA::FsWorkload::FsWorkload
FsWorkload(const Params &p)
Definition: fs_workload.cc:75
gem5::KernelWorkload
Definition: kernel_workload.hh:45
gem5::SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:170
gem5::ArmISA::FsWorkload::setSystem
void setSystem(System *sys) override
Definition: fs_workload.hh:151
gem5::System
Definition: system.hh:77
gem5::SkipFuncBase::SkipFuncBase
SkipFuncBase(PCEventScope *s, const std::string &desc, Addr addr)
Definition: system_events.hh:43
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
sim_object.hh
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::PCEvent
Definition: pc_event.hh:45
gem5::ArmISA::FsWorkload::addSkipFunc
PCEvent * addSkipFunc(Args... args)
Definition: fs_workload.hh:98
gem5::loader::Arch
Arch
Definition: object_file.hh:50
gem5::loader::ObjectFile::getArch
Arch getArch() const
Definition: object_file.hh:115
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ArmISA::FsWorkload::getArch
loader::Arch getArch() const override
Definition: fs_workload.hh:136
gem5::SkipFuncBase
Definition: system_events.hh:37
gem5::ArmISA::FsWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: fs_workload.cc:101
gem5::ArmISA::FsWorkload::fixFuncEventAddr
Addr fixFuncEventAddr(Addr addr) const override
Definition: fs_workload.hh:158
gem5::Workload::system
System * system
Definition: workload.hh:78
gem5::Workload::setSystem
virtual void setSystem(System *sys)
Definition: workload.hh:85
kernel_workload.hh
gem5::ArmISA::FsWorkload::getBootLoader
loader::ObjectFile * getBootLoader(loader::ObjectFile *const obj)
Get a boot loader that matches the kernel.
Definition: fs_workload.cc:148
gem5::ArmISA::FsWorkload::getEntry
Addr getEntry() const override
Definition: fs_workload.hh:127
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::ArmISA::SkipFunc::returnFromFuncIn
void returnFromFuncIn(ThreadContext *tc) override
Definition: fs_workload.cc:58
gem5::ArmISA::FsWorkload::addSkipFuncOrPanic
PCEvent * addSkipFuncOrPanic(Args... args)
Definition: fs_workload.hh:112
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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