gem5 v24.0.0.0
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TLB Invalidate All, Non-Secure. More...
#include <tlbi_op.hh>
Public Member Functions | |
TLBIALLN (TranslationRegime _target_regime) | |
void | operator() (ThreadContext *tc) override |
bool | match (TlbEntry *entry, vmid_t curr_vmid) const override |
bool | stage2Flush () const override |
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class. | |
TLBIALLN | makeStage2 () const |
Public Member Functions inherited from gem5::ArmISA::TLBIOp | |
TLBIOp (TranslationRegime _target_regime, bool _secure) | |
virtual | ~TLBIOp () |
void | broadcast (ThreadContext *tc) |
Broadcast the TLB Invalidate operation to all TLBs in the Arm system. | |
virtual bool | stage1Flush () const |
Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class. | |
Additional Inherited Members | |
Public Attributes inherited from gem5::ArmISA::TLBIOp | |
bool | secureLookup |
TranslationRegime | targetRegime |
TLB Invalidate All, Non-Secure.
Definition at line 265 of file tlbi_op.hh.
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inline |
Definition at line 268 of file tlbi_op.hh.
Referenced by makeStage2().
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inline |
Definition at line 283 of file tlbi_op.hh.
References gem5::ArmISA::TLBIOp::targetRegime, and TLBIALLN().
Implements gem5::ArmISA::TLBIOp.
Definition at line 197 of file tlbi_op.cc.
References gem5::ArmISA::TLBIOp::targetRegime, and gem5::ArmISA::te.
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overridevirtual |
Reimplemented from gem5::ArmISA::TLBIOp.
Definition at line 186 of file tlbi_op.cc.
References gem5::ArmISA::MMU::flush(), gem5::ThreadContext::getCheckerCpuPtr(), and gem5::ArmISA::getMMUPtr().
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inlineoverridevirtual |
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class.
Reimplemented from gem5::ArmISA::TLBIOp.
Definition at line 277 of file tlbi_op.hh.
References gem5::ArmISA::EL2, and gem5::ArmISA::TLBIOp::targetRegime.