gem5 v24.1.0.1
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gem5::ArmISA::TLB Class Reference

#include <tlb.hh>

Inheritance diagram for gem5::ArmISA::TLB:
gem5::BaseTLB gem5::SimObject gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Classes

class  Table
 
struct  TlbStats
 

Public Types

using Params = ArmTLBParams
 
using Lookup = TlbEntry::KeyType
 
using LookupLevel = enums::ArmLookupLevel
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 

Public Member Functions

 TLB (const Params &p)
 
 TLB (const Params &p, int _size, TableWalker *_walker)
 
TlbEntrylookup (Lookup lookup_data)
 Lookup an entry in the TLB.
 
TlbEntrymultiLookup (const Lookup &lookup_data)
 Lookup an entry in the TLB and in the next levels by following the nextLevel pointer.
 
virtual ~TLB ()
 
void takeOverFrom (BaseTLB *otlb) override
 Take over from an old tlb context.
 
void setTableWalker (TableWalker *table_walker)
 
TableWalkergetTableWalker ()
 
int getsize () const
 
bool walkCache () const
 
void setVMID (vmid_t _vmid)
 
void insert (const Lookup &lookup_data, TlbEntry &pte)
 Insert a PTE in the current TLB.
 
void multiInsert (const Lookup &lookup_data, TlbEntry &pte)
 Insert a PTE in the current TLB and in the higher levels.
 
void flushAll () override
 Reset the entire TLB.
 
void flush (const TLBIOp &tlbi_op)
 Flush TLB entries.
 
void printTlb () const
 
void demapPage (Addr vaddr, uint64_t asn) override
 
Fault translateAtomic (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode) override
 
void translateTiming (const RequestPtr &req, ThreadContext *tc, BaseMMU::Translation *translation, BaseMMU::Mode mode) override
 
Fault finalizePhysical (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode) const override
 Do post-translation physical address finalization.
 
void regProbePoints () override
 Register probe points for this object.
 
PortgetTableWalkerPort () override
 Get the table walker port.
 
- Public Member Functions inherited from gem5::BaseTLB
virtual Fault translateFunctional (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode)
 
void memInvalidate ()
 Invalidate the contents of memory buffers.
 
TypeTLB type () const
 
BaseTLBnextLevel () const
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void init ()
 init() is called after all C++ SimObjects have been created and all ports are connected.
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint.
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint.
 
virtual void regProbeListeners ()
 Register probe listeners for this object.
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object.
 
virtual PortgetPort (const std::string &if_name, PortID idx=InvalidPortID)
 Get a port with a given name and index.
 
virtual void startup ()
 startup() is the final initialization call before simulation.
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining.
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes.
 
void serialize (CheckpointOut &cp) const override
 Serialize an object.
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object.
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue.
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section.
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object.
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object.
 
virtual void notifyFork ()
 Notify a child process of a fork.
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group.
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters.
 
virtual void resetStats ()
 Callback to reset stats.
 
virtual void preDumpStats ()
 Callback before stats are dumped.
 
void addStat (statistics::Info *info)
 Register a stat with this group.
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object.
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object.
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block.
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group.
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block.
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 

Protected Attributes

gem5::ArmISA::TLB::Table table
 
int size
 TLB Size.
 
bool isStage2
 Indicates this TLB caches IPA->PA translations.
 
std::unordered_map< enums::ArmLookupLevel, bool > partialLevels
 Hash map containing one entry per lookup level The TLB is caching partial translations from the key lookup level if the matching value is true.
 
bool _walkCache
 True if the TLB caches partial translations.
 
TableWalkertableWalker
 
gem5::ArmISA::TLB::TlbStats stats
 
probing::PMUUPtr ppRefills
 PMU probe for TLB refills.
 
int rangeMRU
 
vmid_t vmid
 
std::set< AddrobservedPageSizes
 Set of observed page sizes in the TLB We update the set conservatively, therefore allowing false positives but not false negatives.
 
- Protected Attributes inherited from gem5::BaseTLB
TypeTLB _type
 
BaseTLB_nextLevel
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters.
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue.
 

Private Member Functions

void _flushMva (Addr mva, uint64_t asn, bool secure_lookup, bool ignore_asn, ExceptionLevel target_el, bool in_host, TypeTLB entry_type)
 Remove any entries that match both a va and asn.
 
void checkPromotion (TlbEntry *entry, BaseMMU::Mode mode)
 Check if the tlb entry passed as an argument needs to be "promoted" as a unified entry: this should happen if we are hitting an instruction TLB entry on a data access or a data TLB entry on an instruction access:
 

Additional Inherited Members

- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system.
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it.
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section.
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it.
 
- Protected Member Functions inherited from gem5::BaseTLB
 BaseTLB (const BaseTLBParams &p)
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain.
 
void signalDrainDone () const
 Signal that an object is drained.
 

Detailed Description

Definition at line 103 of file tlb.hh.

Member Typedef Documentation

◆ Lookup

Definition at line 194 of file tlb.hh.

◆ LookupLevel

using gem5::ArmISA::TLB::LookupLevel = enums::ArmLookupLevel

Definition at line 195 of file tlb.hh.

◆ Params

using gem5::ArmISA::TLB::Params = ArmTLBParams

Definition at line 193 of file tlb.hh.

Constructor & Destructor Documentation

◆ TLB() [1/2]

gem5::TLB::TLB ( const Params p)

◆ TLB() [2/2]

gem5::ArmISA::TLB::TLB ( const Params p,
int  _size,
TableWalker _walker 
)

◆ ~TLB()

gem5::TLB::~TLB ( )
virtual

Definition at line 138 of file tlb.cc.

Member Function Documentation

◆ _flushMva()

void gem5::ArmISA::TLB::_flushMva ( Addr  mva,
uint64_t  asn,
bool  secure_lookup,
bool  ignore_asn,
ExceptionLevel  target_el,
bool  in_host,
TypeTLB  entry_type 
)
private

Remove any entries that match both a va and asn.

Parameters
mvavirtual address to flush
asncontextid/asn to flush on match
secure_lookupif the operation affects the secure world
ignore_asnif the flush should ignore the asn
in_hostif hcr.e2h == 1 and hcr.tge == 1 for VHE.
entry_typetype of entry to flush (instruction/data/unified)

◆ checkPromotion()

void gem5::TLB::checkPromotion ( TlbEntry entry,
BaseMMU::Mode  mode 
)
private

Check if the tlb entry passed as an argument needs to be "promoted" as a unified entry: this should happen if we are hitting an instruction TLB entry on a data access or a data TLB entry on an instruction access:

Definition at line 230 of file tlb.cc.

References gem5::BaseMMU::Execute, gem5::ArmISA::mode, and gem5::ArmISA::TlbEntry::type.

Referenced by multiLookup().

◆ demapPage()

void gem5::TLB::demapPage ( Addr  vaddr,
uint64_t  asn 
)
inlineoverridevirtual

Implements gem5::BaseTLB.

Definition at line 245 of file tlb.hh.

References panic.

◆ finalizePhysical()

Fault gem5::TLB::finalizePhysical ( const RequestPtr req,
ThreadContext tc,
BaseMMU::Mode  mode 
) const
inlineoverridevirtual

Do post-translation physical address finalization.

This method is used by some architectures that need post-translation massaging of physical addresses. For example, X86 uses this to remap physical addresses in the APIC range to a range of physical memory not normally available to real x86 implementations.

Parameters
reqRequest to updated in-place.
tcThread context that created the request.
modeRequest type (read/write/execute).
Returns
A fault on failure, NoFault otherwise.

Implements gem5::BaseTLB.

Definition at line 267 of file tlb.hh.

References panic.

◆ flush()

void gem5::TLB::flush ( const TLBIOp tlbi_op)

◆ flushAll()

void gem5::TLB::flushAll ( )
overridevirtual

Reset the entire TLB.

Used for CPU switching to prevent stale translations after multiple switches

Implements gem5::BaseTLB.

Definition at line 284 of file tlb.cc.

References DPRINTF, gem5::ArmISA::TLB::TlbStats::flushedEntries, gem5::ArmISA::TLB::TlbStats::flushTlb, gem5::AssociativeCache< Entry >::invalidate(), gem5::ArmISA::TLB::Table::invalidatePrev(), observedPageSizes, stats, table, and gem5::ArmISA::te.

Referenced by gem5::ArmISA::MMU::flushAll().

◆ getsize()

int gem5::ArmISA::TLB::getsize ( ) const
inline

Definition at line 221 of file tlb.hh.

References size.

◆ getTableWalker()

TableWalker * gem5::ArmISA::TLB::getTableWalker ( )
inline

Definition at line 219 of file tlb.hh.

References tableWalker.

◆ getTableWalkerPort()

Port * gem5::TLB::getTableWalkerPort ( )
overridevirtual

Get the table walker port.

This is used for migrating port connections during a CPU takeOverFrom() call. For architectures that do not have a table walker, NULL is returned, hence the use of a pointer rather than a reference. For ARM this method will always return a valid port pointer.

Returns
A pointer to the walker request port

Reimplemented from gem5::BaseTLB.

Definition at line 392 of file tlb.cc.

References gem5::ArmISA::TableWalker::getTableWalkerPort(), and tableWalker.

◆ insert()

void gem5::TLB::insert ( const Lookup lookup_data,
TlbEntry pte 
)

◆ lookup()

TlbEntry * gem5::TLB::lookup ( Lookup  lookup_data)

◆ multiInsert()

void gem5::TLB::multiInsert ( const Lookup lookup_data,
TlbEntry pte 
)

◆ multiLookup()

TlbEntry * gem5::TLB::multiLookup ( const Lookup lookup_data)

Lookup an entry in the TLB and in the next levels by following the nextLevel pointer.

Parameters
modeto differentiate between read/writes/fetches.
Returns
pointer to TLB entry if it exists

Definition at line 207 of file tlb.cc.

References checkPromotion(), gem5::ArmISA::TLBTypes::KeyType::functional, insert(), lookup(), gem5::ArmISA::TLBTypes::KeyType::mode, gem5::BaseTLB::nextLevel(), partialLevels, gem5::ArmISA::te, and gem5::ArmISA::tlb.

◆ printTlb()

void gem5::TLB::printTlb ( ) const

Definition at line 274 of file tlb.cc.

References DPRINTF, table, and gem5::ArmISA::te.

◆ regProbePoints()

void gem5::TLB::regProbePoints ( )
overridevirtual

Register probe points for this object.

No probe points by default, so do nothing in base.

Reimplemented from gem5::SimObject.

Definition at line 386 of file tlb.cc.

References gem5::SimObject::getProbeManager(), and ppRefills.

◆ setTableWalker()

void gem5::TLB::setTableWalker ( TableWalker table_walker)

Definition at line 143 of file tlb.cc.

References gem5::ArmISA::TableWalker::setTlb(), and tableWalker.

Referenced by gem5::ArmISA::MMU::init().

◆ setVMID()

void gem5::ArmISA::TLB::setVMID ( vmid_t  _vmid)
inline

Definition at line 225 of file tlb.hh.

References vmid.

Referenced by gem5::ArmISA::MMU::updateMiscReg().

◆ takeOverFrom()

void gem5::TLB::takeOverFrom ( BaseTLB otlb)
overridevirtual

Take over from an old tlb context.

Implements gem5::BaseTLB.

Definition at line 323 of file tlb.cc.

◆ translateAtomic()

Fault gem5::TLB::translateAtomic ( const RequestPtr req,
ThreadContext tc,
BaseMMU::Mode  mode 
)
inlineoverridevirtual

Implements gem5::BaseTLB.

Definition at line 252 of file tlb.hh.

References panic.

◆ translateTiming()

void gem5::TLB::translateTiming ( const RequestPtr req,
ThreadContext tc,
BaseMMU::Translation translation,
BaseMMU::Mode  mode 
)
inlineoverridevirtual

Implements gem5::BaseTLB.

Definition at line 259 of file tlb.hh.

References panic.

◆ walkCache()

bool gem5::ArmISA::TLB::walkCache ( ) const
inline

Definition at line 223 of file tlb.hh.

References _walkCache.

Referenced by gem5::ArmISA::MMU::checkWalkCache().

Member Data Documentation

◆ _walkCache

bool gem5::ArmISA::TLB::_walkCache
protected

True if the TLB caches partial translations.

Definition at line 146 of file tlb.hh.

Referenced by TLB(), and walkCache().

◆ isStage2

bool gem5::ArmISA::TLB::isStage2
protected

Indicates this TLB caches IPA->PA translations.

Definition at line 134 of file tlb.hh.

◆ observedPageSizes

std::set<Addr> gem5::ArmISA::TLB::observedPageSizes
protected

Set of observed page sizes in the TLB We update the set conservatively, therefore allowing false positives but not false negatives.

This means there could be a stored page size with no matching TLB entry (e.g. it has been invalidated), but if the page size is not in the set, we are certain there is no associated TLB with that size

Definition at line 190 of file tlb.hh.

Referenced by flush(), flushAll(), insert(), and lookup().

◆ partialLevels

std::unordered_map<enums::ArmLookupLevel, bool> gem5::ArmISA::TLB::partialLevels
protected

Hash map containing one entry per lookup level The TLB is caching partial translations from the key lookup level if the matching value is true.

Definition at line 141 of file tlb.hh.

Referenced by multiInsert(), multiLookup(), and TLB().

◆ ppRefills

probing::PMUUPtr gem5::ArmISA::TLB::ppRefills
protected

PMU probe for TLB refills.

Definition at line 177 of file tlb.hh.

Referenced by insert(), and regProbePoints().

◆ rangeMRU

int gem5::ArmISA::TLB::rangeMRU
protected

Definition at line 179 of file tlb.hh.

◆ size

int gem5::ArmISA::TLB::size
protected

◆ stats

gem5::ArmISA::TLB::TlbStats gem5::ArmISA::TLB::stats
protected

Referenced by flush(), flushAll(), insert(), and lookup().

◆ table

gem5::ArmISA::TLB::Table gem5::ArmISA::TLB::table
protected

◆ tableWalker

TableWalker* gem5::ArmISA::TLB::tableWalker
protected

Definition at line 148 of file tlb.hh.

Referenced by getTableWalker(), getTableWalkerPort(), and setTableWalker().

◆ vmid

vmid_t gem5::ArmISA::TLB::vmid
protected

The documentation for this class was generated from the following files:

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