gem5  v22.1.0.0
tlbi_op.hh
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37 
38 #ifndef __ARCH_ARM_TLBI_HH__
39 #define __ARCH_ARM_TLBI_HH__
40 
41 #include "arch/arm/system.hh"
42 #include "arch/arm/tlb.hh"
43 #include "cpu/thread_context.hh"
44 
52 namespace gem5
53 {
54 
55 namespace ArmISA {
56 
57 class TLBIOp
58 {
59  public:
60  TLBIOp(ExceptionLevel _targetEL, bool _secure)
61  : secureLookup(_secure), targetEL(_targetEL)
62  {}
63 
64  virtual ~TLBIOp() {}
65  virtual void operator()(ThreadContext* tc) {}
66 
72  void
74  {
75  for (auto *oc: tc->getSystemPtr()->threads)
76  (*this)(oc);
77  }
78 
79  virtual bool match(TlbEntry *entry, vmid_t curr_vmid) const = 0;
80 
86  virtual bool
87  stage1Flush() const
88  {
89  return true;
90  }
91 
97  virtual bool
98  stage2Flush() const
99  {
100  return false;
101  }
102 
105 };
106 
108 class TLBIALL : public TLBIOp
109 {
110  public:
111  TLBIALL(ExceptionLevel _targetEL, bool _secure)
112  : TLBIOp(_targetEL, _secure), inHost(false), el2Enabled(false),
113  currentEL(EL0)
114  {}
115 
116  void operator()(ThreadContext* tc) override;
117 
118  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
119 
120  bool
121  stage2Flush() const override
122  {
123  // TLBIALL (AArch32) flushing stage2 entries if we're currently
124  // in hyp mode
125  return currentEL == EL2;
126  }
127 
128  TLBIALL
129  makeStage2() const
130  {
131  return TLBIALL(EL1, secureLookup);
132  }
133 
134  bool inHost;
137 };
138 
140 class ITLBIALL : public TLBIALL
141 {
142  public:
143  ITLBIALL(ExceptionLevel _targetEL, bool _secure)
144  : TLBIALL(_targetEL, _secure)
145  {}
146 
147  void broadcast(ThreadContext *tc) = delete;
148 
149  void operator()(ThreadContext* tc) override;
150 
151  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
152 };
153 
155 class DTLBIALL : public TLBIALL
156 {
157  public:
158  DTLBIALL(ExceptionLevel _targetEL, bool _secure)
159  : TLBIALL(_targetEL, _secure)
160  {}
161 
162  void broadcast(ThreadContext *tc) = delete;
163 
164  void operator()(ThreadContext* tc) override;
165 
166  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
167 };
168 
170 class TLBIALLEL : public TLBIOp
171 {
172  public:
173  TLBIALLEL(ExceptionLevel _targetEL, bool _secure)
174  : TLBIOp(_targetEL, _secure), inHost(false)
175  {}
176 
177  void operator()(ThreadContext* tc) override;
178 
179  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
180 
181  bool
182  stage2Flush() const override
183  {
184  // If we're targeting EL1 then flush stage2 as well
185  return targetEL == EL1;
186  }
187 
188  TLBIALLEL
189  makeStage2() const
190  {
191  return TLBIALLEL(EL1, secureLookup);
192  }
193 
194  bool inHost;
195 };
196 
198 class TLBIVMALL : public TLBIOp
199 {
200  public:
201  TLBIVMALL(ExceptionLevel _targetEL, bool _secure, bool _stage2)
202  : TLBIOp(_targetEL, _secure), inHost(false), el2Enabled(false),
203  stage2(_stage2)
204  {}
205 
206  void operator()(ThreadContext* tc) override;
207 
208  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
209 
210  bool
211  stage2Flush() const override
212  {
213  return stage2;
214  }
215 
216  TLBIVMALL
217  makeStage2() const
218  {
219  return TLBIVMALL(EL1, secureLookup, false);
220  }
221 
222  bool inHost;
224  bool stage2;
225 };
226 
228 class TLBIASID : public TLBIOp
229 {
230  public:
231  TLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
232  : TLBIOp(_targetEL, _secure), asid(_asid), inHost(false),
233  el2Enabled(false)
234  {}
235 
236  void operator()(ThreadContext* tc) override;
237 
238  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
239 
240  uint16_t asid;
241  bool inHost;
243 };
244 
246 class ITLBIASID : public TLBIASID
247 {
248  public:
249  ITLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
250  : TLBIASID(_targetEL, _secure, _asid)
251  {}
252 
253  void broadcast(ThreadContext *tc) = delete;
254 
255  void operator()(ThreadContext* tc) override;
256 
257  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
258 };
259 
261 class DTLBIASID : public TLBIASID
262 {
263  public:
264  DTLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
265  : TLBIASID(_targetEL, _secure, _asid)
266  {}
267 
268  void broadcast(ThreadContext *tc) = delete;
269 
270  void operator()(ThreadContext* tc) override;
271 
272  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
273 };
274 
276 class TLBIALLN : public TLBIOp
277 {
278  public:
280  : TLBIOp(_targetEL, false)
281  {}
282 
283  void operator()(ThreadContext* tc) override;
284 
285  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
286 
287  bool
288  stage2Flush() const override
289  {
290  return targetEL != EL2;
291  }
292 
293  TLBIALLN
294  makeStage2() const
295  {
296  return TLBIALLN(EL1);
297  }
298 };
299 
301 class TLBIMVAA : public TLBIOp
302 {
303  public:
304  TLBIMVAA(ExceptionLevel _targetEL, bool _secure,
305  Addr _addr, bool last_level)
306  : TLBIOp(_targetEL, _secure), addr(_addr), inHost(false),
307  lastLevel(last_level)
308  {}
309 
310  void operator()(ThreadContext* tc) override;
311 
312  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
313 
315  bool inHost;
316  bool lastLevel;
317 };
318 
320 class TLBIMVA : public TLBIOp
321 {
322  public:
323  TLBIMVA(ExceptionLevel _targetEL, bool _secure,
324  Addr _addr, uint16_t _asid, bool last_level)
325  : TLBIOp(_targetEL, _secure), addr(_addr), asid(_asid),
326  inHost(false), lastLevel(last_level)
327  {}
328 
329  void operator()(ThreadContext* tc) override;
330 
331  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
332 
334  uint16_t asid;
335  bool inHost;
336  bool lastLevel;
337 };
338 
340 class ITLBIMVA : public TLBIMVA
341 {
342  public:
343  ITLBIMVA(ExceptionLevel _targetEL, bool _secure,
344  Addr _addr, uint16_t _asid)
345  : TLBIMVA(_targetEL, _secure, _addr, _asid, false)
346  {}
347 
348  void broadcast(ThreadContext *tc) = delete;
349 
350  void operator()(ThreadContext* tc) override;
351 
352  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
353 };
354 
356 class DTLBIMVA : public TLBIMVA
357 {
358  public:
359  DTLBIMVA(ExceptionLevel _targetEL, bool _secure,
360  Addr _addr, uint16_t _asid)
361  : TLBIMVA(_targetEL, _secure, _addr, _asid, false)
362  {}
363 
364  void broadcast(ThreadContext *tc) = delete;
365 
366  void operator()(ThreadContext* tc) override;
367 
368  bool match(TlbEntry *entry, vmid_t curr_vmid) const override;
369 };
370 
372 class TLBIIPA : public TLBIOp
373 {
374  public:
375  TLBIIPA(ExceptionLevel _targetEL, bool _secure, Addr _addr,
376  bool last_level)
377  : TLBIOp(_targetEL, _secure), addr(_addr), lastLevel(last_level)
378  {}
379 
380  void operator()(ThreadContext* tc) override;
381 
382  bool
383  match(TlbEntry *entry, vmid_t curr_vmid) const override
384  {
385  panic("This shouldn't be called\n");
386  }
387 
388  bool
389  stage1Flush() const override
390  {
391  return false;
392  }
393 
395  TLBIMVAA
396  makeStage2() const
397  {
399  }
400 
402  bool lastLevel;
403 };
404 
405 } // namespace ArmISA
406 } // namespace gem5
407 
408 #endif //__ARCH_ARM_TLBI_HH__
Data TLB Invalidate All.
Definition: tlbi_op.hh:156
DTLBIALL(ExceptionLevel _targetEL, bool _secure)
Definition: tlbi_op.hh:158
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:87
void broadcast(ThreadContext *tc)=delete
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:94
Data TLB Invalidate by ASID match.
Definition: tlbi_op.hh:262
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:181
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:188
DTLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
Definition: tlbi_op.hh:264
void broadcast(ThreadContext *tc)=delete
Data TLB Invalidate by VA.
Definition: tlbi_op.hh:357
void broadcast(ThreadContext *tc)=delete
DTLBIMVA(ExceptionLevel _targetEL, bool _secure, Addr _addr, uint16_t _asid)
Definition: tlbi_op.hh:359
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:286
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:292
Instruction TLB Invalidate All.
Definition: tlbi_op.hh:141
ITLBIALL(ExceptionLevel _targetEL, bool _secure)
Definition: tlbi_op.hh:143
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:81
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:74
void broadcast(ThreadContext *tc)=delete
Instruction TLB Invalidate by ASID match.
Definition: tlbi_op.hh:247
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:168
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:175
void broadcast(ThreadContext *tc)=delete
ITLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
Definition: tlbi_op.hh:249
Instruction TLB Invalidate by VA.
Definition: tlbi_op.hh:341
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:274
ITLBIMVA(ExceptionLevel _targetEL, bool _secure, Addr _addr, uint16_t _asid)
Definition: tlbi_op.hh:343
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:280
void broadcast(ThreadContext *tc)=delete
Implementaton of AArch64 TLBI ALLE(1,2,3)(IS) instructions.
Definition: tlbi_op.hh:171
TLBIALLEL(ExceptionLevel _targetEL, bool _secure)
Definition: tlbi_op.hh:173
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:100
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:114
bool stage2Flush() const override
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract ...
Definition: tlbi_op.hh:182
TLBIALLEL makeStage2() const
Definition: tlbi_op.hh:189
TLB Invalidate All, Non-Secure.
Definition: tlbi_op.hh:277
TLBIALLN makeStage2() const
Definition: tlbi_op.hh:294
bool stage2Flush() const override
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract ...
Definition: tlbi_op.hh:288
TLBIALLN(ExceptionLevel _targetEL)
Definition: tlbi_op.hh:279
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:194
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:205
TLB Invalidate All.
Definition: tlbi_op.hh:109
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:66
bool stage2Flush() const override
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract ...
Definition: tlbi_op.hh:121
ExceptionLevel currentEL
Definition: tlbi_op.hh:136
TLBIALL makeStage2() const
Definition: tlbi_op.hh:129
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:49
TLBIALL(ExceptionLevel _targetEL, bool _secure)
Definition: tlbi_op.hh:111
TLB Invalidate by ASID match.
Definition: tlbi_op.hh:229
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:145
TLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
Definition: tlbi_op.hh:231
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:159
TLB Invalidate by Intermediate Physical Address.
Definition: tlbi_op.hh:373
TLBIMVAA makeStage2() const
TLBIIPA is basically a TLBIMVAA for stage2 TLBs.
Definition: tlbi_op.hh:396
TLBIIPA(ExceptionLevel _targetEL, bool _secure, Addr _addr, bool last_level)
Definition: tlbi_op.hh:375
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:298
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.hh:383
bool stage1Flush() const override
Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract c...
Definition: tlbi_op.hh:389
TLB Invalidate by VA, All ASID.
Definition: tlbi_op.hh:302
TLBIMVAA(ExceptionLevel _targetEL, bool _secure, Addr _addr, bool last_level)
Definition: tlbi_op.hh:304
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:226
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:213
TLB Invalidate by VA.
Definition: tlbi_op.hh:321
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:256
TLBIMVA(ExceptionLevel _targetEL, bool _secure, Addr _addr, uint16_t _asid, bool last_level)
Definition: tlbi_op.hh:323
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:243
void broadcast(ThreadContext *tc)
Broadcast the TLB Invalidate operation to all TLBs in the Arm system.
Definition: tlbi_op.hh:73
virtual bool stage1Flush() const
Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract c...
Definition: tlbi_op.hh:87
virtual bool match(TlbEntry *entry, vmid_t curr_vmid) const =0
ExceptionLevel targetEL
Definition: tlbi_op.hh:104
virtual bool stage2Flush() const
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract ...
Definition: tlbi_op.hh:98
TLBIOp(ExceptionLevel _targetEL, bool _secure)
Definition: tlbi_op.hh:60
virtual void operator()(ThreadContext *tc)
Definition: tlbi_op.hh:65
virtual ~TLBIOp()
Definition: tlbi_op.hh:64
Implementaton of AArch64 TLBI VMALLE1(IS)/VMALLS112E1(IS) instructions.
Definition: tlbi_op.hh:199
TLBIVMALL(ExceptionLevel _targetEL, bool _secure, bool _stage2)
Definition: tlbi_op.hh:201
TLBIVMALL makeStage2() const
Definition: tlbi_op.hh:217
bool match(TlbEntry *entry, vmid_t curr_vmid) const override
Definition: tlbi_op.cc:137
void operator()(ThreadContext *tc) override
Definition: tlbi_op.cc:121
bool stage2Flush() const override
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract ...
Definition: tlbi_op.hh:211
Threads threads
Definition: system.hh:313
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual System * getSystemPtr()=0
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
uint16_t vmid_t
Definition: types.hh:57
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147

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