TLB Range Invalidate by VA, All ASIDs. More...

#include <tlbi_op.hh>

Inheritance diagram for gem5::ArmISA::TLBIRMVAA:

Public Member Functions
	TLBIRMVAA (TranslationRegime _target_regime, SecurityState _ss, RegVal val, bool last_level, Attr _attr)

bool	matchEntry (TlbEntry *entry, vmid_t curr_vmid) const override

Public Member Functions inherited from gem5::ArmISA::TLBIRange
bool	valid () const
	Is the range valid? This mainly depends on the specified translation granule.

Public Member Functions inherited from gem5::ArmISA::TLBIMVAA
	TLBIMVAA (TranslationRegime _target_regime, SecurityState _ss, Addr _addr, bool last_level, Attr _attr=Attr::None)

void	operator() (ThreadContext *tc) override

Public Member Functions inherited from gem5::ArmISA::TLBIOp
	TLBIOp (TranslationRegime _target_regime, SecurityState _ss, Attr _attr)

virtual	~TLBIOp ()

void	broadcast (ThreadContext *tc)
	Broadcast the TLB Invalidate operation to all TLBs in the Arm system.

bool	match (TlbEntry *entry, vmid_t curr_vmid) const

virtual bool	stage1Flush () const
	Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class.

virtual bool	stage2Flush () const
	Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class.

Additional Inherited Members
Public Types inherited from gem5::ArmISA::TLBIOp
enum class	Attr { None , ExcludeXS }

Public Attributes inherited from gem5::ArmISA::TLBIMVAA
Addr	addr

bool	lastLevel

Public Attributes inherited from gem5::ArmISA::TLBIOp
SecurityState	ss

TranslationRegime	targetRegime

Attr	attr

Protected Member Functions inherited from gem5::ArmISA::TLBIRange
	BitUnion64 (RangeData) Bitfield< 47

	EndBitUnion (RangeData) static const expr std

	TLBIRange (RegVal val)

Addr	startAddress () const

Addr	rangeSize () const

bool	resTLBIttl (uint8_t tg, uint8_t ttl) const

Protected Member Functions inherited from gem5::ArmISA::TLBIMVAA
TlbEntry::KeyType	lookupGen (vmid_t vmid) const

Protected Attributes inherited from gem5::ArmISA::TLBIRange
	tg

Bitfield< 45, 44 >	scale

Bitfield< 43, 39 >	num

Bitfield< 38, 37 >	ttl

Bitfield< 36, 0 >	baseAddr

RangeData	rangeData

GrainSize	granule

Detailed Description

TLB Range Invalidate by VA, All ASIDs.

Definition at line 472 of file tlbi_op.hh.

Constructor & Destructor Documentation

gem5::ArmISA::TLBIRMVAA::TLBIRMVAA	(	TranslationRegime	_target_regime,
		SecurityState	_ss,
		RegVal	val,
		bool	last_level,
		Attr	_attr
	)

inline

Definition at line 475 of file tlbi_op.hh.

bool gem5::ArmISA::TLBIRMVAA::matchEntry	(	TlbEntry *	entry,
		vmid_t	curr_vmid
	)		const

overridevirtual

Definition at line 352 of file tlbi_op.cc.

The documentation for this class was generated from the following files: