gem5  v21.1.0.2
pagetable.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2010, 2012-2013 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Copyright (c) 2002-2005 The Regents of The University of Michigan
15  * All rights reserved.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions are
19  * met: redistributions of source code must retain the above copyright
20  * notice, this list of conditions and the following disclaimer;
21  * redistributions in binary form must reproduce the above copyright
22  * notice, this list of conditions and the following disclaimer in the
23  * documentation and/or other materials provided with the distribution;
24  * neither the name of the copyright holders nor the names of its
25  * contributors may be used to endorse or promote products derived from
26  * this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 #ifndef __ARCH_ARM_PAGETABLE_H__
42 #define __ARCH_ARM_PAGETABLE_H__
43 
44 #include <cstdint>
45 
46 #include "arch/arm/page_size.hh"
47 #include "arch/arm/types.hh"
48 #include "arch/arm/utility.hh"
49 #include "sim/serialize.hh"
50 
51 namespace gem5
52 {
53 
54 namespace ArmISA
55 {
56 
57 // Max. physical address range in bits supported by the architecture
58 const unsigned MaxPhysAddrRange = 52;
59 
60 // ITB/DTB page table entry
61 struct PTE
62 {
63  void serialize(CheckpointOut &cp) const
64  {
65  panic("Need to implement PTE serialization\n");
66  }
67 
69  {
70  panic("Need to implement PTE serialization\n");
71  }
72 
73 };
74 
75 // Lookup level
77 {
78  L0 = 0, // AArch64 only
79  L1,
80  L2,
81  L3,
83 };
84 
85 // ITB/DTB table entry
86 struct TlbEntry : public Serializable
87 {
88  public:
89  enum class MemoryType : std::uint8_t
90  {
92  Device,
93  Normal
94  };
95 
96  enum class DomainType : std::uint8_t
97  {
98  NoAccess = 0,
99  Client,
100  Reserved,
101  Manager
102  };
103 
104  // Matching variables
106  Addr size; // Size of this entry, == Type of TLB Rec
107  Addr vpn; // Virtual Page Number
108  uint64_t attributes; // Memory attributes formatted for PAR
109 
110  LookupLevel lookupLevel; // Lookup level where the descriptor was fetched
111  // from. Used to set the FSR for faults
112  // occurring while the long desc. format is in
113  // use (AArch32 w/ LPAE and AArch64)
114 
115  uint16_t asid; // Address Space Identifier
116  vmid_t vmid; // Virtual machine Identifier
117  uint8_t N; // Number of bits in pagesize
118  uint8_t innerAttrs;
119  uint8_t outerAttrs;
120  uint8_t ap; // Access permissions bits
121  uint8_t hap; // Hyp access permissions bits
122  DomainType domain; // Access Domain
123 
125 
126  // True if the long descriptor format is used for this entry (LPAE only)
127  bool longDescFormat; // @todo use this in the update attribute bethod
128 
129  bool isHyp;
130  bool global;
131  bool valid;
132 
133  // True if the entry targets the non-secure physical address space
134  bool ns;
135  // True if the entry was brought in from a non-secure page table
136  bool nstid;
137  // Exception level on insert, AARCH64 EL0&1, AARCH32 -> el=1
139 
140  // Type of memory
141  bool nonCacheable; // Can we wrap this in mtype?
142 
143  // Memory Attributes
144  bool shareable;
146 
147  // Access permissions
148  bool xn; // Execute Never
149  bool pxn; // Privileged Execute Never (LPAE only)
150 
151  //Construct an entry that maps to physical address addr for SE mode
152  TlbEntry(Addr _asn, Addr _vaddr, Addr _paddr,
153  bool uncacheable, bool read_only) :
154  pfn(_paddr >> PageShift), size(PageBytes - 1), vpn(_vaddr >> PageShift),
155  attributes(0), lookupLevel(L1), asid(_asn), vmid(0), N(0),
156  innerAttrs(0), outerAttrs(0), ap(read_only ? 0x3 : 0), hap(0x3),
157  domain(DomainType::Client), mtype(MemoryType::StronglyOrdered),
158  longDescFormat(false), isHyp(false), global(false), valid(true),
159  ns(true), nstid(true), el(EL0), nonCacheable(uncacheable),
160  shareable(false), outerShareable(false), xn(0), pxn(0)
161  {
162  // no restrictions by default, hap = 0x3
163 
164  // @todo Check the memory type
165  if (read_only)
166  warn("ARM TlbEntry does not support read-only mappings\n");
167  }
168 
170  pfn(0), size(0), vpn(0), attributes(0), lookupLevel(L1), asid(0),
171  vmid(0), N(0), innerAttrs(0), outerAttrs(0), ap(0), hap(0x3),
172  domain(DomainType::Client), mtype(MemoryType::StronglyOrdered),
173  longDescFormat(false), isHyp(false), global(false), valid(false),
174  ns(true), nstid(true), el(EL0), nonCacheable(false),
175  shareable(false), outerShareable(false), xn(0), pxn(0)
176  {
177  // no restrictions by default, hap = 0x3
178 
179  // @todo Check the memory type
180  }
181 
182  void
183  updateVaddr(Addr new_vaddr)
184  {
185  vpn = new_vaddr >> PageShift;
186  }
187 
188  Addr
189  pageStart() const
190  {
191  return pfn << PageShift;
192  }
193 
194  bool
195  match(Addr va, vmid_t _vmid, bool hyp_lookup, bool secure_lookup,
196  ExceptionLevel target_el, bool in_host) const
197  {
198  return match(va, 0, _vmid, hyp_lookup, secure_lookup, true,
199  target_el, in_host);
200  }
201 
202  bool
203  match(Addr va, uint16_t asn, vmid_t _vmid, bool hyp_lookup,
204  bool secure_lookup, bool ignore_asn, ExceptionLevel target_el,
205  bool in_host) const
206  {
207  bool match = false;
208  Addr v = vpn << N;
209  if (valid && va >= v && va <= v + size && (secure_lookup == !nstid) &&
210  (hyp_lookup == isHyp))
211  {
212  match = checkELMatch(target_el, in_host);
213 
214  if (match && !ignore_asn) {
215  match = global || (asn == asid);
216  }
217  if (match && nstid) {
218  match = isHyp || (_vmid == vmid);
219  }
220  }
221  return match;
222  }
223 
224  bool
225  checkELMatch(ExceptionLevel target_el, bool in_host) const
226  {
227  switch (target_el) {
228  case EL3:
229  return el == EL3;
230  case EL2:
231  {
232  return el == EL2 || (el == EL0 && in_host);
233  }
234  case EL1:
235  case EL0:
236  return (el == EL0) || (el == EL1);
237  default:
238  return false;
239  }
240  }
241 
242  Addr
243  pAddr(Addr va) const
244  {
245  return (pfn << N) | (va & size);
246  }
247 
248  void
250  {
251  uint64_t mask;
252  uint64_t newBits;
253 
254  // chec bit 11 to determine if its currently LPAE or VMSA format.
255  if ( attributes & (1 << 11) ) {
256  newBits = ((outerShareable ? 0x2 :
257  shareable ? 0x3 : 0) << 7);
258  mask = 0x180;
259  } else {
275  newBits = ((outerShareable ? 0:1) << 10) |
276  ((shareable ? 1:0) << 7) |
277  (innerAttrs << 4) |
278  (outerAttrs << 2);
279  // TODO: Supersection bit
280  mask = 0x4FC;
281  }
282  // common bits
283  newBits |= ns << 9; // NS bit
284  mask |= 1 << 9;
285  // add in the new bits
286  attributes &= ~mask;
287  attributes |= newBits;
288  }
289 
290  void
292  {
293  attributes = lpae ? (1 << 11) : 0;
295  }
296 
297  std::string
298  print() const
299  {
300  return csprintf("%#x, asn %d vmn %d hyp %d ppn %#x size: %#x ap:%d "
301  "ns:%d nstid:%d g:%d el:%d", vpn << N, asid, vmid,
302  isHyp, pfn << N, size, ap, ns, nstid, global, el);
303  }
304 
305  void
306  serialize(CheckpointOut &cp) const override
307  {
332  uint8_t domain_ = static_cast<uint8_t>(domain);
333  paramOut(cp, "domain", domain_);
334  }
335  void
336  unserialize(CheckpointIn &cp) override
337  {
362  uint8_t domain_;
363  paramIn(cp, "domain", domain_);
364  domain = static_cast<DomainType>(domain_);
365  }
366 
367 };
368 
369 } // namespace ArmISA
370 } // namespace gem5
371 
372 #endif // __ARCH_ARM_PAGETABLE_H__
gem5::ArmISA::TlbEntry::print
std::string print() const
Definition: pagetable.hh:298
gem5::ArmISA::PageShift
const Addr PageShift
Definition: page_size.hh:52
warn
#define warn(...)
Definition: logging.hh:245
gem5::ArmISA::TlbEntry::valid
bool valid
Definition: pagetable.hh:131
gem5::ArmISA::TlbEntry::match
bool match(Addr va, uint16_t asn, vmid_t _vmid, bool hyp_lookup, bool secure_lookup, bool ignore_asn, ExceptionLevel target_el, bool in_host) const
Definition: pagetable.hh:203
serialize.hh
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:575
gem5::ArmISA::TlbEntry::ns
bool ns
Definition: pagetable.hh:134
gem5::ArmISA::TlbEntry::DomainType::NoAccess
@ NoAccess
gem5::ArmISA::TlbEntry::outerAttrs
uint8_t outerAttrs
Definition: pagetable.hh:119
gem5::ArmISA::TlbEntry::pfn
Addr pfn
Definition: pagetable.hh:105
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::ArmISA::vmid_t
uint16_t vmid_t
Definition: types.hh:57
gem5::ArmISA::L2
@ L2
Definition: pagetable.hh:80
gem5::ArmISA::LookupLevel
LookupLevel
Definition: pagetable.hh:76
gem5::ArmISA::TlbEntry::isHyp
bool isHyp
Definition: pagetable.hh:129
gem5::ArmISA::TlbEntry::TlbEntry
TlbEntry(Addr _asn, Addr _vaddr, Addr _paddr, bool uncacheable, bool read_only)
Definition: pagetable.hh:152
gem5::ArmISA::PTE::serialize
void serialize(CheckpointOut &cp) const
Definition: pagetable.hh:63
gem5::ArmISA::MaxPhysAddrRange
const unsigned MaxPhysAddrRange
Definition: pagetable.hh:58
gem5::ArmISA::EL1
@ EL1
Definition: types.hh:267
gem5::ArmISA::TlbEntry::setAttributes
void setAttributes(bool lpae)
Definition: pagetable.hh:291
gem5::ArmISA::TlbEntry::DomainType::Client
@ Client
gem5::ArmISA::TlbEntry::TlbEntry
TlbEntry()
Definition: pagetable.hh:169
gem5::csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
gem5::ArmISA::TlbEntry::DomainType::Manager
@ Manager
gem5::ArmISA::TlbEntry::match
bool match(Addr va, vmid_t _vmid, bool hyp_lookup, bool secure_lookup, ExceptionLevel target_el, bool in_host) const
Definition: pagetable.hh:195
gem5::ArmISA::TlbEntry::MemoryType::Normal
@ Normal
gem5::ArmISA::lpae
Bitfield< 9 > lpae
Definition: misc_types.hh:424
gem5::ArmISA::TlbEntry::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pagetable.hh:306
types.hh
gem5::ArmISA::TlbEntry
Definition: pagetable.hh:86
gem5::ArmISA::TlbEntry::DomainType
DomainType
Definition: pagetable.hh:96
gem5::ArmISA::TlbEntry::size
Addr size
Definition: pagetable.hh:106
gem5::ArmISA::TlbEntry::pageStart
Addr pageStart() const
Definition: pagetable.hh:189
SERIALIZE_ENUM
#define SERIALIZE_ENUM(scalar)
Definition: serialize.hh:591
gem5::Serializable
Basic support for object serialization.
Definition: serialize.hh:169
gem5::ArmISA::TlbEntry::MemoryType::Device
@ Device
gem5::ArmISA::TlbEntry::shareable
bool shareable
Definition: pagetable.hh:144
gem5::ArmISA::TlbEntry::mtype
MemoryType mtype
Definition: pagetable.hh:124
gem5::ArmISA::TlbEntry::domain
DomainType domain
Definition: pagetable.hh:122
gem5::ArmISA::EL2
@ EL2
Definition: types.hh:268
gem5::ArmISA::TlbEntry::el
ExceptionLevel el
Definition: pagetable.hh:138
gem5::ArmISA::v
Bitfield< 28 > v
Definition: misc_types.hh:54
gem5::ArmISA::TlbEntry::N
uint8_t N
Definition: pagetable.hh:117
gem5::ArmISA::mask
Bitfield< 3, 0 > mask
Definition: pcstate.hh:63
gem5::ArmISA::EL3
@ EL3
Definition: types.hh:269
gem5::ArmISA::TlbEntry::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pagetable.hh:336
gem5::ArmISA::TlbEntry::longDescFormat
bool longDescFormat
Definition: pagetable.hh:127
gem5::ArmISA::L3
@ L3
Definition: pagetable.hh:81
gem5::ArmISA::MAX_LOOKUP_LEVELS
@ MAX_LOOKUP_LEVELS
Definition: pagetable.hh:82
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ArmISA::TlbEntry::global
bool global
Definition: pagetable.hh:130
gem5::ArmISA::TlbEntry::vpn
Addr vpn
Definition: pagetable.hh:107
gem5::ArmISA::PTE::unserialize
void unserialize(CheckpointIn &cp)
Definition: pagetable.hh:68
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:568
gem5::ArmISA::va
Bitfield< 8 > va
Definition: misc_types.hh:275
utility.hh
gem5::ArmISA::TlbEntry::outerShareable
bool outerShareable
Definition: pagetable.hh:145
gem5::ArmISA::L1
@ L1
Definition: pagetable.hh:79
gem5::ArmISA::TlbEntry::attributes
uint64_t attributes
Definition: pagetable.hh:108
gem5::ArmISA::TlbEntry::vmid
vmid_t vmid
Definition: pagetable.hh:116
gem5::ArmISA::EL0
@ EL0
Definition: types.hh:266
gem5::ArmISA::TlbEntry::MemoryType::StronglyOrdered
@ StronglyOrdered
gem5::ArmISA::TlbEntry::asid
uint16_t asid
Definition: pagetable.hh:115
gem5::paramOut
void paramOut(CheckpointOut &cp, const std::string &name, ExtMachInst const &machInst)
Definition: types.cc:40
gem5::ArmISA::TlbEntry::xn
bool xn
Definition: pagetable.hh:148
gem5::ArmISA::L0
@ L0
Definition: pagetable.hh:78
gem5::paramIn
void paramIn(CheckpointIn &cp, const std::string &name, ExtMachInst &machInst)
Definition: types.cc:72
gem5::ArmISA::TlbEntry::nstid
bool nstid
Definition: pagetable.hh:136
gem5::ArmISA::PageBytes
const Addr PageBytes
Definition: page_size.hh:53
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::ArmISA::TlbEntry::MemoryType
MemoryType
Definition: pagetable.hh:89
UNSERIALIZE_ENUM
#define UNSERIALIZE_ENUM(scalar)
Definition: serialize.hh:598
gem5::ArmISA::TlbEntry::updateVaddr
void updateVaddr(Addr new_vaddr)
Definition: pagetable.hh:183
page_size.hh
gem5::ArmISA::TlbEntry::updateAttributes
void updateAttributes()
Definition: pagetable.hh:249
gem5::ArmISA::TlbEntry::DomainType::Reserved
@ Reserved
gem5::ArmISA::TlbEntry::nonCacheable
bool nonCacheable
Definition: pagetable.hh:141
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::ArmISA::TlbEntry::checkELMatch
bool checkELMatch(ExceptionLevel target_el, bool in_host) const
Definition: pagetable.hh:225
gem5::ArmISA::TlbEntry::pAddr
Addr pAddr(Addr va) const
Definition: pagetable.hh:243
gem5::ArmISA::PTE
Definition: pagetable.hh:61
gem5::ArmISA::TlbEntry::pxn
bool pxn
Definition: pagetable.hh:149
gem5::ArmISA::TlbEntry::innerAttrs
uint8_t innerAttrs
Definition: pagetable.hh:118
gem5::ArmISA::TlbEntry::ap
uint8_t ap
Definition: pagetable.hh:120
gem5::ArmISA::ExceptionLevel
ExceptionLevel
Definition: types.hh:264
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
gem5::ArmISA::TlbEntry::hap
uint8_t hap
Definition: pagetable.hh:121
gem5::ArmISA::TlbEntry::lookupLevel
LookupLevel lookupLevel
Definition: pagetable.hh:110

Generated on Tue Sep 21 2021 12:24:37 for gem5 by doxygen 1.8.17