Implements a MemChecker monitor, to be inserted between two ports. More...

#include <mem_checker_monitor.hh>

Inheritance diagram for gem5::MemCheckerMonitor:

Classes
struct	MemCheckerMonitorSenderState

class	MonitorRequestPort
	This is the request port of the communication monitor. More...

class	MonitorResponsePort
	This is the response port of the communication monitor. More...

Public Types
using	Params = MemCheckerMonitorParams
	Parameters of memchecker monitor.

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Public Member Functions
	MemCheckerMonitor (const Params &params)
	Constructor based on the Python params.

	~MemCheckerMonitor ()
	Destructor.

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index.

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbePoints ()
	Register probe points for this object.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

virtual void	startup ()
	startup() is the final initialization call before simulation.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

virtual void	notifyFork ()
	Notify a child process of a fork.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters.

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Private Member Functions
void	recvFunctional (PacketPtr pkt)

void	recvFunctionalSnoop (PacketPtr pkt)

Tick	recvAtomic (PacketPtr pkt)

Tick	recvAtomicSnoop (PacketPtr pkt)

bool	recvTimingReq (PacketPtr pkt)

bool	recvTimingResp (PacketPtr pkt)

void	recvTimingSnoopReq (PacketPtr pkt)

bool	recvTimingSnoopResp (PacketPtr pkt)

AddrRangeList	getAddrRanges () const

bool	isSnooping () const

void	recvReqRetry ()

void	recvRespRetry ()

void	recvRangeChange ()

Private Attributes
MonitorRequestPort	memSidePort
	Instance of request port, facing the memory side.

MonitorResponsePort	cpuSidePort
	Instance of response port, i.e.

bool	warnOnly

MemChecker *	memchecker

Additional Inherited Members
Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain.

void	signalDrainDone () const
	Signal that an object is drained.

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Detailed Description

Implements a MemChecker monitor, to be inserted between two ports.

Definition at line 53 of file mem_checker_monitor.hh.

Member Typedef Documentation

◆ Params

using gem5::MemCheckerMonitor::Params = MemCheckerMonitorParams

Parameters of memchecker monitor.

Definition at line 58 of file mem_checker_monitor.hh.

Constructor & Destructor Documentation

◆ MemCheckerMonitor()

gem5::MemCheckerMonitor::MemCheckerMonitor ( const Params & params )

Constructor based on the Python params.

Parameters

params Python parameters

Definition at line 50 of file mem_checker_monitor.cc.

◆ ~MemCheckerMonitor()

gem5::MemCheckerMonitor::~MemCheckerMonitor ( )

Destructor.

Definition at line 58 of file mem_checker_monitor.cc.

Member Function Documentation

◆ getAddrRanges()

AddrRangeList gem5::MemCheckerMonitor::getAddrRanges ( ) const

private

Definition at line 335 of file mem_checker_monitor.cc.

References gem5::RequestPort::getAddrRanges(), and memSidePort.

Referenced by gem5::MemCheckerMonitor::MonitorResponsePort::getAddrRanges().

◆ getPort()

Port & gem5::MemCheckerMonitor::getPort	(	const std::string &	if_name,
		PortID	idx = InvalidPortID )

overridevirtual

Get a port with a given name and index.

This is used at binding time and returns a reference to a protocol-agnostic port.

gem5 has a request and response port interface. All memory objects are connected together via ports. These ports provide a rigid interface between these memory objects. These ports implement three different memory system modes: timing, atomic, and functional. The most important mode is the timing mode and here timing mode is used for conducting cycle-level timing experiments. The other modes are only used in special circumstances and should not be used to conduct cycle-level timing experiments. The other modes are only used in special circumstances. These ports allow SimObjects to communicate with each other.

Parameters