gem5  v22.0.0.2
packet.cc
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41 
48 #include "mem/packet.hh"
49 
50 #include <algorithm>
51 #include <cstring>
52 #include <iostream>
53 #include <sstream>
54 #include <string>
55 
56 #include "base/cprintf.hh"
57 #include "base/logging.hh"
58 #include "base/trace.hh"
59 #include "mem/packet_access.hh"
60 #include "sim/bufval.hh"
61 
62 namespace gem5
63 {
64 
65 const MemCmd::CommandInfo
67 {
68  /* InvalidCmd */
69  { {}, InvalidCmd, "InvalidCmd" },
70  /* ReadReq - Read issued by a non-caching agent such as a CPU or
71  * device, with no restrictions on alignment. */
72  { {IsRead, IsRequest, NeedsResponse}, ReadResp, "ReadReq" },
73  /* ReadResp */
74  { {IsRead, IsResponse, HasData}, InvalidCmd, "ReadResp" },
75  /* ReadRespWithInvalidate */
76  { {IsRead, IsResponse, HasData, IsInvalidate},
77  InvalidCmd, "ReadRespWithInvalidate" },
78  /* WriteReq */
79  { {IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData},
80  WriteResp, "WriteReq" },
81  /* WriteResp */
82  { {IsWrite, IsResponse}, InvalidCmd, "WriteResp" },
83  /* WriteCompleteResp - The WriteCompleteResp command is needed
84  * because in the GPU memory model we use a WriteResp to indicate
85  * that a write has reached the cache controller so we can free
86  * resources at the coalescer. Later, when the write succesfully
87  * completes we send a WriteCompleteResp to the CU so its wait
88  * counters can be updated. Wait counters in the CU is how memory
89  * dependences are handled in the GPU ISA. */
90  { {IsWrite, IsResponse}, InvalidCmd, "WriteCompleteResp" },
91  /* WritebackDirty */
92  { {IsWrite, IsRequest, IsEviction, HasData, FromCache},
93  InvalidCmd, "WritebackDirty" },
94  /* WritebackClean - This allows the upstream cache to writeback a
95  * line to the downstream cache without it being considered
96  * dirty. */
97  { {IsWrite, IsRequest, IsEviction, HasData, FromCache},
98  InvalidCmd, "WritebackClean" },
99  /* WriteClean - This allows a cache to write a dirty block to a memory
100  below without evicting its copy. */
101  { {IsWrite, IsRequest, HasData, FromCache}, InvalidCmd, "WriteClean" },
102  /* CleanEvict */
103  { {IsRequest, IsEviction, FromCache}, InvalidCmd, "CleanEvict" },
104  /* SoftPFReq */
105  { {IsRead, IsRequest, IsSWPrefetch, NeedsResponse},
106  SoftPFResp, "SoftPFReq" },
107  /* SoftPFExReq */
108  { {IsRead, NeedsWritable, IsInvalidate, IsRequest,
109  IsSWPrefetch, NeedsResponse}, SoftPFResp, "SoftPFExReq" },
110  /* HardPFReq */
111  { {IsRead, IsRequest, IsHWPrefetch, NeedsResponse, FromCache},
112  HardPFResp, "HardPFReq" },
113  /* SoftPFResp */
114  { {IsRead, IsResponse, IsSWPrefetch, HasData}, InvalidCmd, "SoftPFResp" },
115  /* HardPFResp */
116  { {IsRead, IsResponse, IsHWPrefetch, HasData}, InvalidCmd, "HardPFResp" },
117  /* WriteLineReq */
118  { {IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData},
119  WriteResp, "WriteLineReq" },
120  /* UpgradeReq */
121  { {IsInvalidate, NeedsWritable, IsUpgrade, IsRequest, NeedsResponse,
122  FromCache}, UpgradeResp, "UpgradeReq" },
123  /* SCUpgradeReq: response could be UpgradeResp or UpgradeFailResp */
124  { {IsInvalidate, NeedsWritable, IsUpgrade, IsLlsc,
125  IsRequest, NeedsResponse, FromCache},
126  UpgradeResp, "SCUpgradeReq" },
127  /* UpgradeResp */
128  { {IsUpgrade, IsResponse}, InvalidCmd, "UpgradeResp" },
129  /* SCUpgradeFailReq: generates UpgradeFailResp but still gets the data */
130  { {IsRead, NeedsWritable, IsInvalidate,
131  IsLlsc, IsRequest, NeedsResponse, FromCache},
132  UpgradeFailResp, "SCUpgradeFailReq" },
133  /* UpgradeFailResp - Behaves like a ReadExReq, but notifies an SC
134  * that it has failed, acquires line as Dirty*/
135  { {IsRead, IsResponse, HasData}, InvalidCmd, "UpgradeFailResp" },
136  /* ReadExReq - Read issues by a cache, always cache-line aligned,
137  * and the response is guaranteed to be writeable (exclusive or
138  * even modified} */
139  { {IsRead, NeedsWritable, IsInvalidate, IsRequest, NeedsResponse,
140  FromCache}, ReadExResp, "ReadExReq" },
141  /* ReadExResp - Response matching a read exclusive, as we check
142  * the need for exclusive also on responses */
143  { {IsRead, IsResponse, HasData}, InvalidCmd, "ReadExResp" },
144  /* ReadCleanReq - Read issued by a cache, always cache-line
145  * aligned, and the response is guaranteed to not contain dirty data
146  * (exclusive or shared}.*/
147  { {IsRead, IsRequest, NeedsResponse, FromCache},
148  ReadResp, "ReadCleanReq" },
149  /* ReadSharedReq - Read issued by a cache, always cache-line
150  * aligned, response is shared, possibly exclusive, owned or even
151  * modified. */
152  { {IsRead, IsRequest, NeedsResponse, FromCache},
153  ReadResp, "ReadSharedReq" },
154  /* LoadLockedReq: note that we use plain ReadResp as response, so that
155  * we can also use ReadRespWithInvalidate when needed */
156  { {IsRead, IsLlsc, IsRequest, NeedsResponse},
157  ReadResp, "LoadLockedReq" },
158  /* StoreCondReq */
159  { {IsWrite, NeedsWritable, IsLlsc,
160  IsRequest, NeedsResponse, HasData},
161  StoreCondResp, "StoreCondReq" },
162  /* StoreCondFailReq: generates failing StoreCondResp */
163  { {IsWrite, NeedsWritable, IsLlsc, IsRequest, NeedsResponse, HasData},
164  StoreCondResp, "StoreCondFailReq" },
165  /* StoreCondResp */
166  { {IsWrite, IsLlsc, IsResponse},
167  InvalidCmd, "StoreCondResp" },
168  /* LockedRMWReadReq */
169  { {IsRead, IsLockedRMW, NeedsWritable, IsRequest, NeedsResponse},
170  LockedRMWReadResp, "LockedRMWReadReq" },
171  /* LockedRMWReadResp */
172  { {IsRead, IsLockedRMW, NeedsWritable, IsResponse, HasData},
173  InvalidCmd, "LockedRMWReadResp" },
174  /* LockedRMWWriteReq */
175  { {IsWrite, IsLockedRMW, NeedsWritable, IsRequest, NeedsResponse,
176  HasData}, LockedRMWWriteResp, "LockedRMWWriteReq" },
177  /* LockedRMWWriteResp */
178  { {IsWrite, IsLockedRMW, NeedsWritable, IsResponse},
179  InvalidCmd, "LockedRMWWriteResp" },
180  /* SwapReq -- for Swap ldstub type operations */
181  { {IsRead, IsWrite, NeedsWritable, IsRequest, HasData, NeedsResponse},
182  SwapResp, "SwapReq" },
183  /* SwapResp -- for Swap ldstub type operations */
184  { {IsRead, IsWrite, IsResponse, HasData}, InvalidCmd, "SwapResp" },
185  { {}, InvalidCmd, "Deprecated_MessageReq" },
186  { {}, InvalidCmd, "Deprecated_MessageResp" },
187  /* MemFenceReq -- for synchronization requests */
188  {{IsRequest, NeedsResponse}, MemFenceResp, "MemFenceReq"},
189  /* MemSyncReq */
190  {{IsRequest, NeedsResponse}, MemSyncResp, "MemSyncReq"},
191  /* MemSyncResp */
192  {{IsResponse}, InvalidCmd, "MemSyncResp"},
193  /* MemFenceResp -- for synchronization responses */
194  {{IsResponse}, InvalidCmd, "MemFenceResp"},
195  /* Cache Clean Request -- Update with the latest data all existing
196  copies of the block down to the point indicated by the
197  request */
198  { {IsRequest, IsClean, NeedsResponse, FromCache},
199  CleanSharedResp, "CleanSharedReq" },
200  /* Cache Clean Response - Indicates that all caches up to the
201  specified point of reference have a up-to-date copy of the
202  cache block or no copy at all */
203  { {IsResponse, IsClean}, InvalidCmd, "CleanSharedResp" },
204  /* Cache Clean and Invalidate Request -- Invalidate all existing
205  copies down to the point indicated by the request */
206  { {IsRequest, IsInvalidate, IsClean, NeedsResponse, FromCache},
207  CleanInvalidResp, "CleanInvalidReq" },
208  /* Cache Clean and Invalidate Respose -- Indicates that no cache
209  above the specified point holds the block and that the block
210  was written to a memory below the specified point. */
211  { {IsResponse, IsInvalidate, IsClean},
212  InvalidCmd, "CleanInvalidResp" },
213  /* InvalidDestError -- packet dest field invalid */
214  { {IsResponse, IsError}, InvalidCmd, "InvalidDestError" },
215  /* BadAddressError -- memory address invalid */
216  { {IsResponse, IsError}, InvalidCmd, "BadAddressError" },
217  /* FunctionalReadError */
218  { {IsRead, IsResponse, IsError}, InvalidCmd, "FunctionalReadError" },
219  /* FunctionalWriteError */
220  { {IsWrite, IsResponse, IsError}, InvalidCmd, "FunctionalWriteError" },
221  /* PrintReq */
222  { {IsRequest, IsPrint}, InvalidCmd, "PrintReq" },
223  /* Flush Request */
224  { {IsRequest, IsFlush, NeedsWritable}, InvalidCmd, "FlushReq" },
225  /* Invalidation Request */
226  { {IsInvalidate, IsRequest, NeedsWritable, NeedsResponse, FromCache},
227  InvalidateResp, "InvalidateReq" },
228  /* Invalidation Response */
229  { {IsInvalidate, IsResponse},
230  InvalidCmd, "InvalidateResp" },
231  // hardware transactional memory
232  { {IsRead, IsRequest, NeedsResponse}, HTMReqResp, "HTMReq" },
233  { {IsRead, IsResponse}, InvalidCmd, "HTMReqResp" },
234  { {IsRead, IsRequest}, InvalidCmd, "HTMAbort" },
235  { {IsRequest}, InvalidCmd, "TlbiExtSync" },
236 };
237 
238 AddrRange
240 {
241  return RangeSize(getAddr(), getSize());
242 }
243 
244 bool
245 Packet::trySatisfyFunctional(Printable *obj, Addr addr, bool is_secure, int size,
246  uint8_t *_data)
247 {
248  const Addr func_start = getAddr();
249  const Addr func_end = getAddr() + getSize() - 1;
250  const Addr val_start = addr;
251  const Addr val_end = val_start + size - 1;
252 
253  if (is_secure != _isSecure || func_start > val_end ||
254  val_start > func_end) {
255  // no intersection
256  return false;
257  }
258 
259  // check print first since it doesn't require data
260  if (isPrint()) {
261  assert(!_data);
262  safe_cast<PrintReqState*>(senderState)->printObj(obj);
263  return false;
264  }
265 
266  // we allow the caller to pass NULL to signify the other packet
267  // has no data
268  if (!_data) {
269  return false;
270  }
271 
272  const Addr val_offset = func_start > val_start ?
273  func_start - val_start : 0;
274  const Addr func_offset = func_start < val_start ?
275  val_start - func_start : 0;
276  const Addr overlap_size = std::min(val_end, func_end)+1 -
277  std::max(val_start, func_start);
278 
279  if (isRead()) {
280  std::memcpy(getPtr<uint8_t>() + func_offset,
281  _data + val_offset,
282  overlap_size);
283 
284  // initialise the tracking of valid bytes if we have not
285  // used it already
286  if (bytesValid.empty())
287  bytesValid.resize(getSize(), false);
288 
289  // track if we are done filling the functional access
290  bool all_bytes_valid = true;
291 
292  int i = 0;
293 
294  // check up to func_offset
295  for (; all_bytes_valid && i < func_offset; ++i)
296  all_bytes_valid &= bytesValid[i];
297 
298  // update the valid bytes
299  for (i = func_offset; i < func_offset + overlap_size; ++i)
300  bytesValid[i] = true;
301 
302  // check the bit after the update we just made
303  for (; all_bytes_valid && i < getSize(); ++i)
304  all_bytes_valid &= bytesValid[i];
305 
306  return all_bytes_valid;
307  } else if (isWrite()) {
308  std::memcpy(_data + val_offset,
309  getConstPtr<uint8_t>() + func_offset,
310  overlap_size);
311  } else {
312  panic("Don't know how to handle command %s\n", cmdString());
313  }
314 
315  // keep going with request by default
316  return false;
317 }
318 
319 void
321 {
322  assert(isRequest());
323  // If we have already found a responder, no other cache should
324  // commit to responding
325  assert(!pkt->cacheResponding() || !cacheResponding());
326  flags.set(pkt->flags & RESPONDER_FLAGS);
327 }
328 
329 void
331 {
332  assert(sender_state != NULL);
333  sender_state->predecessor = senderState;
334  senderState = sender_state;
335 }
336 
339 {
340  assert(senderState != NULL);
341  SenderState *sender_state = senderState;
342  senderState = sender_state->predecessor;
343  sender_state->predecessor = NULL;
344  return sender_state;
345 }
346 
347 uint64_t
348 Packet::getUintX(ByteOrder endian) const
349 {
350  auto [val, success] =
351  gem5::getUintX(getConstPtr<void>(), getSize(), endian);
352  panic_if(!success, "%i isn't a supported word size.\n", getSize());
353  return val;
354 }
355 
356 void
357 Packet::setUintX(uint64_t w, ByteOrder endian)
358 {
359  bool success = gem5::setUintX(w, getPtr<void>(), getSize(), endian);
360  panic_if(!success, "%i isn't a supported word size.\n", getSize());
361 }
362 
363 void
364 Packet::print(std::ostream &o, const int verbosity,
365  const std::string &prefix) const
366 {
367  ccprintf(o, "%s%s [%x:%x]%s%s%s%s%s%s", prefix, cmdString(),
368  getAddr(), getAddr() + getSize() - 1,
369  req->isSecure() ? " (s)" : "",
370  req->isInstFetch() ? " IF" : "",
371  req->isUncacheable() ? " UC" : "",
372  isExpressSnoop() ? " ES" : "",
373  req->isToPOC() ? " PoC" : "",
374  req->isToPOU() ? " PoU" : "");
375 }
376 
377 std::string
378 Packet::print() const {
379  std::ostringstream str;
380  print(str);
381  return str.str();
382 }
383 
384 bool
385 Packet::matchBlockAddr(const Addr addr, const bool is_secure,
386  const int blk_size) const
387 {
388  return (getBlockAddr(blk_size) == addr) && (isSecure() == is_secure);
389 }
390 
391 bool
392 Packet::matchBlockAddr(const PacketPtr pkt, const int blk_size) const
393 {
394  return matchBlockAddr(pkt->getBlockAddr(blk_size), pkt->isSecure(),
395  blk_size);
396 }
397 
398 bool
399 Packet::matchAddr(const Addr addr, const bool is_secure) const
400 {
401  return (getAddr() == addr) && (isSecure() == is_secure);
402 }
403 
404 bool
405 Packet::matchAddr(const PacketPtr pkt) const
406 {
407  return matchAddr(pkt->getAddr(), pkt->isSecure());
408 }
409 
410 Packet::PrintReqState::PrintReqState(std::ostream &_os, int _verbosity)
411  : curPrefixPtr(new std::string("")), os(_os), verbosity(_verbosity)
412 {
413  labelStack.push_back(LabelStackEntry("", curPrefixPtr));
414 }
415 
417 {
418  labelStack.pop_back();
419  assert(labelStack.empty());
420  delete curPrefixPtr;
421 }
422 
424 LabelStackEntry::LabelStackEntry(const std::string &_label,
425  std::string *_prefix)
426  : label(_label), prefix(_prefix), labelPrinted(false)
427 {
428 }
429 
430 void
431 Packet::PrintReqState::pushLabel(const std::string &lbl,
432  const std::string &prefix)
433 {
434  labelStack.push_back(LabelStackEntry(lbl, curPrefixPtr));
435  curPrefixPtr = new std::string(*curPrefixPtr);
436  *curPrefixPtr += prefix;
437 }
438 
439 void
441 {
442  delete curPrefixPtr;
443  curPrefixPtr = labelStack.back().prefix;
444  labelStack.pop_back();
445  assert(!labelStack.empty());
446 }
447 
448 void
450 {
451  if (!labelStack.back().labelPrinted) {
452  LabelStack::iterator i = labelStack.begin();
453  LabelStack::iterator end = labelStack.end();
454  while (i != end) {
455  if (!i->labelPrinted) {
456  ccprintf(os, "%s%s\n", *(i->prefix), i->label);
457  i->labelPrinted = true;
458  }
459  i++;
460  }
461  }
462 }
463 
464 
465 void
467 {
468  printLabels();
469  obj->print(os, verbosity, curPrefix());
470 }
471 
472 void
474  const HtmCacheFailure htm_return_code)
475 {
476  assert(needsResponse());
477  assert(isRequest());
478 
479  cmd = cmd.responseCommand();
480 
481  setHtmTransactionFailedInCache(htm_return_code);
482 
483  // responses are never express, even if the snoop that
484  // triggered them was
486 }
487 
488 void
490  const HtmCacheFailure htm_return_code)
491 {
492  if (htm_return_code != HtmCacheFailure::NO_FAIL)
494 
495  htmReturnReason = htm_return_code;
496 }
497 
498 bool
500 {
501  return flags.isSet(FAILS_TRANSACTION);
502 }
503 
506 {
507  assert(htmTransactionFailedInCache());
508  return htmReturnReason;
509 }
510 
511 void
513 {
515  htmTransactionUid = htm_uid;
516 }
517 
518 bool
520 {
521  return flags.isSet(FROM_TRANSACTION);
522 }
523 
524 uint64_t
526 {
527  assert(flags.isSet(FROM_TRANSACTION));
528  return htmTransactionUid;
529 }
530 
531 } // namespace gem5
gem5::Packet::getBlockAddr
Addr getBlockAddr(unsigned int blk_size) const
Definition: packet.hh:814
gem5::Packet::cmdString
const std::string & cmdString() const
Return the string name of the cmd field (for debugging and tracing).
Definition: packet.hh:585
gem5::Packet::PrintReqState::PrintReqState
PrintReqState(std::ostream &os, int verbosity=0)
Definition: packet.cc:410
gem5::Packet::isRequest
bool isRequest() const
Definition: packet.hh:594
gem5::Packet::getUintX
uint64_t getUintX(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness and zero-extended to 64 bits.
Definition: packet.cc:348
gem5::Packet::PrintReqState::labelStack
LabelStack labelStack
Definition: packet.hh:491
gem5::Packet::size
unsigned size
The size of the request or transfer.
Definition: packet.hh:394
gem5::Packet::_isSecure
bool _isSecure
True if the request targets the secure memory space.
Definition: packet.hh:391
gem5::Packet::EXPRESS_SNOOP
@ EXPRESS_SNOOP
Special timing-mode atomic snoop for multi-level coherence.
Definition: packet.hh:312
gem5::MemCmd::commandInfo
static const CommandInfo commandInfo[]
Array to map Command enum to associated info.
Definition: packet.hh:210
gem5::getUintX
std::pair< std::uint64_t, bool > getUintX(const void *buf, std::size_t bytes, ByteOrder endian)
Definition: bufval.cc:41
gem5::RangeSize
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:815
gem5::Packet::pushSenderState
void pushSenderState(SenderState *sender_state)
Push a new sender state to the packet and make the current sender state the predecessor of the new on...
Definition: packet.cc:330
gem5::HtmCacheFailure::NO_FAIL
@ NO_FAIL
gem5::Flags::set
void set(Type mask)
Set all flag's bits matching the given mask.
Definition: flags.hh:116
gem5::Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:374
gem5::MemCmd::responseCommand
Command responseCommand() const
Definition: packet.hh:267
gem5::Flags::clear
void clear()
Clear all flag's bits.
Definition: flags.hh:102
gem5::setUintX
bool setUintX(std::uint64_t val, void *buf, std::size_t bytes, ByteOrder endian)
Definition: bufval.cc:59
gem5::Packet::htmTransactionUid
uint64_t htmTransactionUid
A global unique identifier of the transaction.
Definition: packet.hh:417
gem5::HtmCacheFailure
HtmCacheFailure
Definition: htm.hh:59
gem5::Packet::setHtmTransactional
void setHtmTransactional(uint64_t val)
Stipulates that this packet/request originates in the CPU executing in transactional mode,...
Definition: packet.cc:512
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
gem5::Packet::cacheResponding
bool cacheResponding() const
Definition: packet.hh:655
gem5::Packet::PrintReqState::pushLabel
void pushLabel(const std::string &lbl, const std::string &prefix=" ")
Push a label onto the label stack, and prepend the given prefix string onto the current prefix.
Definition: packet.cc:431
gem5::Packet::isWrite
bool isWrite() const
Definition: packet.hh:591
gem5::Packet::isSecure
bool isSecure() const
Definition: packet.hh:819
gem5::VegaISA::w
Bitfield< 6 > w
Definition: pagetable.hh:59
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:67
gem5::Packet::PrintReqState::printLabels
void printLabels()
Print all of the pending unprinted labels on the stack.
Definition: packet.cc:449
gem5::Packet::SenderState::predecessor
SenderState * predecessor
Definition: packet.hh:467
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
packet.hh
gem5::Printable
Abstract base class for objects which support being printed to a stream for debugging.
Definition: printable.hh:47
gem5::Packet::PrintReqState::curPrefixPtr
std::string * curPrefixPtr
Definition: packet.hh:493
bufval.hh
gem5::Packet::PrintReqState::os
std::ostream & os
Definition: packet.hh:496
gem5::Packet::isRead
bool isRead() const
Definition: packet.hh:590
gem5::Flags::isSet
bool isSet(Type mask) const
Verifies whether any bit matching the given mask is set.
Definition: flags.hh:83
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
gem5::Packet::matchBlockAddr
bool matchBlockAddr(const Addr addr, const bool is_secure, const int blk_size) const
Check if packet corresponds to a given block-aligned address and address space.
Definition: packet.cc:385
gem5::Packet::htmTransactionFailedInCache
bool htmTransactionFailedInCache() const
Returns whether or not this packet/request has returned from the cache hierarchy in a failed transact...
Definition: packet.cc:499
gem5::Printable::print
virtual void print(std::ostream &os, int verbosity=0, const std::string &prefix="") const =0
gem5::Packet::PrintReqState::LabelStackEntry
An entry in the label stack.
Definition: packet.hh:482
gem5::Packet::htmReturnReason
HtmCacheFailure htmReturnReason
Holds the return status of the transaction.
Definition: packet.hh:411
gem5::Packet::RESPONDER_FLAGS
@ RESPONDER_FLAGS
Definition: packet.hh:304
gem5::Packet::getHtmTransactionUid
uint64_t getHtmTransactionUid() const
If a packet/request originates in a CPU executing in transactional mode, i.e.
Definition: packet.cc:525
gem5::Packet::matchAddr
bool matchAddr(const Addr addr, const bool is_secure) const
Check if packet corresponds to a given address and address space.
Definition: packet.cc:399
gem5::Packet::PrintReqState::curPrefix
const std::string & curPrefix()
Returns the current line prefix.
Definition: packet.hh:505
cprintf.hh
gem5::Packet::makeHtmTransactionalReqResponse
void makeHtmTransactionalReqResponse(const HtmCacheFailure ret_code)
Communicates to the core that a packet was processed by the memory subsystem while running in transac...
Definition: packet.cc:473
gem5::Packet::getHtmTransactionFailedInCacheRC
HtmCacheFailure getHtmTransactionFailedInCacheRC() const
If a packet/request has returned from the cache hierarchy in a failed transaction,...
Definition: packet.cc:505
gem5::Packet::SenderState
A virtual base opaque structure used to hold state associated with the packet (e.g....
Definition: packet.hh:465
gem5::Packet::cmd
MemCmd cmd
The command field of the packet.
Definition: packet.hh:369
gem5::Packet::isPrint
bool isPrint() const
Definition: packet.hh:620
gem5::Packet::needsResponse
bool needsResponse() const
Definition: packet.hh:605
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::Packet::senderState
SenderState * senderState
This packet's sender state.
Definition: packet.hh:542
gem5::Packet::flags
Flags flags
Definition: packet.hh:363
gem5::Packet::FAILS_TRANSACTION
@ FAILS_TRANSACTION
Definition: packet.hh:336
packet_access.hh
gem5::Packet::popSenderState
SenderState * popSenderState()
Pop the top of the state stack and return a pointer to it.
Definition: packet.cc:338
gem5::Packet::PrintReqState::printObj
void printObj(Printable *obj)
Print a Printable object to os, because it matched the address on a PrintReq.
Definition: packet.cc:466
gem5::Packet::PrintReqState::LabelStackEntry::LabelStackEntry
LabelStackEntry(const std::string &_label, std::string *_prefix)
Definition: packet.cc:424
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:204
std
Overload hash function for BasicBlockRange type.
Definition: misc.hh:2388
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:803
gem5::Packet::PrintReqState::~PrintReqState
~PrintReqState()
Definition: packet.cc:416
logging.hh
gem5::Packet::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr other)
Check a functional request against a memory value stored in another packet (i.e.
Definition: packet.hh:1371
gem5::Packet::PrintReqState::verbosity
const int verbosity
Definition: packet.hh:497
gem5::Packet::isExpressSnoop
bool isExpressSnoop() const
Definition: packet.hh:698
trace.hh
gem5::Packet::setHtmTransactionFailedInCache
void setHtmTransactionFailedInCache(const HtmCacheFailure ret_code)
Stipulates that this packet/request has returned from the cache hierarchy in a failed transaction.
Definition: packet.cc:489
gem5::Packet::PrintReqState::popLabel
void popLabel()
Pop a label off the label stack.
Definition: packet.cc:440
gem5::Packet::isHtmTransactional
bool isHtmTransactional() const
Returns whether or not this packet/request originates in the CPU executing in transactional mode,...
Definition: packet.cc:519
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:790
gem5::Packet::copyResponderFlags
void copyResponderFlags(const PacketPtr pkt)
Copy the reponse flags from an input packet to this packet.
Definition: packet.cc:320
gem5::Packet::bytesValid
std::vector< bool > bytesValid
Track the bytes found that satisfy a functional read.
Definition: packet.hh:399
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::Packet::getAddrRange
AddrRange getAddrRange() const
Get address range to which this packet belongs.
Definition: packet.cc:239
gem5::Packet::print
std::string print() const
A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overhea...
Definition: packet.cc:378
gem5::Packet::setUintX
void setUintX(uint64_t w, ByteOrder endian)
Set the value in the word w after truncating it to the length of the packet and then byteswapping it ...
Definition: packet.cc:357
gem5::Packet::FROM_TRANSACTION
@ FROM_TRANSACTION
Definition: packet.hh:340
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:800
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
gem5::Packet::addr
Addr addr
The address of the request.
Definition: packet.hh:388
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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