gem5 v24.0.0.0
Loading...
Searching...
No Matches
gem5::VecPredRegT< VecElem, NumElems, Packed, Const > Class Template Reference

Predicate register view. More...

#include <vec_pred_reg.hh>

Public Types

using Container
 Container type alias.
 

Public Member Functions

 VecPredRegT (Container &c)
 
template<bool Condition = !Const>
std::enable_if_t< Condition > reset ()
 Reset the register to an all-false value.
 
template<bool Condition = !Const>
std::enable_if_t< Condition > set ()
 Reset the register to an all-true value.
 
template<bool Condition = !Const>
std::enable_if_t< Condition, MyClass & > operator= (const MyClass &that)
 
const bool & operator[] (size_t idx) const
 
template<bool Condition = !Const>
std::enable_if_t< Condition, bool & > operator[] (size_t idx)
 
uint8_t getRaw (size_t idx) const
 Return an element of the predicate register as it appears in the raw (untyped) internal representation.
 
template<bool Condition = !Const>
std::enable_if_t< Condition > setRaw (size_t idx, uint8_t val)
 Write a raw value in an element of the predicate register.
 
template<typename VE2 , size_t NE2, bool P2, bool C2>
bool operator== (const VecPredRegT< VE2, NE2, P2, C2 > &that) const
 Equality operator, required to compare thread contexts.
 
template<typename VE2 , size_t NE2, bool P2, bool C2>
bool operator!= (const VecPredRegT< VE2, NE2, P2, C2 > &that) const
 Inequality operator, required to compare thread contexts.
 
template<bool MC>
bool firstActive (const VecPredRegT< VecElem, NumElems, Packed, MC > &mask, size_t actual_num_elems) const
 Returns true if the first active element of the register is true.
 
template<bool MC>
bool noneActive (const VecPredRegT< VecElem, NumElems, Packed, MC > &mask, size_t actual_num_elems) const
 Returns true if there are no active elements in the register.
 
template<bool MC>
bool lastActive (const VecPredRegT< VecElem, NumElems, Packed, MC > &mask, size_t actual_num_elems) const
 Returns true if the last active element of the register is true.
 

Protected Types

using MyClass = VecPredRegT<VecElem, NumElems, Packed, Const>
 

Protected Attributes

Containercontainer
 Container corresponding to this view.
 

Static Protected Attributes

static constexpr size_t NUM_BITS
 Size of the register in bits.
 

Friends

std::ostream & operator<< (std::ostream &os, const MyClass &p)
 

Detailed Description

template<typename VecElem, size_t NumElems, bool Packed, bool Const>
class gem5::VecPredRegT< VecElem, NumElems, Packed, Const >

Predicate register view.

This generic class implements the View in an MVC pattern, similarly to

See also
VecRegT. Since predicates are mainly used in conjunction with vectors to specify which lanes are active in a vector operation, the class is templated on the vector element type to simplify ISA definitions.
Template Parameters
VecElemType of the vector elements.
NumElemsNumber of vector elements making up the view.
PackedTrue if the predicate register relies on a packed representation, i.e. adjacent bits refer to different vector elements irrespective of the vector element size (e.g. this is the case for AVX-512). If false, the predicate register relies on an unpacked representation, where each bit refers to the corresponding byte in a vector register (e.g. this is the case for ARM SVE).
ConstTrue if the underlying container can be modified through the view.

Definition at line 73 of file vec_pred_reg.hh.

Member Typedef Documentation

◆ Container

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
using gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::Container
Initial value:
typename std::conditional_t<
Const,
VecPredReg::Container VecPredRegContainer
Definition vec.hh:71

Container type alias.

Definition at line 82 of file vec_pred_reg.hh.

◆ MyClass

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
using gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::MyClass = VecPredRegT<VecElem, NumElems, Packed, Const>
protected

Definition at line 89 of file vec_pred_reg.hh.

Constructor & Destructor Documentation

◆ VecPredRegT()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::VecPredRegT ( Container & c)
inline

Definition at line 94 of file vec_pred_reg.hh.

Member Function Documentation

◆ firstActive()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool MC>
bool gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::firstActive ( const VecPredRegT< VecElem, NumElems, Packed, MC > & mask,
size_t actual_num_elems ) const
inline

Returns true if the first active element of the register is true.

Parameters
maskInput mask used to filter the predicates to be tested.
actual_num_elemsActual number of vector elements considered for the test (corresponding to the current vector length).

Definition at line 175 of file vec_pred_reg.hh.

References gem5::ArmISA::i, and gem5::ArmISA::mask.

◆ getRaw()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
uint8_t gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::getRaw ( size_t idx) const
inline

Return an element of the predicate register as it appears in the raw (untyped) internal representation.

Definition at line 128 of file vec_pred_reg.hh.

References gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::container.

◆ lastActive()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool MC>
bool gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::lastActive ( const VecPredRegT< VecElem, NumElems, Packed, MC > & mask,
size_t actual_num_elems ) const
inline

Returns true if the last active element of the register is true.

Parameters
maskInput mask used to filter the predicates to be tested.
actual_num_elemsActual number of vector elements considered for the test (corresponding to the current vector length).

Definition at line 211 of file vec_pred_reg.hh.

References gem5::ArmISA::i, gem5::ArmISA::mask, and gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator[]().

◆ noneActive()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool MC>
bool gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::noneActive ( const VecPredRegT< VecElem, NumElems, Packed, MC > & mask,
size_t actual_num_elems ) const
inline

Returns true if there are no active elements in the register.

Parameters
maskInput mask used to filter the predicates to be tested.
actual_num_elemsActual number of vector elements considered for the test (corresponding to the current vector length).

Definition at line 193 of file vec_pred_reg.hh.

References gem5::ArmISA::i, and gem5::ArmISA::mask.

◆ operator!=()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<typename VE2 , size_t NE2, bool P2, bool C2>
bool gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator!= ( const VecPredRegT< VE2, NE2, P2, C2 > & that) const
inline

Inequality operator, required to compare thread contexts.

Definition at line 154 of file vec_pred_reg.hh.

References gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator==().

◆ operator=()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool Condition = !Const>
std::enable_if_t< Condition, MyClass & > gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator= ( const MyClass & that)
inline

◆ operator==()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<typename VE2 , size_t NE2, bool P2, bool C2>
bool gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator== ( const VecPredRegT< VE2, NE2, P2, C2 > & that) const
inline

Equality operator, required to compare thread contexts.

Definition at line 146 of file vec_pred_reg.hh.

References gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::container.

Referenced by gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator!=().

◆ operator[]() [1/2]

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool Condition = !Const>
std::enable_if_t< Condition, bool & > gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator[] ( size_t idx)
inline

◆ operator[]() [2/2]

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
const bool & gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::operator[] ( size_t idx) const
inline

◆ reset()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool Condition = !Const>
std::enable_if_t< Condition > gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::reset ( )
inline

Reset the register to an all-false value.

Definition at line 98 of file vec_pred_reg.hh.

References gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::container.

◆ set()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool Condition = !Const>
std::enable_if_t< Condition > gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::set ( )
inline

Reset the register to an all-true value.

Definition at line 102 of file vec_pred_reg.hh.

References gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::container.

◆ setRaw()

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
template<bool Condition = !Const>
std::enable_if_t< Condition > gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::setRaw ( size_t idx,
uint8_t val )
inline

Write a raw value in an element of the predicate register.

Definition at line 137 of file vec_pred_reg.hh.

References gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::container, and gem5::X86ISA::val.

Friends And Related Symbol Documentation

◆ operator<<

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
std::ostream & operator<< ( std::ostream & os,
const MyClass & p )
friend

Definition at line 159 of file vec_pred_reg.hh.

Member Data Documentation

◆ container

◆ NUM_BITS

template<typename VecElem , size_t NumElems, bool Packed, bool Const>
size_t gem5::VecPredRegT< VecElem, NumElems, Packed, Const >::NUM_BITS
staticconstexprprotected
Initial value:
= Packed ? NumElems :
sizeof(VecElem) * NumElems
uint32_t VecElem
Definition vec.hh:63

Size of the register in bits.

Definition at line 77 of file vec_pred_reg.hh.


The documentation for this class was generated from the following file:

Generated on Tue Jun 18 2024 16:24:15 for gem5 by doxygen 1.11.0