gem5 v24.0.0.0
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#include <op_encodings.hh>
Public Member Functions | |
Inst_VOP2 (InFmt_VOP2 *, const std::string &opcode) | |
~Inst_VOP2 () | |
int | instSize () const override |
void | generateDisassembly () override |
void | initOperandInfo () override |
Public Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst | |
VEGAGPUStaticInst (const std::string &opcode) | |
~VEGAGPUStaticInst () | |
void | generateDisassembly () override |
bool | isFlatScratchRegister (int opIdx) override |
bool | isExecMaskRegister (int opIdx) override |
void | initOperandInfo () override |
int | getOperandSize (int opIdx) override |
int | coalescerTokenCount () const override |
Return the number of tokens needed by the coalescer. | |
ScalarRegU32 | srcLiteral () const override |
Public Member Functions inherited from gem5::GPUStaticInst | |
GPUStaticInst (const std::string &opcode) | |
virtual | ~GPUStaticInst () |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
void | initDynOperandInfo (Wavefront *wf, ComputeUnit *cu) |
virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
const std::string & | disassemble () |
virtual int | getNumOperands ()=0 |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
int | numSrcVecOperands () |
int | numDstVecOperands () |
int | numSrcVecDWords () |
int | numDstVecDWords () |
int | numSrcScalarOperands () |
int | numDstScalarOperands () |
int | numSrcScalarDWords () |
int | numDstScalarDWords () |
int | maxOperandSize () |
bool | isALU () const |
bool | isBranch () const |
bool | isCondBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isEndOfKernel () const |
bool | isKernelLaunch () const |
bool | isSDWAInst () const |
bool | isDPPInst () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isSleep () const |
bool | isBarrier () const |
bool | isMemSync () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isFlatGlobal () const |
bool | isFlatScratch () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | readsEXEC () const |
bool | writesEXEC () const |
bool | readsMode () const |
bool | writesMode () const |
bool | ignoreExec () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. | |
bool | isSystemCoherent () const |
bool | isI8 () const |
bool | isF16 () const |
bool | isF32 () const |
bool | isF64 () const |
bool | isFMA () const |
bool | isMAC () const |
bool | isMAD () const |
bool | isMFMA () const |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
virtual uint32_t | getTargetPc () |
void | setFlag (Flags flag) |
const std::string & | opcode () const |
const std::vector< OperandInfo > & | srcOperands () const |
const std::vector< OperandInfo > & | dstOperands () const |
const std::vector< OperandInfo > & | srcVecRegOperands () const |
const std::vector< OperandInfo > & | dstVecRegOperands () const |
const std::vector< OperandInfo > & | srcScalarRegOperands () const |
const std::vector< OperandInfo > & | dstScalarRegOperands () const |
Protected Member Functions | |
template<typename T > | |
T | sdwaSrcHelper (GPUDynInstPtr gpuDynInst, T &src1) |
template<typename T > | |
void | sdwaDstHelper (GPUDynInstPtr gpuDynInst, T &vdst) |
template<typename T > | |
T | dppHelper (GPUDynInstPtr gpuDynInst, T &src1) |
template<typename ConstT , typename T > | |
void | vop2Helper (GPUDynInstPtr gpuDynInst, void(*fOpImpl)(T &, T &, T &, Wavefront *)) |
Protected Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst | |
void | panicUnimplemented () const |
Protected Attributes | |
InFmt_VOP2 | instData |
InstFormat | extData |
uint32_t | varSize |
Protected Attributes inherited from gem5::VegaISA::VEGAGPUStaticInst | |
ScalarRegU32 | _srcLiteral |
if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here | |
Protected Attributes inherited from gem5::GPUStaticInst | |
const std::string | _opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
std::vector< OperandInfo > | srcOps |
std::vector< OperandInfo > | dstOps |
Private Member Functions | |
bool | hasSecondDword (InFmt_VOP2 *) |
Additional Inherited Members | |
Public Types inherited from gem5::GPUStaticInst | |
enum | OpType { SRC_VEC , SRC_SCALAR , DST_VEC , DST_SCALAR } |
typedef int(RegisterManager::* | MapRegFn) (Wavefront *, int) |
Public Attributes inherited from gem5::GPUStaticInst | |
enums::StorageClassType | executed_as |
Static Public Attributes inherited from gem5::GPUStaticInst | |
static uint64_t | dynamic_id_count |
Definition at line 257 of file op_encodings.hh.
gem5::VegaISA::Inst_VOP2::Inst_VOP2 | ( | InFmt_VOP2 * | iFmt, |
const std::string & | opcode ) |
Definition at line 601 of file op_encodings.cc.
References gem5::VegaISA::VEGAGPUStaticInst::_srcLiteral, extData, hasSecondDword(), instData, gem5::VegaISA::REG_SRC_DPP, gem5::VegaISA::REG_SRC_SWDA, gem5::GPUStaticInst::setFlag(), gem5::VegaISA::InFmt_VOP2::SRC0, and varSize.
gem5::VegaISA::Inst_VOP2::~Inst_VOP2 | ( | ) |
Definition at line 621 of file op_encodings.cc.
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inlineprotected |
Definition at line 323 of file op_encodings.hh.
References gem5::VegaISA::InFmt_VOP_DPP::BANK_MASK, gem5::VegaISA::InFmt_VOP_DPP::BC, gem5::VegaISA::InFmt_VOP_DPP::DPP_CTRL, DPRINTF, extData, gem5::VegaISA::InstFormat::iFmt_VOP_DPP, gem5::GPUStaticInst::opcode(), gem5::VegaISA::processDPP(), gem5::VegaISA::InFmt_VOP_DPP::ROW_MASK, gem5::VegaISA::InFmt_VOP_DPP::SRC0, gem5::VegaISA::InFmt_VOP_DPP::SRC0_ABS, gem5::VegaISA::InFmt_VOP_DPP::SRC0_NEG, gem5::VegaISA::InFmt_VOP_DPP::SRC1_ABS, and gem5::VegaISA::InFmt_VOP_DPP::SRC1_NEG.
Referenced by vop2Helper().
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overridevirtual |
Implements gem5::GPUStaticInst.
Definition at line 696 of file op_encodings.cc.
References gem5::GPUStaticInst::_opcode, gem5::VegaISA::VEGAGPUStaticInst::_srcLiteral, gem5::GPUStaticInst::disassembly, extData, gem5::VegaISA::InstFormat::imm_u32, instData, gem5::VegaISA::InFmt_VOP2::OP, gem5::VegaISA::opSelectorToRegSym(), gem5::GPUStaticInst::readsVCC(), gem5::VegaISA::REG_SRC_DPP, gem5::VegaISA::REG_SRC_LITERAL, gem5::VegaISA::REG_SRC_SWDA, gem5::VegaISA::InFmt_VOP2::SRC0, gem5::VegaISA::InFmt_VOP2::VDST, gem5::VegaISA::InFmt_VOP2::VSRC1, and gem5::GPUStaticInst::writesVCC().
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private |
Definition at line 671 of file op_encodings.cc.
References gem5::VegaISA::InFmt_VOP2::OP, gem5::VegaISA::REG_SRC_DPP, gem5::VegaISA::REG_SRC_LITERAL, gem5::VegaISA::REG_SRC_SWDA, and gem5::VegaISA::InFmt_VOP2::SRC0.
Referenced by Inst_VOP2().
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overridevirtual |
Implements gem5::GPUStaticInst.
Definition at line 626 of file op_encodings.cc.
References gem5::GPUStaticInst::dstOps, gem5::VegaISA::VEGAGPUStaticInst::getOperandSize(), instData, gem5::VegaISA::isScalarReg(), gem5::VegaISA::isVectorReg(), gem5::GPUStaticInst::numDstRegOperands(), gem5::GPUStaticInst::numSrcRegOperands(), gem5::GPUStaticInst::readsVCC(), gem5::X86ISA::reg, gem5::VegaISA::REG_VCC_LO, gem5::VegaISA::InFmt_VOP2::SRC0, gem5::GPUStaticInst::srcOps, gem5::VegaISA::InFmt_VOP2::VDST, gem5::VegaISA::InFmt_VOP2::VSRC1, and gem5::GPUStaticInst::writesVCC().
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overridevirtual |
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inlineprotected |
Definition at line 308 of file op_encodings.hh.
References gem5::Wavefront::execMask(), extData, gem5::VegaISA::InstFormat::iFmt_VOP_SDWA, instData, gem5::ArmISA::NumVecElemPerVecReg, gem5::VegaISA::processSDWA_dst(), and gem5::VegaISA::InFmt_VOP2::VDST.
Referenced by vop2Helper().
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inlineprotected |
Definition at line 276 of file op_encodings.hh.
References gem5::VegaISA::InFmt_VOP_SDWA::CLMP, DPRINTF, gem5::VegaISA::InFmt_VOP_SDWA::DST_SEL, gem5::VegaISA::InFmt_VOP_SDWA::DST_U, extData, gem5::VegaISA::InstFormat::iFmt_VOP_SDWA, instData, gem5::GPUStaticInst::opcode(), gem5::VegaISA::processSDWA_src(), gem5::VegaISA::InFmt_VOP_SDWA::SRC0, gem5::VegaISA::InFmt_VOP_SDWA::SRC0_ABS, gem5::VegaISA::InFmt_VOP_SDWA::SRC0_NEG, gem5::VegaISA::InFmt_VOP_SDWA::SRC0_SEL, gem5::VegaISA::InFmt_VOP_SDWA::SRC0_SEXT, gem5::VegaISA::InFmt_VOP_SDWA::SRC1_ABS, gem5::VegaISA::InFmt_VOP_SDWA::SRC1_NEG, gem5::VegaISA::InFmt_VOP_SDWA::SRC1_SEL, gem5::VegaISA::InFmt_VOP_SDWA::SRC1_SEXT, and gem5::VegaISA::InFmt_VOP2::VSRC1.
Referenced by vop2Helper().
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inlineprotected |
Definition at line 343 of file op_encodings.hh.
References dppHelper(), instData, gem5::GPUStaticInst::isDPPInst(), gem5::GPUStaticInst::isSDWAInst(), gem5::ArmISA::NumVecElemPerVecReg, sdwaDstHelper(), sdwaSrcHelper(), gem5::VegaISA::InFmt_VOP2::SRC0, gem5::VegaISA::InFmt_VOP2::VDST, and gem5::VegaISA::InFmt_VOP2::VSRC1.
Referenced by gem5::VegaISA::Inst_VOP2__V_MUL_U32_U24::execute().
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Definition at line 272 of file op_encodings.hh.
Referenced by dppHelper(), gem5::VegaISA::Inst_VOP2__V_ADD_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_F32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U32::execute(), gem5::VegaISA::Inst_VOP2__V_AND_B32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_MAC_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADAK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADMK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_OR_B32::execute(), generateDisassembly(), Inst_VOP2(), sdwaDstHelper(), and sdwaSrcHelper().
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Definition at line 270 of file op_encodings.hh.
Referenced by gem5::VegaISA::Inst_VOP2__V_ADD_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_F32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U16::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADDC_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_AND_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I16::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I32::execute(), gem5::VegaISA::Inst_VOP2__V_CNDMASK_B32::execute(), gem5::VegaISA::Inst_VOP2__V_FMAC_F32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_MAC_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADAK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADMK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LO_U16::execute(), gem5::VegaISA::Inst_VOP2__V_OR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U32::execute(), gem5::VegaISA::Inst_VOP2__V_XNOR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_XOR_B32::execute(), generateDisassembly(), initOperandInfo(), Inst_VOP2(), sdwaDstHelper(), sdwaSrcHelper(), and vop2Helper().
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Definition at line 273 of file op_encodings.hh.
Referenced by Inst_VOP2(), and instSize().