gem5  v21.1.0.2
Public Member Functions | Protected Attributes | Private Member Functions | List of all members
gem5::VegaISA::Inst_VOP2 Class Reference

#include <op_encodings.hh>

Inheritance diagram for gem5::VegaISA::Inst_VOP2:
gem5::VegaISA::VEGAGPUStaticInst gem5::GPUStaticInst gem5::VegaISA::Inst_VOP2__V_ADD_CO_U32 gem5::VegaISA::Inst_VOP2__V_ADD_F16 gem5::VegaISA::Inst_VOP2__V_ADD_F32 gem5::VegaISA::Inst_VOP2__V_ADD_U16 gem5::VegaISA::Inst_VOP2__V_ADD_U32 gem5::VegaISA::Inst_VOP2__V_ADDC_CO_U32 gem5::VegaISA::Inst_VOP2__V_AND_B32 gem5::VegaISA::Inst_VOP2__V_ASHRREV_I16 gem5::VegaISA::Inst_VOP2__V_ASHRREV_I32 gem5::VegaISA::Inst_VOP2__V_CNDMASK_B32 gem5::VegaISA::Inst_VOP2__V_LDEXP_F16 gem5::VegaISA::Inst_VOP2__V_LSHLREV_B16 gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32 gem5::VegaISA::Inst_VOP2__V_LSHRREV_B16 gem5::VegaISA::Inst_VOP2__V_LSHRREV_B32 gem5::VegaISA::Inst_VOP2__V_MAC_F16 gem5::VegaISA::Inst_VOP2__V_MAC_F32 gem5::VegaISA::Inst_VOP2__V_MADAK_F16 gem5::VegaISA::Inst_VOP2__V_MADAK_F32 gem5::VegaISA::Inst_VOP2__V_MADMK_F16 gem5::VegaISA::Inst_VOP2__V_MADMK_F32 gem5::VegaISA::Inst_VOP2__V_MAX_F16 gem5::VegaISA::Inst_VOP2__V_MAX_F32 gem5::VegaISA::Inst_VOP2__V_MAX_I16 gem5::VegaISA::Inst_VOP2__V_MAX_I32 gem5::VegaISA::Inst_VOP2__V_MAX_U16 gem5::VegaISA::Inst_VOP2__V_MAX_U32 gem5::VegaISA::Inst_VOP2__V_MIN_F16 gem5::VegaISA::Inst_VOP2__V_MIN_F32 gem5::VegaISA::Inst_VOP2__V_MIN_I16 gem5::VegaISA::Inst_VOP2__V_MIN_I32 gem5::VegaISA::Inst_VOP2__V_MIN_U16 gem5::VegaISA::Inst_VOP2__V_MIN_U32 gem5::VegaISA::Inst_VOP2__V_MUL_F16 gem5::VegaISA::Inst_VOP2__V_MUL_F32 gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24 gem5::VegaISA::Inst_VOP2__V_MUL_HI_U32_U24 gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24 gem5::VegaISA::Inst_VOP2__V_MUL_LEGACY_F32 gem5::VegaISA::Inst_VOP2__V_MUL_LO_U16 gem5::VegaISA::Inst_VOP2__V_MUL_U32_U24 gem5::VegaISA::Inst_VOP2__V_OR_B32 gem5::VegaISA::Inst_VOP2__V_SUB_CO_U32 gem5::VegaISA::Inst_VOP2__V_SUB_F16 gem5::VegaISA::Inst_VOP2__V_SUB_F32 gem5::VegaISA::Inst_VOP2__V_SUB_U16 gem5::VegaISA::Inst_VOP2__V_SUB_U32 gem5::VegaISA::Inst_VOP2__V_SUBB_CO_U32 gem5::VegaISA::Inst_VOP2__V_SUBBREV_CO_U32 gem5::VegaISA::Inst_VOP2__V_SUBREV_CO_U32 gem5::VegaISA::Inst_VOP2__V_SUBREV_F16 gem5::VegaISA::Inst_VOP2__V_SUBREV_F32 gem5::VegaISA::Inst_VOP2__V_SUBREV_U16 gem5::VegaISA::Inst_VOP2__V_SUBREV_U32 gem5::VegaISA::Inst_VOP2__V_XOR_B32

Public Member Functions

 Inst_VOP2 (InFmt_VOP2 *, const std::string &opcode)
 
 ~Inst_VOP2 ()
 
int instSize () const override
 
void generateDisassembly () override
 
void initOperandInfo () override
 
- Public Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
 VEGAGPUStaticInst (const std::string &opcode)
 
 ~VEGAGPUStaticInst ()
 
bool isFlatScratchRegister (int opIdx) override
 
int getOperandSize (int opIdx) override
 
int coalescerTokenCount () const override
 Return the number of tokens needed by the coalescer. More...
 
ScalarRegU32 srcLiteral () const override
 
- Public Member Functions inherited from gem5::GPUStaticInst
 GPUStaticInst (const std::string &opcode)
 
virtual ~GPUStaticInst ()
 
void instAddr (int inst_addr)
 
int instAddr () const
 
int nextInstAddr () const
 
void instNum (int num)
 
int instNum ()
 
void ipdInstNum (int num)
 
int ipdInstNum () const
 
void initDynOperandInfo (Wavefront *wf, ComputeUnit *cu)
 
virtual void execute (GPUDynInstPtr gpuDynInst)=0
 
const std::string & disassemble ()
 
virtual int getNumOperands ()=0
 
virtual bool isExecMaskRegister (int opIdx)=0
 
virtual int numDstRegOperands ()=0
 
virtual int numSrcRegOperands ()=0
 
int numSrcVecOperands ()
 
int numDstVecOperands ()
 
int numSrcVecDWords ()
 
int numDstVecDWords ()
 
int numSrcScalarOperands ()
 
int numDstScalarOperands ()
 
int numSrcScalarDWords ()
 
int numDstScalarDWords ()
 
int maxOperandSize ()
 
bool isALU () const
 
bool isBranch () const
 
bool isCondBranch () const
 
bool isNop () const
 
bool isReturn () const
 
bool isEndOfKernel () const
 
bool isKernelLaunch () const
 
bool isSDWAInst () const
 
bool isDPPInst () const
 
bool isUnconditionalJump () const
 
bool isSpecialOp () const
 
bool isWaitcnt () const
 
bool isSleep () const
 
bool isBarrier () const
 
bool isMemSync () const
 
bool isMemRef () const
 
bool isFlat () const
 
bool isLoad () const
 
bool isStore () const
 
bool isAtomic () const
 
bool isAtomicNoRet () const
 
bool isAtomicRet () const
 
bool isScalar () const
 
bool readsSCC () const
 
bool writesSCC () const
 
bool readsVCC () const
 
bool writesVCC () const
 
bool readsEXEC () const
 
bool writesEXEC () const
 
bool readsMode () const
 
bool writesMode () const
 
bool ignoreExec () const
 
bool isAtomicAnd () const
 
bool isAtomicOr () const
 
bool isAtomicXor () const
 
bool isAtomicCAS () const
 
bool isAtomicExch () const
 
bool isAtomicAdd () const
 
bool isAtomicSub () const
 
bool isAtomicInc () const
 
bool isAtomicDec () const
 
bool isAtomicMax () const
 
bool isAtomicMin () const
 
bool isArgLoad () const
 
bool isGlobalMem () const
 
bool isLocalMem () const
 
bool isArgSeg () const
 
bool isGlobalSeg () const
 
bool isGroupSeg () const
 
bool isKernArgSeg () const
 
bool isPrivateSeg () const
 
bool isReadOnlySeg () const
 
bool isSpillSeg () const
 
bool isGloballyCoherent () const
 Coherence domain of a memory instruction. More...
 
bool isSystemCoherent () const
 
bool isF16 () const
 
bool isF32 () const
 
bool isF64 () const
 
bool isFMA () const
 
bool isMAC () const
 
bool isMAD () const
 
virtual void initiateAcc (GPUDynInstPtr gpuDynInst)
 
virtual void completeAcc (GPUDynInstPtr gpuDynInst)
 
virtual uint32_t getTargetPc ()
 
void setFlag (Flags flag)
 
const std::string & opcode () const
 
const std::vector< OperandInfo > & srcOperands () const
 
const std::vector< OperandInfo > & dstOperands () const
 
const std::vector< OperandInfo > & srcVecRegOperands () const
 
const std::vector< OperandInfo > & dstVecRegOperands () const
 
const std::vector< OperandInfo > & srcScalarRegOperands () const
 
const std::vector< OperandInfo > & dstScalarRegOperands () const
 

Protected Attributes

InFmt_VOP2 instData
 
InstFormat extData
 
uint32_t varSize
 
- Protected Attributes inherited from gem5::VegaISA::VEGAGPUStaticInst
ScalarRegU32 _srcLiteral
 if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More...
 
- Protected Attributes inherited from gem5::GPUStaticInst
const std::string _opcode
 
std::string disassembly
 
int _instNum
 
int _instAddr
 
std::vector< OperandInfosrcOps
 
std::vector< OperandInfodstOps
 

Private Member Functions

bool hasSecondDword (InFmt_VOP2 *)
 

Additional Inherited Members

- Public Types inherited from gem5::GPUStaticInst
enum  OpType { SRC_VEC, SRC_SCALAR, DST_VEC, DST_SCALAR }
 
typedef int(RegisterManager::* MapRegFn) (Wavefront *, int)
 
- Public Attributes inherited from gem5::GPUStaticInst
enums::StorageClassType executed_as
 
- Static Public Attributes inherited from gem5::GPUStaticInst
static uint64_t dynamic_id_count
 
- Protected Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
void panicUnimplemented () const
 

Detailed Description

Definition at line 259 of file op_encodings.hh.

Constructor & Destructor Documentation

◆ Inst_VOP2()

gem5::VegaISA::Inst_VOP2::Inst_VOP2 ( InFmt_VOP2 iFmt,
const std::string &  opcode 
)

◆ ~Inst_VOP2()

gem5::VegaISA::Inst_VOP2::~Inst_VOP2 ( )

Definition at line 610 of file op_encodings.cc.

Member Function Documentation

◆ generateDisassembly()

void gem5::VegaISA::Inst_VOP2::generateDisassembly ( )
overridevirtual

◆ hasSecondDword()

bool gem5::VegaISA::Inst_VOP2::hasSecondDword ( InFmt_VOP2 iFmt)
private

◆ initOperandInfo()

void gem5::VegaISA::Inst_VOP2::initOperandInfo ( )
overridevirtual

◆ instSize()

int gem5::VegaISA::Inst_VOP2::instSize ( ) const
overridevirtual

Implements gem5::GPUStaticInst.

Definition at line 654 of file op_encodings.cc.

References varSize.

Member Data Documentation

◆ extData

InstFormat gem5::VegaISA::Inst_VOP2::extData
protected

◆ instData

InFmt_VOP2 gem5::VegaISA::Inst_VOP2::instData
protected

Definition at line 272 of file op_encodings.hh.

Referenced by gem5::VegaISA::Inst_VOP2__V_CNDMASK_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_AND_B32::execute(), gem5::VegaISA::Inst_VOP2__V_OR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_XOR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_MAC_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADMK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADAK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADDC_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LO_U16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I16::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U32::execute(), generateDisassembly(), initOperandInfo(), and Inst_VOP2().

◆ varSize

uint32_t gem5::VegaISA::Inst_VOP2::varSize
protected

Definition at line 275 of file op_encodings.hh.

Referenced by Inst_VOP2(), and instSize().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:33:45 for gem5 by doxygen 1.8.17