gem5 v24.0.0.0
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exported_clock_rate_control.hh
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1/*
2 * Copyright 2019 Google, Inc.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution;
11 * neither the name of the copyright holders nor the names of its
12 * contributors may be used to endorse or promote products derived from
13 * this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28#ifndef __ARCH_ARM_FASTMODEL_PROTOCOL_EXPORTED_CLOCK_RATE_CONTROL_HH__
29#define __ARCH_ARM_FASTMODEL_PROTOCOL_EXPORTED_CLOCK_RATE_CONTROL_HH__
30
31#include <string>
32#include <systemc>
33#include <tlm>
34
35namespace gem5
36{
37
38// This protocol is an exportable version of the clock rate protocol native to
39// fast models. It's identical to the original, except it has some extra info
40// which lets it be exported into systemc.
41
43
45{
46 public:
48 virtual void set_mul_div(uint64_t mul, uint64_t div) = 0;
49};
50
52{
53 public:
55};
56
58{
59 public:
60 ClockRateControlSlaveBase(const std::string &name) {}
61};
62
64 public tlm::tlm_base_initiator_socket<64, ClockRateControlFwIf,
65 ClockRateControlBwIf>
66{
67 private:
69
70 public:
73
74 using Base::bind;
75 using Base::operator();
76
85
86 const char *
87 kind() const override
88 {
89 return "ClockRateControlInitiatorSocket";
90 }
91
92 std::type_index
93 get_protocol_types() const override
94 {
96 }
97};
98
100 public tlm::tlm_base_target_socket<64, ClockRateControlFwIf,
101 ClockRateControlBwIf>
102{
103 public:
106
107 using Base::bind;
108 using Base::operator();
109
110 using Base::Base;
111
112 const char *
113 kind() const override
114 {
115 return "ClockRateControlInitiatorSocket";
116 }
117
118 std::type_index
119 get_protocol_types() const override
120 {
122 }
123};
124
125} // namespace gem5
126
127#endif // __ARCH_ARM_FASTMODEL_PROTOCOL_EXPORTED_CLOCK_RATE_CONTROL_HH__
virtual void set_mul_div(uint64_t mul, uint64_t div)=0
std::type_index get_protocol_types() const override
tlm::tlm_base_initiator_socket< 64, ClockRateControlFwIf, ClockRateControlBwIf > Base
ClockRateControlSlaveBase(const std::string &name)
std::type_index get_protocol_types() const override
tlm::tlm_base_target_socket< 64, ClockRateControlFwIf, ClockRateControlBwIf > Base
virtual sc_core::sc_export< ClockRateControlBwIf > & get_base_export()
T div(T rs1, T rs2)
Definition utility.hh:192
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
const std::string & name()
Definition trace.cc:48

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